1. ${srcdir}/emulparams/elf32ppccommon.sh
2. ${srcdir}/emulparams/plt_unwind.sh
3EXTRA_EM_FILE=ppc64elf
4ELFSIZE=64
5OUTPUT_FORMAT="elf64-powerpc"
6TEXT_START_ADDR=0x10000000
7#SEGMENT_SIZE=0x10000000
8ARCH=powerpc:common64
9NOP=0x60000000
10unset EXECUTABLE_SYMBOLS
11unset SDATA_START_SYMBOLS
12unset SDATA2_START_SYMBOLS
13unset SBSS_START_SYMBOLS
14unset SBSS_END_SYMBOLS
15unset OTHER_END_SYMBOLS
16unset OTHER_RELRO_SECTIONS
17OTHER_TEXT_SECTIONS="*(.sfpr .glink)"
18BSS_PLT=
19OTHER_BSS_SYMBOLS="
20  .tocbss	${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.tocbss)}"
21OTHER_PLT_RELOC_SECTIONS="
22  .rela.tocbss	${RELOCATING-0} : { *(.rela.tocbss) }"
23
24if test x${RELOCATING+set} = xset; then
25  GOT="
26  .got		: ALIGN(8) { *(.got .toc) }"
27else
28  GOT="
29  .got		0 : { *(.got) }
30  .toc		0 : { *(.toc) }"
31fi
32# Put .opd relocs first so ld.so will process them before any ifunc relocs.
33INITIAL_RELOC_SECTIONS="
34  .rela.opd	${RELOCATING-0} : { *(.rela.opd) }"
35OTHER_GOT_RELOC_SECTIONS="
36  .rela.toc	${RELOCATING-0} : { *(.rela.toc) }
37  .rela.branch_lt	${RELOCATING-0} : { *(.rela.branch_lt) }"
38OTHER_READWRITE_SECTIONS="
39  .toc1		${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.toc1) }
40  .opd		${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { KEEP (*(.opd)) }
41  .branch_lt	${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.branch_lt) }"
42