1 /* Instruction building/extraction support for or1k. -*- C -*-
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4 - the resultant file is machine generated, cgen-ibld.in isn't
5
6 Copyright (C) 1996-2014 Free Software Foundation, Inc.
7
8 This file is part of libopcodes.
9
10 This library is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
13 any later version.
14
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
23
24 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
25 Keep that in mind. */
26
27 #include "sysdep.h"
28 #include <stdio.h>
29 #include "ansidecl.h"
30 #include "dis-asm.h"
31 #include "bfd.h"
32 #include "symcat.h"
33 #include "or1k-desc.h"
34 #include "or1k-opc.h"
35 #include "cgen/basic-modes.h"
36 #include "opintl.h"
37 #include "safe-ctype.h"
38
39 #undef min
40 #define min(a,b) ((a) < (b) ? (a) : (b))
41 #undef max
42 #define max(a,b) ((a) > (b) ? (a) : (b))
43
44 /* Used by the ifield rtx function. */
45 #define FLD(f) (fields->f)
46
47 static const char * insert_normal
48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
50 static const char * insert_insn_normal
51 (CGEN_CPU_DESC, const CGEN_INSN *,
52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
53 static int extract_normal
54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
55 unsigned int, unsigned int, unsigned int, unsigned int,
56 unsigned int, unsigned int, bfd_vma, long *);
57 static int extract_insn_normal
58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
60 #if CGEN_INT_INSN_P
61 static void put_insn_int_value
62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
63 #endif
64 #if ! CGEN_INT_INSN_P
65 static CGEN_INLINE void insert_1
66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
67 static CGEN_INLINE int fill_cache
68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
69 static CGEN_INLINE long extract_1
70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
71 #endif
72
73 /* Operand insertion. */
74
75 #if ! CGEN_INT_INSN_P
76
77 /* Subroutine of insert_normal. */
78
79 static CGEN_INLINE void
insert_1(CGEN_CPU_DESC cd,unsigned long value,int start,int length,int word_length,unsigned char * bufp)80 insert_1 (CGEN_CPU_DESC cd,
81 unsigned long value,
82 int start,
83 int length,
84 int word_length,
85 unsigned char *bufp)
86 {
87 unsigned long x,mask;
88 int shift;
89
90 x = cgen_get_insn_value (cd, bufp, word_length);
91
92 /* Written this way to avoid undefined behaviour. */
93 mask = (((1L << (length - 1)) - 1) << 1) | 1;
94 if (CGEN_INSN_LSB0_P)
95 shift = (start + 1) - length;
96 else
97 shift = (word_length - (start + length));
98 x = (x & ~(mask << shift)) | ((value & mask) << shift);
99
100 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
101 }
102
103 #endif /* ! CGEN_INT_INSN_P */
104
105 /* Default insertion routine.
106
107 ATTRS is a mask of the boolean attributes.
108 WORD_OFFSET is the offset in bits from the start of the insn of the value.
109 WORD_LENGTH is the length of the word in bits in which the value resides.
110 START is the starting bit number in the word, architecture origin.
111 LENGTH is the length of VALUE in bits.
112 TOTAL_LENGTH is the total length of the insn in bits.
113
114 The result is an error message or NULL if success. */
115
116 /* ??? This duplicates functionality with bfd's howto table and
117 bfd_install_relocation. */
118 /* ??? This doesn't handle bfd_vma's. Create another function when
119 necessary. */
120
121 static const char *
insert_normal(CGEN_CPU_DESC cd,long value,unsigned int attrs,unsigned int word_offset,unsigned int start,unsigned int length,unsigned int word_length,unsigned int total_length,CGEN_INSN_BYTES_PTR buffer)122 insert_normal (CGEN_CPU_DESC cd,
123 long value,
124 unsigned int attrs,
125 unsigned int word_offset,
126 unsigned int start,
127 unsigned int length,
128 unsigned int word_length,
129 unsigned int total_length,
130 CGEN_INSN_BYTES_PTR buffer)
131 {
132 static char errbuf[100];
133 /* Written this way to avoid undefined behaviour. */
134 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
135
136 /* If LENGTH is zero, this operand doesn't contribute to the value. */
137 if (length == 0)
138 return NULL;
139
140 if (word_length > 8 * sizeof (CGEN_INSN_INT))
141 abort ();
142
143 /* For architectures with insns smaller than the base-insn-bitsize,
144 word_length may be too big. */
145 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
146 {
147 if (word_offset == 0
148 && word_length > total_length)
149 word_length = total_length;
150 }
151
152 /* Ensure VALUE will fit. */
153 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
154 {
155 long minval = - (1L << (length - 1));
156 unsigned long maxval = mask;
157
158 if ((value > 0 && (unsigned long) value > maxval)
159 || value < minval)
160 {
161 /* xgettext:c-format */
162 sprintf (errbuf,
163 _("operand out of range (%ld not between %ld and %lu)"),
164 value, minval, maxval);
165 return errbuf;
166 }
167 }
168 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
169 {
170 unsigned long maxval = mask;
171 unsigned long val = (unsigned long) value;
172
173 /* For hosts with a word size > 32 check to see if value has been sign
174 extended beyond 32 bits. If so then ignore these higher sign bits
175 as the user is attempting to store a 32-bit signed value into an
176 unsigned 32-bit field which is allowed. */
177 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
178 val &= 0xFFFFFFFF;
179
180 if (val > maxval)
181 {
182 /* xgettext:c-format */
183 sprintf (errbuf,
184 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
185 val, maxval);
186 return errbuf;
187 }
188 }
189 else
190 {
191 if (! cgen_signed_overflow_ok_p (cd))
192 {
193 long minval = - (1L << (length - 1));
194 long maxval = (1L << (length - 1)) - 1;
195
196 if (value < minval || value > maxval)
197 {
198 sprintf
199 /* xgettext:c-format */
200 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
201 value, minval, maxval);
202 return errbuf;
203 }
204 }
205 }
206
207 #if CGEN_INT_INSN_P
208
209 {
210 int shift;
211
212 if (CGEN_INSN_LSB0_P)
213 shift = (word_offset + start + 1) - length;
214 else
215 shift = total_length - (word_offset + start + length);
216 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
217 }
218
219 #else /* ! CGEN_INT_INSN_P */
220
221 {
222 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
223
224 insert_1 (cd, value, start, length, word_length, bufp);
225 }
226
227 #endif /* ! CGEN_INT_INSN_P */
228
229 return NULL;
230 }
231
232 /* Default insn builder (insert handler).
233 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
234 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
235 recorded in host byte order, otherwise BUFFER is an array of bytes
236 and the value is recorded in target byte order).
237 The result is an error message or NULL if success. */
238
239 static const char *
insert_insn_normal(CGEN_CPU_DESC cd,const CGEN_INSN * insn,CGEN_FIELDS * fields,CGEN_INSN_BYTES_PTR buffer,bfd_vma pc)240 insert_insn_normal (CGEN_CPU_DESC cd,
241 const CGEN_INSN * insn,
242 CGEN_FIELDS * fields,
243 CGEN_INSN_BYTES_PTR buffer,
244 bfd_vma pc)
245 {
246 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
247 unsigned long value;
248 const CGEN_SYNTAX_CHAR_TYPE * syn;
249
250 CGEN_INIT_INSERT (cd);
251 value = CGEN_INSN_BASE_VALUE (insn);
252
253 /* If we're recording insns as numbers (rather than a string of bytes),
254 target byte order handling is deferred until later. */
255
256 #if CGEN_INT_INSN_P
257
258 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
259 CGEN_FIELDS_BITSIZE (fields), value);
260
261 #else
262
263 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
264 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
265 value);
266
267 #endif /* ! CGEN_INT_INSN_P */
268
269 /* ??? It would be better to scan the format's fields.
270 Still need to be able to insert a value based on the operand though;
271 e.g. storing a branch displacement that got resolved later.
272 Needs more thought first. */
273
274 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
275 {
276 const char *errmsg;
277
278 if (CGEN_SYNTAX_CHAR_P (* syn))
279 continue;
280
281 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
282 fields, buffer, pc);
283 if (errmsg)
284 return errmsg;
285 }
286
287 return NULL;
288 }
289
290 #if CGEN_INT_INSN_P
291 /* Cover function to store an insn value into an integral insn. Must go here
292 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
293
294 static void
put_insn_int_value(CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,CGEN_INSN_BYTES_PTR buf,int length,int insn_length,CGEN_INSN_INT value)295 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
296 CGEN_INSN_BYTES_PTR buf,
297 int length,
298 int insn_length,
299 CGEN_INSN_INT value)
300 {
301 /* For architectures with insns smaller than the base-insn-bitsize,
302 length may be too big. */
303 if (length > insn_length)
304 *buf = value;
305 else
306 {
307 int shift = insn_length - length;
308 /* Written this way to avoid undefined behaviour. */
309 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
310
311 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
312 }
313 }
314 #endif
315
316 /* Operand extraction. */
317
318 #if ! CGEN_INT_INSN_P
319
320 /* Subroutine of extract_normal.
321 Ensure sufficient bytes are cached in EX_INFO.
322 OFFSET is the offset in bytes from the start of the insn of the value.
323 BYTES is the length of the needed value.
324 Returns 1 for success, 0 for failure. */
325
326 static CGEN_INLINE int
fill_cache(CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,CGEN_EXTRACT_INFO * ex_info,int offset,int bytes,bfd_vma pc)327 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
328 CGEN_EXTRACT_INFO *ex_info,
329 int offset,
330 int bytes,
331 bfd_vma pc)
332 {
333 /* It's doubtful that the middle part has already been fetched so
334 we don't optimize that case. kiss. */
335 unsigned int mask;
336 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
337
338 /* First do a quick check. */
339 mask = (1 << bytes) - 1;
340 if (((ex_info->valid >> offset) & mask) == mask)
341 return 1;
342
343 /* Search for the first byte we need to read. */
344 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
345 if (! (mask & ex_info->valid))
346 break;
347
348 if (bytes)
349 {
350 int status;
351
352 pc += offset;
353 status = (*info->read_memory_func)
354 (pc, ex_info->insn_bytes + offset, bytes, info);
355
356 if (status != 0)
357 {
358 (*info->memory_error_func) (status, pc, info);
359 return 0;
360 }
361
362 ex_info->valid |= ((1 << bytes) - 1) << offset;
363 }
364
365 return 1;
366 }
367
368 /* Subroutine of extract_normal. */
369
370 static CGEN_INLINE long
extract_1(CGEN_CPU_DESC cd,CGEN_EXTRACT_INFO * ex_info ATTRIBUTE_UNUSED,int start,int length,int word_length,unsigned char * bufp,bfd_vma pc ATTRIBUTE_UNUSED)371 extract_1 (CGEN_CPU_DESC cd,
372 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
373 int start,
374 int length,
375 int word_length,
376 unsigned char *bufp,
377 bfd_vma pc ATTRIBUTE_UNUSED)
378 {
379 unsigned long x;
380 int shift;
381
382 x = cgen_get_insn_value (cd, bufp, word_length);
383
384 if (CGEN_INSN_LSB0_P)
385 shift = (start + 1) - length;
386 else
387 shift = (word_length - (start + length));
388 return x >> shift;
389 }
390
391 #endif /* ! CGEN_INT_INSN_P */
392
393 /* Default extraction routine.
394
395 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
396 or sometimes less for cases like the m32r where the base insn size is 32
397 but some insns are 16 bits.
398 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
399 but for generality we take a bitmask of all of them.
400 WORD_OFFSET is the offset in bits from the start of the insn of the value.
401 WORD_LENGTH is the length of the word in bits in which the value resides.
402 START is the starting bit number in the word, architecture origin.
403 LENGTH is the length of VALUE in bits.
404 TOTAL_LENGTH is the total length of the insn in bits.
405
406 Returns 1 for success, 0 for failure. */
407
408 /* ??? The return code isn't properly used. wip. */
409
410 /* ??? This doesn't handle bfd_vma's. Create another function when
411 necessary. */
412
413 static int
extract_normal(CGEN_CPU_DESC cd,CGEN_EXTRACT_INFO * ex_info,CGEN_INSN_INT insn_value,unsigned int attrs,unsigned int word_offset,unsigned int start,unsigned int length,unsigned int word_length,unsigned int total_length,bfd_vma pc,long * valuep)414 extract_normal (CGEN_CPU_DESC cd,
415 #if ! CGEN_INT_INSN_P
416 CGEN_EXTRACT_INFO *ex_info,
417 #else
418 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
419 #endif
420 CGEN_INSN_INT insn_value,
421 unsigned int attrs,
422 unsigned int word_offset,
423 unsigned int start,
424 unsigned int length,
425 unsigned int word_length,
426 unsigned int total_length,
427 #if ! CGEN_INT_INSN_P
428 bfd_vma pc,
429 #else
430 bfd_vma pc ATTRIBUTE_UNUSED,
431 #endif
432 long *valuep)
433 {
434 long value, mask;
435
436 /* If LENGTH is zero, this operand doesn't contribute to the value
437 so give it a standard value of zero. */
438 if (length == 0)
439 {
440 *valuep = 0;
441 return 1;
442 }
443
444 if (word_length > 8 * sizeof (CGEN_INSN_INT))
445 abort ();
446
447 /* For architectures with insns smaller than the insn-base-bitsize,
448 word_length may be too big. */
449 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
450 {
451 if (word_offset + word_length > total_length)
452 word_length = total_length - word_offset;
453 }
454
455 /* Does the value reside in INSN_VALUE, and at the right alignment? */
456
457 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
458 {
459 if (CGEN_INSN_LSB0_P)
460 value = insn_value >> ((word_offset + start + 1) - length);
461 else
462 value = insn_value >> (total_length - ( word_offset + start + length));
463 }
464
465 #if ! CGEN_INT_INSN_P
466
467 else
468 {
469 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
470
471 if (word_length > 8 * sizeof (CGEN_INSN_INT))
472 abort ();
473
474 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
475 return 0;
476
477 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
478 }
479
480 #endif /* ! CGEN_INT_INSN_P */
481
482 /* Written this way to avoid undefined behaviour. */
483 mask = (((1L << (length - 1)) - 1) << 1) | 1;
484
485 value &= mask;
486 /* sign extend? */
487 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
488 && (value & (1L << (length - 1))))
489 value |= ~mask;
490
491 *valuep = value;
492
493 return 1;
494 }
495
496 /* Default insn extractor.
497
498 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
499 The extracted fields are stored in FIELDS.
500 EX_INFO is used to handle reading variable length insns.
501 Return the length of the insn in bits, or 0 if no match,
502 or -1 if an error occurs fetching data (memory_error_func will have
503 been called). */
504
505 static int
extract_insn_normal(CGEN_CPU_DESC cd,const CGEN_INSN * insn,CGEN_EXTRACT_INFO * ex_info,CGEN_INSN_INT insn_value,CGEN_FIELDS * fields,bfd_vma pc)506 extract_insn_normal (CGEN_CPU_DESC cd,
507 const CGEN_INSN *insn,
508 CGEN_EXTRACT_INFO *ex_info,
509 CGEN_INSN_INT insn_value,
510 CGEN_FIELDS *fields,
511 bfd_vma pc)
512 {
513 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
514 const CGEN_SYNTAX_CHAR_TYPE *syn;
515
516 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
517
518 CGEN_INIT_EXTRACT (cd);
519
520 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
521 {
522 int length;
523
524 if (CGEN_SYNTAX_CHAR_P (*syn))
525 continue;
526
527 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
528 ex_info, insn_value, fields, pc);
529 if (length <= 0)
530 return length;
531 }
532
533 /* We recognized and successfully extracted this insn. */
534 return CGEN_INSN_BITSIZE (insn);
535 }
536
537 /* Machine generated code added here. */
538
539 const char * or1k_cgen_insert_operand
540 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
541
542 /* Main entry point for operand insertion.
543
544 This function is basically just a big switch statement. Earlier versions
545 used tables to look up the function to use, but
546 - if the table contains both assembler and disassembler functions then
547 the disassembler contains much of the assembler and vice-versa,
548 - there's a lot of inlining possibilities as things grow,
549 - using a switch statement avoids the function call overhead.
550
551 This function could be moved into `parse_insn_normal', but keeping it
552 separate makes clear the interface between `parse_insn_normal' and each of
553 the handlers. It's also needed by GAS to insert operands that couldn't be
554 resolved during parsing. */
555
556 const char *
or1k_cgen_insert_operand(CGEN_CPU_DESC cd,int opindex,CGEN_FIELDS * fields,CGEN_INSN_BYTES_PTR buffer,bfd_vma pc ATTRIBUTE_UNUSED)557 or1k_cgen_insert_operand (CGEN_CPU_DESC cd,
558 int opindex,
559 CGEN_FIELDS * fields,
560 CGEN_INSN_BYTES_PTR buffer,
561 bfd_vma pc ATTRIBUTE_UNUSED)
562 {
563 const char * errmsg = NULL;
564 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
565
566 switch (opindex)
567 {
568 case OR1K_OPERAND_DISP26 :
569 {
570 long value = fields->f_disp26;
571 value = ((SI) (((value) - (pc))) >> (2));
572 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, buffer);
573 }
574 break;
575 case OR1K_OPERAND_RA :
576 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 20, 5, 32, total_length, buffer);
577 break;
578 case OR1K_OPERAND_RADF :
579 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
580 break;
581 case OR1K_OPERAND_RASF :
582 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 20, 5, 32, total_length, buffer);
583 break;
584 case OR1K_OPERAND_RB :
585 errmsg = insert_normal (cd, fields->f_r3, 0, 0, 15, 5, 32, total_length, buffer);
586 break;
587 case OR1K_OPERAND_RBDF :
588 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
589 break;
590 case OR1K_OPERAND_RBSF :
591 errmsg = insert_normal (cd, fields->f_r3, 0, 0, 15, 5, 32, total_length, buffer);
592 break;
593 case OR1K_OPERAND_RD :
594 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
595 break;
596 case OR1K_OPERAND_RDDF :
597 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
598 break;
599 case OR1K_OPERAND_RDSF :
600 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 25, 5, 32, total_length, buffer);
601 break;
602 case OR1K_OPERAND_SIMM16 :
603 errmsg = insert_normal (cd, fields->f_simm16, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_SIGN_OPT), 0, 15, 16, 32, total_length, buffer);
604 break;
605 case OR1K_OPERAND_SIMM16_SPLIT :
606 {
607 {
608 FLD (f_imm16_25_5) = ((((INT) (FLD (f_simm16_split)) >> (11))) & (31));
609 FLD (f_imm16_10_11) = ((FLD (f_simm16_split)) & (2047));
610 }
611 errmsg = insert_normal (cd, fields->f_imm16_25_5, 0, 0, 25, 5, 32, total_length, buffer);
612 if (errmsg)
613 break;
614 errmsg = insert_normal (cd, fields->f_imm16_10_11, 0, 0, 10, 11, 32, total_length, buffer);
615 if (errmsg)
616 break;
617 }
618 break;
619 case OR1K_OPERAND_UIMM16 :
620 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 15, 16, 32, total_length, buffer);
621 break;
622 case OR1K_OPERAND_UIMM16_SPLIT :
623 {
624 {
625 FLD (f_imm16_25_5) = ((((UINT) (FLD (f_uimm16_split)) >> (11))) & (31));
626 FLD (f_imm16_10_11) = ((FLD (f_uimm16_split)) & (2047));
627 }
628 errmsg = insert_normal (cd, fields->f_imm16_25_5, 0, 0, 25, 5, 32, total_length, buffer);
629 if (errmsg)
630 break;
631 errmsg = insert_normal (cd, fields->f_imm16_10_11, 0, 0, 10, 11, 32, total_length, buffer);
632 if (errmsg)
633 break;
634 }
635 break;
636 case OR1K_OPERAND_UIMM6 :
637 errmsg = insert_normal (cd, fields->f_uimm6, 0, 0, 5, 6, 32, total_length, buffer);
638 break;
639
640 default :
641 /* xgettext:c-format */
642 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
643 opindex);
644 abort ();
645 }
646
647 return errmsg;
648 }
649
650 int or1k_cgen_extract_operand
651 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
652
653 /* Main entry point for operand extraction.
654 The result is <= 0 for error, >0 for success.
655 ??? Actual values aren't well defined right now.
656
657 This function is basically just a big switch statement. Earlier versions
658 used tables to look up the function to use, but
659 - if the table contains both assembler and disassembler functions then
660 the disassembler contains much of the assembler and vice-versa,
661 - there's a lot of inlining possibilities as things grow,
662 - using a switch statement avoids the function call overhead.
663
664 This function could be moved into `print_insn_normal', but keeping it
665 separate makes clear the interface between `print_insn_normal' and each of
666 the handlers. */
667
668 int
or1k_cgen_extract_operand(CGEN_CPU_DESC cd,int opindex,CGEN_EXTRACT_INFO * ex_info,CGEN_INSN_INT insn_value,CGEN_FIELDS * fields,bfd_vma pc)669 or1k_cgen_extract_operand (CGEN_CPU_DESC cd,
670 int opindex,
671 CGEN_EXTRACT_INFO *ex_info,
672 CGEN_INSN_INT insn_value,
673 CGEN_FIELDS * fields,
674 bfd_vma pc)
675 {
676 /* Assume success (for those operands that are nops). */
677 int length = 1;
678 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
679
680 switch (opindex)
681 {
682 case OR1K_OPERAND_DISP26 :
683 {
684 long value;
685 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, pc, & value);
686 value = ((((value) << (2))) + (pc));
687 fields->f_disp26 = value;
688 }
689 break;
690 case OR1K_OPERAND_RA :
691 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r2);
692 break;
693 case OR1K_OPERAND_RADF :
694 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
695 break;
696 case OR1K_OPERAND_RASF :
697 length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 5, 32, total_length, pc, & fields->f_r2);
698 break;
699 case OR1K_OPERAND_RB :
700 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r3);
701 break;
702 case OR1K_OPERAND_RBDF :
703 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
704 break;
705 case OR1K_OPERAND_RBSF :
706 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_r3);
707 break;
708 case OR1K_OPERAND_RD :
709 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
710 break;
711 case OR1K_OPERAND_RDDF :
712 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
713 break;
714 case OR1K_OPERAND_RDSF :
715 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_r1);
716 break;
717 case OR1K_OPERAND_SIMM16 :
718 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_SIGN_OPT), 0, 15, 16, 32, total_length, pc, & fields->f_simm16);
719 break;
720 case OR1K_OPERAND_SIMM16_SPLIT :
721 {
722 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_imm16_25_5);
723 if (length <= 0) break;
724 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 11, 32, total_length, pc, & fields->f_imm16_10_11);
725 if (length <= 0) break;
726 FLD (f_simm16_split) = ((HI) (UINT) (((((FLD (f_imm16_25_5)) << (11))) | (FLD (f_imm16_10_11)))));
727 }
728 break;
729 case OR1K_OPERAND_UIMM16 :
730 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 16, 32, total_length, pc, & fields->f_uimm16);
731 break;
732 case OR1K_OPERAND_UIMM16_SPLIT :
733 {
734 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 5, 32, total_length, pc, & fields->f_imm16_25_5);
735 if (length <= 0) break;
736 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 11, 32, total_length, pc, & fields->f_imm16_10_11);
737 if (length <= 0) break;
738 FLD (f_uimm16_split) = ((UHI) (UINT) (((((FLD (f_imm16_25_5)) << (11))) | (FLD (f_imm16_10_11)))));
739 }
740 break;
741 case OR1K_OPERAND_UIMM6 :
742 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 6, 32, total_length, pc, & fields->f_uimm6);
743 break;
744
745 default :
746 /* xgettext:c-format */
747 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
748 opindex);
749 abort ();
750 }
751
752 return length;
753 }
754
755 cgen_insert_fn * const or1k_cgen_insert_handlers[] =
756 {
757 insert_insn_normal,
758 };
759
760 cgen_extract_fn * const or1k_cgen_extract_handlers[] =
761 {
762 extract_insn_normal,
763 };
764
765 int or1k_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
766 bfd_vma or1k_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
767
768 /* Getting values from cgen_fields is handled by a collection of functions.
769 They are distinguished by the type of the VALUE argument they return.
770 TODO: floating point, inlining support, remove cases where result type
771 not appropriate. */
772
773 int
or1k_cgen_get_int_operand(CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,int opindex,const CGEN_FIELDS * fields)774 or1k_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
775 int opindex,
776 const CGEN_FIELDS * fields)
777 {
778 int value;
779
780 switch (opindex)
781 {
782 case OR1K_OPERAND_DISP26 :
783 value = fields->f_disp26;
784 break;
785 case OR1K_OPERAND_RA :
786 value = fields->f_r2;
787 break;
788 case OR1K_OPERAND_RADF :
789 value = fields->f_r1;
790 break;
791 case OR1K_OPERAND_RASF :
792 value = fields->f_r2;
793 break;
794 case OR1K_OPERAND_RB :
795 value = fields->f_r3;
796 break;
797 case OR1K_OPERAND_RBDF :
798 value = fields->f_r1;
799 break;
800 case OR1K_OPERAND_RBSF :
801 value = fields->f_r3;
802 break;
803 case OR1K_OPERAND_RD :
804 value = fields->f_r1;
805 break;
806 case OR1K_OPERAND_RDDF :
807 value = fields->f_r1;
808 break;
809 case OR1K_OPERAND_RDSF :
810 value = fields->f_r1;
811 break;
812 case OR1K_OPERAND_SIMM16 :
813 value = fields->f_simm16;
814 break;
815 case OR1K_OPERAND_SIMM16_SPLIT :
816 value = fields->f_simm16_split;
817 break;
818 case OR1K_OPERAND_UIMM16 :
819 value = fields->f_uimm16;
820 break;
821 case OR1K_OPERAND_UIMM16_SPLIT :
822 value = fields->f_uimm16_split;
823 break;
824 case OR1K_OPERAND_UIMM6 :
825 value = fields->f_uimm6;
826 break;
827
828 default :
829 /* xgettext:c-format */
830 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
831 opindex);
832 abort ();
833 }
834
835 return value;
836 }
837
838 bfd_vma
or1k_cgen_get_vma_operand(CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,int opindex,const CGEN_FIELDS * fields)839 or1k_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
840 int opindex,
841 const CGEN_FIELDS * fields)
842 {
843 bfd_vma value;
844
845 switch (opindex)
846 {
847 case OR1K_OPERAND_DISP26 :
848 value = fields->f_disp26;
849 break;
850 case OR1K_OPERAND_RA :
851 value = fields->f_r2;
852 break;
853 case OR1K_OPERAND_RADF :
854 value = fields->f_r1;
855 break;
856 case OR1K_OPERAND_RASF :
857 value = fields->f_r2;
858 break;
859 case OR1K_OPERAND_RB :
860 value = fields->f_r3;
861 break;
862 case OR1K_OPERAND_RBDF :
863 value = fields->f_r1;
864 break;
865 case OR1K_OPERAND_RBSF :
866 value = fields->f_r3;
867 break;
868 case OR1K_OPERAND_RD :
869 value = fields->f_r1;
870 break;
871 case OR1K_OPERAND_RDDF :
872 value = fields->f_r1;
873 break;
874 case OR1K_OPERAND_RDSF :
875 value = fields->f_r1;
876 break;
877 case OR1K_OPERAND_SIMM16 :
878 value = fields->f_simm16;
879 break;
880 case OR1K_OPERAND_SIMM16_SPLIT :
881 value = fields->f_simm16_split;
882 break;
883 case OR1K_OPERAND_UIMM16 :
884 value = fields->f_uimm16;
885 break;
886 case OR1K_OPERAND_UIMM16_SPLIT :
887 value = fields->f_uimm16_split;
888 break;
889 case OR1K_OPERAND_UIMM6 :
890 value = fields->f_uimm6;
891 break;
892
893 default :
894 /* xgettext:c-format */
895 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
896 opindex);
897 abort ();
898 }
899
900 return value;
901 }
902
903 void or1k_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
904 void or1k_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
905
906 /* Stuffing values in cgen_fields is handled by a collection of functions.
907 They are distinguished by the type of the VALUE argument they accept.
908 TODO: floating point, inlining support, remove cases where argument type
909 not appropriate. */
910
911 void
or1k_cgen_set_int_operand(CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,int opindex,CGEN_FIELDS * fields,int value)912 or1k_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
913 int opindex,
914 CGEN_FIELDS * fields,
915 int value)
916 {
917 switch (opindex)
918 {
919 case OR1K_OPERAND_DISP26 :
920 fields->f_disp26 = value;
921 break;
922 case OR1K_OPERAND_RA :
923 fields->f_r2 = value;
924 break;
925 case OR1K_OPERAND_RADF :
926 fields->f_r1 = value;
927 break;
928 case OR1K_OPERAND_RASF :
929 fields->f_r2 = value;
930 break;
931 case OR1K_OPERAND_RB :
932 fields->f_r3 = value;
933 break;
934 case OR1K_OPERAND_RBDF :
935 fields->f_r1 = value;
936 break;
937 case OR1K_OPERAND_RBSF :
938 fields->f_r3 = value;
939 break;
940 case OR1K_OPERAND_RD :
941 fields->f_r1 = value;
942 break;
943 case OR1K_OPERAND_RDDF :
944 fields->f_r1 = value;
945 break;
946 case OR1K_OPERAND_RDSF :
947 fields->f_r1 = value;
948 break;
949 case OR1K_OPERAND_SIMM16 :
950 fields->f_simm16 = value;
951 break;
952 case OR1K_OPERAND_SIMM16_SPLIT :
953 fields->f_simm16_split = value;
954 break;
955 case OR1K_OPERAND_UIMM16 :
956 fields->f_uimm16 = value;
957 break;
958 case OR1K_OPERAND_UIMM16_SPLIT :
959 fields->f_uimm16_split = value;
960 break;
961 case OR1K_OPERAND_UIMM6 :
962 fields->f_uimm6 = value;
963 break;
964
965 default :
966 /* xgettext:c-format */
967 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
968 opindex);
969 abort ();
970 }
971 }
972
973 void
or1k_cgen_set_vma_operand(CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,int opindex,CGEN_FIELDS * fields,bfd_vma value)974 or1k_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
975 int opindex,
976 CGEN_FIELDS * fields,
977 bfd_vma value)
978 {
979 switch (opindex)
980 {
981 case OR1K_OPERAND_DISP26 :
982 fields->f_disp26 = value;
983 break;
984 case OR1K_OPERAND_RA :
985 fields->f_r2 = value;
986 break;
987 case OR1K_OPERAND_RADF :
988 fields->f_r1 = value;
989 break;
990 case OR1K_OPERAND_RASF :
991 fields->f_r2 = value;
992 break;
993 case OR1K_OPERAND_RB :
994 fields->f_r3 = value;
995 break;
996 case OR1K_OPERAND_RBDF :
997 fields->f_r1 = value;
998 break;
999 case OR1K_OPERAND_RBSF :
1000 fields->f_r3 = value;
1001 break;
1002 case OR1K_OPERAND_RD :
1003 fields->f_r1 = value;
1004 break;
1005 case OR1K_OPERAND_RDDF :
1006 fields->f_r1 = value;
1007 break;
1008 case OR1K_OPERAND_RDSF :
1009 fields->f_r1 = value;
1010 break;
1011 case OR1K_OPERAND_SIMM16 :
1012 fields->f_simm16 = value;
1013 break;
1014 case OR1K_OPERAND_SIMM16_SPLIT :
1015 fields->f_simm16_split = value;
1016 break;
1017 case OR1K_OPERAND_UIMM16 :
1018 fields->f_uimm16 = value;
1019 break;
1020 case OR1K_OPERAND_UIMM16_SPLIT :
1021 fields->f_uimm16_split = value;
1022 break;
1023 case OR1K_OPERAND_UIMM6 :
1024 fields->f_uimm6 = value;
1025 break;
1026
1027 default :
1028 /* xgettext:c-format */
1029 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
1030 opindex);
1031 abort ();
1032 }
1033 }
1034
1035 /* Function to call before using the instruction builder tables. */
1036
1037 void
or1k_cgen_init_ibld_table(CGEN_CPU_DESC cd)1038 or1k_cgen_init_ibld_table (CGEN_CPU_DESC cd)
1039 {
1040 cd->insert_handlers = & or1k_cgen_insert_handlers[0];
1041 cd->extract_handlers = & or1k_cgen_extract_handlers[0];
1042
1043 cd->insert_operand = or1k_cgen_insert_operand;
1044 cd->extract_operand = or1k_cgen_extract_operand;
1045
1046 cd->get_int_operand = or1k_cgen_get_int_operand;
1047 cd->set_int_operand = or1k_cgen_set_int_operand;
1048 cd->get_vma_operand = or1k_cgen_get_vma_operand;
1049 cd->set_vma_operand = or1k_cgen_set_vma_operand;
1050 }
1051