1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
4 
5 #ifndef V8_X64_ASSEMBLER_X64_INL_H_
6 #define V8_X64_ASSEMBLER_X64_INL_H_
7 
8 #include "src/x64/assembler-x64.h"
9 
10 #include "src/base/cpu.h"
11 #include "src/debug/debug.h"
12 #include "src/v8memory.h"
13 
14 namespace v8 {
15 namespace internal {
16 
SupportsCrankshaft()17 bool CpuFeatures::SupportsCrankshaft() { return true; }
18 
SupportsSimd128()19 bool CpuFeatures::SupportsSimd128() { return false; }
20 
21 // -----------------------------------------------------------------------------
22 // Implementation of Assembler
23 
24 
25 static const byte kCallOpcode = 0xE8;
26 // The length of pushq(rbp), movp(rbp, rsp), Push(rsi) and Push(rdi).
27 static const int kNoCodeAgeSequenceLength = kPointerSize == kInt64Size ? 6 : 17;
28 
29 
emitl(uint32_t x)30 void Assembler::emitl(uint32_t x) {
31   Memory::uint32_at(pc_) = x;
32   pc_ += sizeof(uint32_t);
33 }
34 
35 
emitp(void * x,RelocInfo::Mode rmode)36 void Assembler::emitp(void* x, RelocInfo::Mode rmode) {
37   uintptr_t value = reinterpret_cast<uintptr_t>(x);
38   Memory::uintptr_at(pc_) = value;
39   if (!RelocInfo::IsNone(rmode)) {
40     RecordRelocInfo(rmode, value);
41   }
42   pc_ += sizeof(uintptr_t);
43 }
44 
45 
emitq(uint64_t x)46 void Assembler::emitq(uint64_t x) {
47   Memory::uint64_at(pc_) = x;
48   pc_ += sizeof(uint64_t);
49 }
50 
51 
emitw(uint16_t x)52 void Assembler::emitw(uint16_t x) {
53   Memory::uint16_at(pc_) = x;
54   pc_ += sizeof(uint16_t);
55 }
56 
57 
emit_code_target(Handle<Code> target,RelocInfo::Mode rmode,TypeFeedbackId ast_id)58 void Assembler::emit_code_target(Handle<Code> target,
59                                  RelocInfo::Mode rmode,
60                                  TypeFeedbackId ast_id) {
61   DCHECK(RelocInfo::IsCodeTarget(rmode) ||
62       rmode == RelocInfo::CODE_AGE_SEQUENCE);
63   if (rmode == RelocInfo::CODE_TARGET && !ast_id.IsNone()) {
64     RecordRelocInfo(RelocInfo::CODE_TARGET_WITH_ID, ast_id.ToInt());
65   } else {
66     RecordRelocInfo(rmode);
67   }
68   int current = code_targets_.length();
69   if (current > 0 && code_targets_.last().address() == target.address()) {
70     // Optimization if we keep jumping to the same code target.
71     emitl(current - 1);
72   } else {
73     code_targets_.Add(target);
74     emitl(current);
75   }
76 }
77 
78 
emit_runtime_entry(Address entry,RelocInfo::Mode rmode)79 void Assembler::emit_runtime_entry(Address entry, RelocInfo::Mode rmode) {
80   DCHECK(RelocInfo::IsRuntimeEntry(rmode));
81   RecordRelocInfo(rmode);
82   emitl(static_cast<uint32_t>(
83       entry - isolate()->heap()->memory_allocator()->code_range()->start()));
84 }
85 
86 
emit_rex_64(Register reg,Register rm_reg)87 void Assembler::emit_rex_64(Register reg, Register rm_reg) {
88   emit(0x48 | reg.high_bit() << 2 | rm_reg.high_bit());
89 }
90 
91 
emit_rex_64(XMMRegister reg,Register rm_reg)92 void Assembler::emit_rex_64(XMMRegister reg, Register rm_reg) {
93   emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
94 }
95 
96 
emit_rex_64(Register reg,XMMRegister rm_reg)97 void Assembler::emit_rex_64(Register reg, XMMRegister rm_reg) {
98   emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
99 }
100 
101 
emit_rex_64(Register reg,const Operand & op)102 void Assembler::emit_rex_64(Register reg, const Operand& op) {
103   emit(0x48 | reg.high_bit() << 2 | op.rex_);
104 }
105 
106 
emit_rex_64(XMMRegister reg,const Operand & op)107 void Assembler::emit_rex_64(XMMRegister reg, const Operand& op) {
108   emit(0x48 | (reg.code() & 0x8) >> 1 | op.rex_);
109 }
110 
111 
emit_rex_64(Register rm_reg)112 void Assembler::emit_rex_64(Register rm_reg) {
113   DCHECK_EQ(rm_reg.code() & 0xf, rm_reg.code());
114   emit(0x48 | rm_reg.high_bit());
115 }
116 
117 
emit_rex_64(const Operand & op)118 void Assembler::emit_rex_64(const Operand& op) {
119   emit(0x48 | op.rex_);
120 }
121 
122 
emit_rex_32(Register reg,Register rm_reg)123 void Assembler::emit_rex_32(Register reg, Register rm_reg) {
124   emit(0x40 | reg.high_bit() << 2 | rm_reg.high_bit());
125 }
126 
127 
emit_rex_32(Register reg,const Operand & op)128 void Assembler::emit_rex_32(Register reg, const Operand& op) {
129   emit(0x40 | reg.high_bit() << 2  | op.rex_);
130 }
131 
132 
emit_rex_32(Register rm_reg)133 void Assembler::emit_rex_32(Register rm_reg) {
134   emit(0x40 | rm_reg.high_bit());
135 }
136 
137 
emit_rex_32(const Operand & op)138 void Assembler::emit_rex_32(const Operand& op) {
139   emit(0x40 | op.rex_);
140 }
141 
142 
emit_optional_rex_32(Register reg,Register rm_reg)143 void Assembler::emit_optional_rex_32(Register reg, Register rm_reg) {
144   byte rex_bits = reg.high_bit() << 2 | rm_reg.high_bit();
145   if (rex_bits != 0) emit(0x40 | rex_bits);
146 }
147 
148 
emit_optional_rex_32(Register reg,const Operand & op)149 void Assembler::emit_optional_rex_32(Register reg, const Operand& op) {
150   byte rex_bits =  reg.high_bit() << 2 | op.rex_;
151   if (rex_bits != 0) emit(0x40 | rex_bits);
152 }
153 
154 
emit_optional_rex_32(XMMRegister reg,const Operand & op)155 void Assembler::emit_optional_rex_32(XMMRegister reg, const Operand& op) {
156   byte rex_bits =  (reg.code() & 0x8) >> 1 | op.rex_;
157   if (rex_bits != 0) emit(0x40 | rex_bits);
158 }
159 
160 
emit_optional_rex_32(XMMRegister reg,XMMRegister base)161 void Assembler::emit_optional_rex_32(XMMRegister reg, XMMRegister base) {
162   byte rex_bits =  (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3;
163   if (rex_bits != 0) emit(0x40 | rex_bits);
164 }
165 
166 
emit_optional_rex_32(XMMRegister reg,Register base)167 void Assembler::emit_optional_rex_32(XMMRegister reg, Register base) {
168   byte rex_bits =  (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3;
169   if (rex_bits != 0) emit(0x40 | rex_bits);
170 }
171 
172 
emit_optional_rex_32(Register reg,XMMRegister base)173 void Assembler::emit_optional_rex_32(Register reg, XMMRegister base) {
174   byte rex_bits =  (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3;
175   if (rex_bits != 0) emit(0x40 | rex_bits);
176 }
177 
178 
emit_optional_rex_32(Register rm_reg)179 void Assembler::emit_optional_rex_32(Register rm_reg) {
180   if (rm_reg.high_bit()) emit(0x41);
181 }
182 
emit_optional_rex_32(XMMRegister rm_reg)183 void Assembler::emit_optional_rex_32(XMMRegister rm_reg) {
184   if (rm_reg.high_bit()) emit(0x41);
185 }
186 
emit_optional_rex_32(const Operand & op)187 void Assembler::emit_optional_rex_32(const Operand& op) {
188   if (op.rex_ != 0) emit(0x40 | op.rex_);
189 }
190 
191 
192 // byte 1 of 3-byte VEX
emit_vex3_byte1(XMMRegister reg,XMMRegister rm,LeadingOpcode m)193 void Assembler::emit_vex3_byte1(XMMRegister reg, XMMRegister rm,
194                                 LeadingOpcode m) {
195   byte rxb = ~((reg.high_bit() << 2) | rm.high_bit()) << 5;
196   emit(rxb | m);
197 }
198 
199 
200 // byte 1 of 3-byte VEX
emit_vex3_byte1(XMMRegister reg,const Operand & rm,LeadingOpcode m)201 void Assembler::emit_vex3_byte1(XMMRegister reg, const Operand& rm,
202                                 LeadingOpcode m) {
203   byte rxb = ~((reg.high_bit() << 2) | rm.rex_) << 5;
204   emit(rxb | m);
205 }
206 
207 
208 // byte 1 of 2-byte VEX
emit_vex2_byte1(XMMRegister reg,XMMRegister v,VectorLength l,SIMDPrefix pp)209 void Assembler::emit_vex2_byte1(XMMRegister reg, XMMRegister v, VectorLength l,
210                                 SIMDPrefix pp) {
211   byte rv = ~((reg.high_bit() << 4) | v.code()) << 3;
212   emit(rv | l | pp);
213 }
214 
215 
216 // byte 2 of 3-byte VEX
emit_vex3_byte2(VexW w,XMMRegister v,VectorLength l,SIMDPrefix pp)217 void Assembler::emit_vex3_byte2(VexW w, XMMRegister v, VectorLength l,
218                                 SIMDPrefix pp) {
219   emit(w | ((~v.code() & 0xf) << 3) | l | pp);
220 }
221 
222 
emit_vex_prefix(XMMRegister reg,XMMRegister vreg,XMMRegister rm,VectorLength l,SIMDPrefix pp,LeadingOpcode mm,VexW w)223 void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg,
224                                 XMMRegister rm, VectorLength l, SIMDPrefix pp,
225                                 LeadingOpcode mm, VexW w) {
226   if (rm.high_bit() || mm != k0F || w != kW0) {
227     emit_vex3_byte0();
228     emit_vex3_byte1(reg, rm, mm);
229     emit_vex3_byte2(w, vreg, l, pp);
230   } else {
231     emit_vex2_byte0();
232     emit_vex2_byte1(reg, vreg, l, pp);
233   }
234 }
235 
236 
emit_vex_prefix(Register reg,Register vreg,Register rm,VectorLength l,SIMDPrefix pp,LeadingOpcode mm,VexW w)237 void Assembler::emit_vex_prefix(Register reg, Register vreg, Register rm,
238                                 VectorLength l, SIMDPrefix pp, LeadingOpcode mm,
239                                 VexW w) {
240   XMMRegister ireg = {reg.code()};
241   XMMRegister ivreg = {vreg.code()};
242   XMMRegister irm = {rm.code()};
243   emit_vex_prefix(ireg, ivreg, irm, l, pp, mm, w);
244 }
245 
246 
emit_vex_prefix(XMMRegister reg,XMMRegister vreg,const Operand & rm,VectorLength l,SIMDPrefix pp,LeadingOpcode mm,VexW w)247 void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg,
248                                 const Operand& rm, VectorLength l,
249                                 SIMDPrefix pp, LeadingOpcode mm, VexW w) {
250   if (rm.rex_ || mm != k0F || w != kW0) {
251     emit_vex3_byte0();
252     emit_vex3_byte1(reg, rm, mm);
253     emit_vex3_byte2(w, vreg, l, pp);
254   } else {
255     emit_vex2_byte0();
256     emit_vex2_byte1(reg, vreg, l, pp);
257   }
258 }
259 
260 
emit_vex_prefix(Register reg,Register vreg,const Operand & rm,VectorLength l,SIMDPrefix pp,LeadingOpcode mm,VexW w)261 void Assembler::emit_vex_prefix(Register reg, Register vreg, const Operand& rm,
262                                 VectorLength l, SIMDPrefix pp, LeadingOpcode mm,
263                                 VexW w) {
264   XMMRegister ireg = {reg.code()};
265   XMMRegister ivreg = {vreg.code()};
266   emit_vex_prefix(ireg, ivreg, rm, l, pp, mm, w);
267 }
268 
269 
target_address_at(Address pc,Address constant_pool)270 Address Assembler::target_address_at(Address pc, Address constant_pool) {
271   return Memory::int32_at(pc) + pc + 4;
272 }
273 
274 
set_target_address_at(Isolate * isolate,Address pc,Address constant_pool,Address target,ICacheFlushMode icache_flush_mode)275 void Assembler::set_target_address_at(Isolate* isolate, Address pc,
276                                       Address constant_pool, Address target,
277                                       ICacheFlushMode icache_flush_mode) {
278   Memory::int32_at(pc) = static_cast<int32_t>(target - pc - 4);
279   if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
280     Assembler::FlushICache(isolate, pc, sizeof(int32_t));
281   }
282 }
283 
284 
deserialization_set_target_internal_reference_at(Isolate * isolate,Address pc,Address target,RelocInfo::Mode mode)285 void Assembler::deserialization_set_target_internal_reference_at(
286     Isolate* isolate, Address pc, Address target, RelocInfo::Mode mode) {
287   Memory::Address_at(pc) = target;
288 }
289 
290 
target_address_from_return_address(Address pc)291 Address Assembler::target_address_from_return_address(Address pc) {
292   return pc - kCallTargetAddressOffset;
293 }
294 
295 
code_target_object_handle_at(Address pc)296 Handle<Object> Assembler::code_target_object_handle_at(Address pc) {
297   return code_targets_[Memory::int32_at(pc)];
298 }
299 
300 
runtime_entry_at(Address pc)301 Address Assembler::runtime_entry_at(Address pc) {
302   return Memory::int32_at(pc) +
303          isolate()->heap()->memory_allocator()->code_range()->start();
304 }
305 
306 // -----------------------------------------------------------------------------
307 // Implementation of RelocInfo
308 
309 // The modes possibly affected by apply must be in kApplyMask.
apply(intptr_t delta)310 void RelocInfo::apply(intptr_t delta) {
311   if (IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)) {
312     Memory::int32_at(pc_) -= static_cast<int32_t>(delta);
313   } else if (IsCodeAgeSequence(rmode_)) {
314     if (*pc_ == kCallOpcode) {
315       int32_t* p = reinterpret_cast<int32_t*>(pc_ + 1);
316       *p -= static_cast<int32_t>(delta);  // Relocate entry.
317     }
318   } else if (IsInternalReference(rmode_)) {
319     // absolute code pointer inside code object moves with the code object.
320     Memory::Address_at(pc_) += delta;
321   }
322 }
323 
324 
target_address()325 Address RelocInfo::target_address() {
326   DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
327   return Assembler::target_address_at(pc_, host_);
328 }
329 
target_address_address()330 Address RelocInfo::target_address_address() {
331   DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)
332                               || rmode_ == EMBEDDED_OBJECT
333                               || rmode_ == EXTERNAL_REFERENCE);
334   return reinterpret_cast<Address>(pc_);
335 }
336 
337 
constant_pool_entry_address()338 Address RelocInfo::constant_pool_entry_address() {
339   UNREACHABLE();
340   return NULL;
341 }
342 
343 
target_address_size()344 int RelocInfo::target_address_size() {
345   if (IsCodedSpecially()) {
346     return Assembler::kSpecialTargetSize;
347   } else {
348     return kPointerSize;
349   }
350 }
351 
352 
target_object()353 Object* RelocInfo::target_object() {
354   DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
355   return Memory::Object_at(pc_);
356 }
357 
358 
target_object_handle(Assembler * origin)359 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) {
360   DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
361   if (rmode_ == EMBEDDED_OBJECT) {
362     return Memory::Object_Handle_at(pc_);
363   } else {
364     return origin->code_target_object_handle_at(pc_);
365   }
366 }
367 
368 
target_external_reference()369 Address RelocInfo::target_external_reference() {
370   DCHECK(rmode_ == RelocInfo::EXTERNAL_REFERENCE);
371   return Memory::Address_at(pc_);
372 }
373 
374 
target_internal_reference()375 Address RelocInfo::target_internal_reference() {
376   DCHECK(rmode_ == INTERNAL_REFERENCE);
377   return Memory::Address_at(pc_);
378 }
379 
380 
target_internal_reference_address()381 Address RelocInfo::target_internal_reference_address() {
382   DCHECK(rmode_ == INTERNAL_REFERENCE);
383   return reinterpret_cast<Address>(pc_);
384 }
385 
386 
set_target_object(Object * target,WriteBarrierMode write_barrier_mode,ICacheFlushMode icache_flush_mode)387 void RelocInfo::set_target_object(Object* target,
388                                   WriteBarrierMode write_barrier_mode,
389                                   ICacheFlushMode icache_flush_mode) {
390   DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
391   Memory::Object_at(pc_) = target;
392   if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
393     Assembler::FlushICache(isolate_, pc_, sizeof(Address));
394   }
395   if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
396       host() != NULL &&
397       target->IsHeapObject()) {
398     host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
399         host(), this, HeapObject::cast(target));
400     host()->GetHeap()->RecordWriteIntoCode(host(), this, target);
401   }
402 }
403 
404 
target_runtime_entry(Assembler * origin)405 Address RelocInfo::target_runtime_entry(Assembler* origin) {
406   DCHECK(IsRuntimeEntry(rmode_));
407   return origin->runtime_entry_at(pc_);
408 }
409 
410 
set_target_runtime_entry(Address target,WriteBarrierMode write_barrier_mode,ICacheFlushMode icache_flush_mode)411 void RelocInfo::set_target_runtime_entry(Address target,
412                                          WriteBarrierMode write_barrier_mode,
413                                          ICacheFlushMode icache_flush_mode) {
414   DCHECK(IsRuntimeEntry(rmode_));
415   if (target_address() != target) {
416     set_target_address(target, write_barrier_mode, icache_flush_mode);
417   }
418 }
419 
420 
target_cell_handle()421 Handle<Cell> RelocInfo::target_cell_handle() {
422   DCHECK(rmode_ == RelocInfo::CELL);
423   Address address = Memory::Address_at(pc_);
424   return Handle<Cell>(reinterpret_cast<Cell**>(address));
425 }
426 
427 
target_cell()428 Cell* RelocInfo::target_cell() {
429   DCHECK(rmode_ == RelocInfo::CELL);
430   return Cell::FromValueAddress(Memory::Address_at(pc_));
431 }
432 
433 
set_target_cell(Cell * cell,WriteBarrierMode write_barrier_mode,ICacheFlushMode icache_flush_mode)434 void RelocInfo::set_target_cell(Cell* cell,
435                                 WriteBarrierMode write_barrier_mode,
436                                 ICacheFlushMode icache_flush_mode) {
437   DCHECK(rmode_ == RelocInfo::CELL);
438   Address address = cell->address() + Cell::kValueOffset;
439   Memory::Address_at(pc_) = address;
440   if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
441     Assembler::FlushICache(isolate_, pc_, sizeof(Address));
442   }
443   if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
444       host() != NULL) {
445     host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(host(), this,
446                                                                   cell);
447   }
448 }
449 
450 
WipeOut()451 void RelocInfo::WipeOut() {
452   if (IsEmbeddedObject(rmode_) || IsExternalReference(rmode_) ||
453       IsInternalReference(rmode_)) {
454     Memory::Address_at(pc_) = NULL;
455   } else if (IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)) {
456     // Effectively write zero into the relocation.
457     Assembler::set_target_address_at(isolate_, pc_, host_,
458                                      pc_ + sizeof(int32_t));
459   } else {
460     UNREACHABLE();
461   }
462 }
463 
464 
code_age_stub_handle(Assembler * origin)465 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) {
466   DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
467   DCHECK(*pc_ == kCallOpcode);
468   return origin->code_target_object_handle_at(pc_ + 1);
469 }
470 
471 
code_age_stub()472 Code* RelocInfo::code_age_stub() {
473   DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
474   DCHECK(*pc_ == kCallOpcode);
475   return Code::GetCodeFromTargetAddress(
476       Assembler::target_address_at(pc_ + 1, host_));
477 }
478 
479 
set_code_age_stub(Code * stub,ICacheFlushMode icache_flush_mode)480 void RelocInfo::set_code_age_stub(Code* stub,
481                                   ICacheFlushMode icache_flush_mode) {
482   DCHECK(*pc_ == kCallOpcode);
483   DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
484   Assembler::set_target_address_at(
485       isolate_, pc_ + 1, host_, stub->instruction_start(), icache_flush_mode);
486 }
487 
488 
debug_call_address()489 Address RelocInfo::debug_call_address() {
490   DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence());
491   return Memory::Address_at(pc_ + Assembler::kPatchDebugBreakSlotAddressOffset);
492 }
493 
494 
set_debug_call_address(Address target)495 void RelocInfo::set_debug_call_address(Address target) {
496   DCHECK(IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence());
497   Memory::Address_at(pc_ + Assembler::kPatchDebugBreakSlotAddressOffset) =
498       target;
499   Assembler::FlushICache(isolate_,
500                          pc_ + Assembler::kPatchDebugBreakSlotAddressOffset,
501                          sizeof(Address));
502   if (host() != NULL) {
503     Object* target_code = Code::GetCodeFromTargetAddress(target);
504     host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
505         host(), this, HeapObject::cast(target_code));
506   }
507 }
508 
509 template <typename ObjectVisitor>
Visit(Isolate * isolate,ObjectVisitor * visitor)510 void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) {
511   RelocInfo::Mode mode = rmode();
512   if (mode == RelocInfo::EMBEDDED_OBJECT) {
513     visitor->VisitEmbeddedPointer(this);
514     Assembler::FlushICache(isolate, pc_, sizeof(Address));
515   } else if (RelocInfo::IsCodeTarget(mode)) {
516     visitor->VisitCodeTarget(this);
517   } else if (mode == RelocInfo::CELL) {
518     visitor->VisitCell(this);
519   } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
520     visitor->VisitExternalReference(this);
521   } else if (mode == RelocInfo::INTERNAL_REFERENCE) {
522     visitor->VisitInternalReference(this);
523   } else if (RelocInfo::IsCodeAgeSequence(mode)) {
524     visitor->VisitCodeAgeSequence(this);
525   } else if (RelocInfo::IsDebugBreakSlot(mode) &&
526              IsPatchedDebugBreakSlotSequence()) {
527     visitor->VisitDebugTarget(this);
528   } else if (RelocInfo::IsRuntimeEntry(mode)) {
529     visitor->VisitRuntimeEntry(this);
530   }
531 }
532 
533 
534 template<typename StaticVisitor>
Visit(Heap * heap)535 void RelocInfo::Visit(Heap* heap) {
536   RelocInfo::Mode mode = rmode();
537   if (mode == RelocInfo::EMBEDDED_OBJECT) {
538     StaticVisitor::VisitEmbeddedPointer(heap, this);
539     Assembler::FlushICache(heap->isolate(), pc_, sizeof(Address));
540   } else if (RelocInfo::IsCodeTarget(mode)) {
541     StaticVisitor::VisitCodeTarget(heap, this);
542   } else if (mode == RelocInfo::CELL) {
543     StaticVisitor::VisitCell(heap, this);
544   } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
545     StaticVisitor::VisitExternalReference(this);
546   } else if (mode == RelocInfo::INTERNAL_REFERENCE) {
547     StaticVisitor::VisitInternalReference(this);
548   } else if (RelocInfo::IsCodeAgeSequence(mode)) {
549     StaticVisitor::VisitCodeAgeSequence(heap, this);
550   } else if (RelocInfo::IsDebugBreakSlot(mode) &&
551              IsPatchedDebugBreakSlotSequence()) {
552     StaticVisitor::VisitDebugTarget(heap, this);
553   } else if (RelocInfo::IsRuntimeEntry(mode)) {
554     StaticVisitor::VisitRuntimeEntry(this);
555   }
556 }
557 
558 
559 // -----------------------------------------------------------------------------
560 // Implementation of Operand
561 
set_modrm(int mod,Register rm_reg)562 void Operand::set_modrm(int mod, Register rm_reg) {
563   DCHECK(is_uint2(mod));
564   buf_[0] = mod << 6 | rm_reg.low_bits();
565   // Set REX.B to the high bit of rm.code().
566   rex_ |= rm_reg.high_bit();
567 }
568 
569 
set_sib(ScaleFactor scale,Register index,Register base)570 void Operand::set_sib(ScaleFactor scale, Register index, Register base) {
571   DCHECK(len_ == 1);
572   DCHECK(is_uint2(scale));
573   // Use SIB with no index register only for base rsp or r12. Otherwise we
574   // would skip the SIB byte entirely.
575   DCHECK(!index.is(rsp) || base.is(rsp) || base.is(r12));
576   buf_[1] = (scale << 6) | (index.low_bits() << 3) | base.low_bits();
577   rex_ |= index.high_bit() << 1 | base.high_bit();
578   len_ = 2;
579 }
580 
set_disp8(int disp)581 void Operand::set_disp8(int disp) {
582   DCHECK(is_int8(disp));
583   DCHECK(len_ == 1 || len_ == 2);
584   int8_t* p = reinterpret_cast<int8_t*>(&buf_[len_]);
585   *p = disp;
586   len_ += sizeof(int8_t);
587 }
588 
set_disp32(int disp)589 void Operand::set_disp32(int disp) {
590   DCHECK(len_ == 1 || len_ == 2);
591   int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]);
592   *p = disp;
593   len_ += sizeof(int32_t);
594 }
595 
set_disp64(int64_t disp)596 void Operand::set_disp64(int64_t disp) {
597   DCHECK_EQ(1, len_);
598   int64_t* p = reinterpret_cast<int64_t*>(&buf_[len_]);
599   *p = disp;
600   len_ += sizeof(disp);
601 }
602 }  // namespace internal
603 }  // namespace v8
604 
605 #endif  // V8_X64_ASSEMBLER_X64_INL_H_
606