Searched refs:Interrupts (Results 1 – 6 of 6) sorted by relevance
245 UINT32 Interrupts; in ArmGicIsInterruptEnabled() local253 …Interrupts = ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)) & (1 << RegShif… in ArmGicIsInterruptEnabled()261 …Interrupts = MmioRead32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER +… in ArmGicIsInterruptEnabled()264 return ((Interrupts & (1 << RegShift)) != 0); in ArmGicIsInterruptEnabled()
8 Interrupts: INT1 (PB6), INT2 (unused)
976 UINT32 Interrupts; in SnpGetStatus() local1066 Interrupts = MmioRead32 (LAN9118_INT_STS); in SnpGetStatus()1067 if (Interrupts & INSTS_TXE) { in SnpGetStatus()
16 // Interrupts can be DEB8=all except 13,8,6,2,1,0
12 + [Secure-EL1 Interrupts](#1231-secure-el1-interrupts)13 + [Non-secure Interrupts](#1232-non-secure-interrupts)472 2. __CSS=1, TEL3=1__. Interrupts are routed to EL3 when execution is in
352 // re-arm any AP Thermal Interrupts.