Searched refs:PCI_COMMAND_OFFSET (Results 1 – 13 of 13) sorted by relevance
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ |
| D | PciCommand.h | 152 PciOperateRegister (a, 0, PCI_COMMAND_OFFSET, EFI_GET_REGISTER, b)
164 PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_SET_REGISTER, NULL)
176 PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL)
188 PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_DISABLE_REGISTER, NULL)
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| /device/linaro/bootloader/edk2/DuetPkg/PciBusNoEnumerationDxe/ |
| D | PciCommand.c | 53 PCI_COMMAND_OFFSET, in PciReadCommandRegister()
85 PCI_COMMAND_OFFSET, in PciSetCommandRegister()
119 PCI_COMMAND_OFFSET, in PciEnableCommandRegister()
129 PCI_COMMAND_OFFSET, in PciEnableCommandRegister()
163 PCI_COMMAND_OFFSET, in PciDisableCommandRegister()
173 PCI_COMMAND_OFFSET, in PciDisableCommandRegister()
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| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Library/IohLib/ |
| D | IohLib.c | 85 SaveCmdReg = PciRead16 (GipAddr + PCI_COMMAND_OFFSET); in ReadIohGpioValues()
92 PciWrite8 ( GipAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE); in ReadIohGpioValues()
101 PciWrite16 (GipAddr + PCI_COMMAND_OFFSET, SaveCmdReg); in ReadIohGpioValues()
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| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/UfsPciHcPei/ |
| D | UfsPciHcPei.c | 125 …PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16)~(EFI_PCI_COMMAND_B… in InitializeUfsHcPeim()
133 …PciOr16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (EFI_PCI_COMMAND_BUS_MASTER … in InitializeUfsHcPeim()
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| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/ |
| D | PlatformEarlyInit.c | 141 SaveCmdReg = PciRead16 (DevPcieAddr + PCI_COMMAND_OFFSET); in SetLanControllerMacAddr()
148 PciWrite8 ( DevPcieAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE); in SetLanControllerMacAddr()
192 PciWrite16 (DevPcieAddr + PCI_COMMAND_OFFSET, SaveCmdReg); in SetLanControllerMacAddr()
988 SaveCmdReg = PciRead16 (DevPcieAddr + PCI_COMMAND_OFFSET); in EarlyPlatformGpioCtrlerInitAndManipulation()
995 PciWrite8 ( DevPcieAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE); in EarlyPlatformGpioCtrlerInitAndManipulation()
1095 PciWrite16 (DevPcieAddr + PCI_COMMAND_OFFSET, SaveCmdReg); in EarlyPlatformGpioCtrlerInitAndManipulation()
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| /device/linaro/bootloader/edk2/OvmfPkg/PlatformPei/ |
| D | Platform.c | 343 PmCmd = POWER_MGMT_REGISTER_PIIX4 (PCI_COMMAND_OFFSET); in MiscInitialization()
349 PmCmd = POWER_MGMT_REGISTER_Q35 (PCI_COMMAND_OFFSET); in MiscInitialization()
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| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb/ |
| D | DebugCommunicationLibUsb.c | 552 PciCmd = PciRead16 (PcdGet32(PcdUsbEhciPciAddress) + PCI_COMMAND_OFFSET); in NeedReinitializeHardware()
555 PciWrite16(PcdGet32(PcdUsbEhciPciAddress) + PCI_COMMAND_OFFSET, PciCmd); in NeedReinitializeHardware()
609 PciCmd = PciRead16 (PcdGet32(PcdUsbEhciPciAddress) + PCI_COMMAND_OFFSET); in InitializeUsbDebugHardware()
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformSmm/ |
| D | Platform.c | 478 PCI_COMMAND_OFFSET
487 PCI_COMMAND_OFFSET
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| /device/linaro/bootloader/edk2/MdeModulePkg/Library/BaseSerialPortLib16550/ |
| D | BaseSerialPortLib16550.c | 360 PciLibAddress + PCI_COMMAND_OFFSET, in GetSerialRegisterBase()
396 PciLibAddress + PCI_COMMAND_OFFSET, in GetSerialRegisterBase()
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| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/ |
| D | DebugCommunicationLibUsb3Common.c | 180 PciCmd = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_COMMAND_OFFSET); in ProgramXhciBaseAddress()
183 PciWrite16(PcdGet32(PcdUsbXhciPciAddress) + PCI_COMMAND_OFFSET, PciCmd); in ProgramXhciBaseAddress()
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| /device/linaro/bootloader/edk2/BaseTools/Source/C/Include/IndustryStandard/ |
| D | pci22.h | 293 #define PCI_COMMAND_OFFSET 0x04 macro
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Include/IndustryStandard/ |
| D | pci22.h | 304 #define PCI_COMMAND_OFFSET 0x04 macro
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| /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/ |
| D | Pci22.h | 528 #define PCI_COMMAND_OFFSET 0x04 macro
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