1 /** @file
2 UfsPciHcPei driver is used to provide platform-dependent info, mainly UFS host controller
3 MMIO base, to upper layer UFS drivers.
4
5 Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php.
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #include "UfsPciHcPei.h"
17
18 EDKII_UFS_HOST_CONTROLLER_PPI mUfsHostControllerPpi = { GetUfsHcMmioBar };
19
20 EFI_PEI_PPI_DESCRIPTOR mPpiList = {
21 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
22 &gEdkiiPeiUfsHostControllerPpiGuid,
23 &mUfsHostControllerPpi
24 };
25
26 /**
27 Get the MMIO base address of UFS host controller.
28
29 @param[in] This The protocol instance pointer.
30 @param[in] ControllerId The ID of the UFS host controller.
31 @param[out] MmioBar Pointer to the UFS host controller MMIO base address.
32
33 @retval EFI_SUCCESS The operation succeeds.
34 @retval EFI_INVALID_PARAMETER The parameters are invalid.
35
36 **/
37 EFI_STATUS
38 EFIAPI
GetUfsHcMmioBar(IN EDKII_UFS_HOST_CONTROLLER_PPI * This,IN UINT8 ControllerId,OUT UINTN * MmioBar)39 GetUfsHcMmioBar (
40 IN EDKII_UFS_HOST_CONTROLLER_PPI *This,
41 IN UINT8 ControllerId,
42 OUT UINTN *MmioBar
43 )
44 {
45 UFS_HC_PEI_PRIVATE_DATA *Private;
46
47 if ((This == NULL) || (MmioBar == NULL)) {
48 return EFI_INVALID_PARAMETER;
49 }
50
51 Private = UFS_HC_PEI_PRIVATE_DATA_FROM_THIS (This);
52
53 if (ControllerId >= Private->TotalUfsHcs) {
54 return EFI_INVALID_PARAMETER;
55 }
56
57 *MmioBar = (UINTN)Private->UfsHcPciAddr[ControllerId];
58
59 return EFI_SUCCESS;
60 }
61
62 /**
63 The user code starts with this function.
64
65 @param FileHandle Handle of the file being invoked.
66 @param PeiServices Describes the list of possible PEI Services.
67
68 @retval EFI_SUCCESS The driver is successfully initialized.
69 @retval Others Can't initialize the driver.
70
71 **/
72 EFI_STATUS
73 EFIAPI
InitializeUfsHcPeim(IN EFI_PEI_FILE_HANDLE FileHandle,IN CONST EFI_PEI_SERVICES ** PeiServices)74 InitializeUfsHcPeim (
75 IN EFI_PEI_FILE_HANDLE FileHandle,
76 IN CONST EFI_PEI_SERVICES **PeiServices
77 )
78 {
79 EFI_BOOT_MODE BootMode;
80 EFI_STATUS Status;
81 UINT16 Bus;
82 UINT16 Device;
83 UINT16 Function;
84 UINT32 Size;
85 UINT8 SubClass;
86 UINT8 BaseClass;
87 UFS_HC_PEI_PRIVATE_DATA *Private;
88
89 //
90 // Shadow this PEIM to run from memory
91 //
92 if (!EFI_ERROR (PeiServicesRegisterForShadow (FileHandle))) {
93 return EFI_SUCCESS;
94 }
95
96 Status = PeiServicesGetBootMode (&BootMode);
97 ///
98 /// We do not export this in S3 boot path, because it is only for recovery.
99 ///
100 if (BootMode == BOOT_ON_S3_RESUME) {
101 return EFI_SUCCESS;
102 }
103
104 Private = (UFS_HC_PEI_PRIVATE_DATA *) AllocateZeroPool (sizeof (UFS_HC_PEI_PRIVATE_DATA));
105 if (Private == NULL) {
106 DEBUG ((EFI_D_ERROR, "Failed to allocate memory for UFS_HC_PEI_PRIVATE_DATA! \n"));
107 return EFI_OUT_OF_RESOURCES;
108 }
109
110 Private->Signature = UFS_HC_PEI_SIGNATURE;
111 Private->UfsHostControllerPpi = mUfsHostControllerPpi;
112 Private->PpiList = mPpiList;
113 Private->PpiList.Ppi = &Private->UfsHostControllerPpi;
114
115 for (Bus = 0; Bus < 256; Bus++) {
116 for (Device = 0; Device < 32; Device++) {
117 for (Function = 0; Function < 8; Function++) {
118 SubClass = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x0A));
119 BaseClass = PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, 0x0B));
120
121 if ((SubClass == 0x09) && (BaseClass == PCI_CLASS_MASS_STORAGE)) {
122 //
123 // Get the Ufs Pci host controller's MMIO region size.
124 //
125 PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16)~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));
126 PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET), 0xFFFFFFFF);
127 Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET));
128 //
129 // Assign resource to the Ufs Pci host controller's MMIO BAR.
130 // Enable the Ufs Pci host controller by setting BME and MSE bits of PCI_CMD register.
131 //
132 PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET), (UINT32)(PcdGet32 (PcdUfsPciHostControllerMmioBase) + Size * Private->TotalUfsHcs));
133 PciOr16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));
134 //
135 // Record the allocated Mmio base address.
136 //
137 Private->UfsHcPciAddr[Private->TotalUfsHcs] = PcdGet32 (PcdUfsPciHostControllerMmioBase) + Size * Private->TotalUfsHcs;
138 Private->TotalUfsHcs++;
139 ASSERT (Private->TotalUfsHcs < MAX_UFS_HCS);
140 }
141 }
142 }
143 }
144
145 ///
146 /// Install Ufs Host Controller PPI
147 ///
148 Status = PeiServicesInstallPpi (&Private->PpiList);
149
150 ASSERT_EFI_ERROR (Status);
151 return Status;
152 }
153