Searched refs:SC_PERIPH_CLKEN3 (Results 1 – 3 of 3) sorted by relevance
165 MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART1); in UartInit()168 MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART2); in UartInit()171 MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART3); in UartInit()174 MmioWrite32 (PERI_CTRL_BASE + SC_PERIPH_CLKEN3, PERIPH_RST3_UART4); in UartInit()
19 #define SC_PERIPH_CLKEN3 0x230 macro
20 #define SC_PERIPH_CLKEN3 0x230 macro87 ldr r6, =SC_PERIPH_CLKEN3 @ enable PCLK