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/device/linaro/bootloader/edk2/ArmPkg/Library/ArmLib/Common/Arm/
DArmLibSupport.asm24 mrc p15,0,R0,c0,c0,0
28 mrc p15,0,R0,c0,c0,1
46 mcr p15,0,r0,c3,c0,0
67 mrc p15, 0, r0, c1, c0, 2
71 mcr p15, 0, r0, c1, c0, 2
76 mcr p15, 0, r0, c1, c0, 1
80 mrc p15, 0, r0, c1, c0, 1
84 mcr p15,0,r0,c2,c0,0
89 mrc p15,0,r0,c2,c0,0
127 mrc p15, 4, r0, c12, c0, 0
[all …]
DArmLibSupport.S50 mrc p15,0,R0,c0,c0,0
54 mrc p15,0,R0,c0,c0,1
72 mcr p15,0,r0,c3,c0,0
93 mrc p15, 0, r0, c1, c0, 2
97 mcr p15, 0, r0, c1, c0, 2
102 mcr p15, 0, r0, c1, c0, 1
106 mrc p15, 0, r0, c1, c0, 1
110 mcr p15,0,r0,c2,c0,0
115 mrc p15,0,r0,c2,c0,0
153 mrc p15, 4, r0, c12, c0, 0
[all …]
/device/linaro/bootloader/edk2/ArmPkg/Library/ArmLib/ArmV7/
DArmV7Support.asm68 mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
70 mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
76 mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
78 mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
87 mrc p15, 0, r0, c1, c0, 0 ; Get control register
91 mcr p15, 0, r0, c1, c0, 0 ; Write control register
97 mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
103 mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
105 mcr p15,0,R0,c1,c0,0 ; Write R0 into SCTLR (Write control register configuration data)
112 mrc p15,0,R0,c1,c0,0 ; Read SCTLR into R0 (Read control register configuration data)
[all …]
DArmV7Support.S104 mrc p15,0,R0,c1,c0,0
106 mcr p15,0,R0,c1,c0,0
113 mrc p15,0,R0,c1,c0,0
115 mcr p15,0,R0,c1,c0,0 @Disable MMU
124 mrc p15, 0, r0, c1, c0, 0 @ Get control register
128 mcr p15, 0, r0, c1, c0, 0 @ Write control register
134 mrc p15,0,R0,c1,c0,0
140 mrc p15,0,R0,c1,c0,0 @Read control register configuration data
142 mcr p15,0,r0,c1,c0,0 @Write control register configuration data
149 mrc p15,0,R0,c1,c0,0 @Read control register configuration data
[all …]
DArmLibSupportV7.asm24 mrc p15,0,R0,c0,c0,5
34 mrc p15,0,R0,c0,c0,5
84 mcr p15,2,r0,c0,c0,0 ; Write Cache Size Selection Register (CSSELR)
86 mrc p15,1,r0,c0,c0,0 ; Read current CP15 Cache Size ID Register (CCSIDR)
94 mrc p15,1,r0,c0,c0,1 ; Read CP15 Cache Level ID Register
DArmLibSupportV7.S39 mrc p15,0,R0,c0,c0,5
49 mrc p15,0,R0,c0,c0,5
99 mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
101 mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR)
109 mrc p15,1,r0,c0,c0,1 @ Read CP15 Cache Level ID Register
/device/linaro/bootloader/edk2/BeagleBoardPkg/Sec/Arm/
DModuleEntryPoint.asm30 mrc p15, 0, r0, c1, c0, 1 // read Auxiliary Control Register
32 mcr p15, 0, r0, c1, c0, 1 // store Auxiliary Control Register
35 mrc p15, 0, r0, c1, c0, 0
40 mcr p15, 0, r0, c1, c0, 0
43 mrc p15, 0, r0, c1, c0, 2
45 mcr p15, 0, r0, c1, c0, 2
51 mcr p15, 0, r0, c12, c0, 0
DModuleEntryPoint.S27 mrc p15, 0, r0, c1, c0, 1 // read Auxiliary Control Register
29 mcr p15, 0, r0, c1, c0, 1 // store Auxiliary Control Register
32 mrc p15, 0, r0, c1, c0, 0
37 mcr p15, 0, r0, c1, c0, 0
40 mrc p15, 0, r0, c1, c0, 2
42 mcr p15, 0, r0, c1, c0, 2
44 mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
49 mcr p15, 0, r0, c12, c0, 0
/device/linaro/bootloader/OpenPlatformPkg/Platforms/TexasInstruments/BeagleBoard/Sec/Arm/
DModuleEntryPoint.asm30 mrc p15, 0, r0, c1, c0, 1 // read Auxiliary Control Register
32 mcr p15, 0, r0, c1, c0, 1 // store Auxiliary Control Register
35 mrc p15, 0, r0, c1, c0, 0
40 mcr p15, 0, r0, c1, c0, 0
43 mrc p15, 0, r0, c1, c0, 2
45 mcr p15, 0, r0, c1, c0, 2
51 mcr p15, 0, r0, c12, c0, 0
DModuleEntryPoint.S27 mrc p15, 0, r0, c1, c0, 1 // read Auxiliary Control Register
29 mcr p15, 0, r0, c1, c0, 1 // store Auxiliary Control Register
32 mrc p15, 0, r0, c1, c0, 0
37 mcr p15, 0, r0, c1, c0, 0
40 mrc p15, 0, r0, c1, c0, 2
42 mcr p15, 0, r0, c1, c0, 2
44 mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
49 mcr p15, 0, r0, c12, c0, 0
/device/google/contexthub/firmware/lib/libc/
Dmemset.c56 #define VAL c0 in bzero()
60 memset(void *dst0, int c0, size_t length) in bzero()
92 if ((c = (u_char)c0) != 0) { /* Fill the word. */ in bzero()
/device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/
DRTSMHelper.asm46 mrc p15, 4, r0, c15, c0, 0
66 mrc p15, 0, r1, c0, c0, 0
85 mrc p15, 1, r0, c9, c0, 2 ; Read C9 register of CP15 to get CPU count
DRTSMHelper.S44 mrc p15, 4, r0, c15, c0, 0
62 mrc p15, 0, r1, c0, c0, 0
81 mrc p15, 1, r0, c9, c0, 2 @ Read C9 register of CP15 to get CPU count
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Lib/lib2to3/
Dpytree.py783 for c0, r0 in results:
785 if c0 < nodelen and c0 <= self.max:
787 for c1, r1 in generate_matches(alt, nodes[c0:]):
792 yield c0 + c1, r
793 new_results.append((c0 + c1, r))
819 for c0, r0 in generate_matches(alt, nodes):
820 for c1, r1 in self._recursive_matches(nodes[c0:], count+1):
824 yield c0 + c1, r
879 for c0, r0 in p.generate_matches(nodes):
881 yield c0, r0
[all …]
/device/google/accessory/demokit/app/src/com/google/android/DemoKit/
DColorWheel.java146 int c0 = colors[i]; in interpColor() local
148 int a = ave(Color.alpha(c0), Color.alpha(c1), p); in interpColor()
149 int r = ave(Color.red(c0), Color.red(c1), p); in interpColor()
150 int g = ave(Color.green(c0), Color.green(c1), p); in interpColor()
151 int b = ave(Color.blue(c0), Color.blue(c1), p); in interpColor()
/device/linaro/bootloader/edk2/MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/enc/
Dutf16_le.c87 UChar c0 = *p; in utf16le_mbc_to_code() local
91 code = ((((c1 - 0xd8) << 2) + ((c0 & 0xc0) >> 6) + 1) << 16) in utf16le_mbc_to_code()
92 + ((((c0 & 0x3f) << 2) + (p[3] - 0xdc)) << 8) in utf16le_mbc_to_code()
/device/google/contexthub/util/nanoapp_sign/
Dtest_exponent4 21:34:1c:0c:d2:8a:b8:77:ff:18:d7:94:8c:c0:b7:
12 52:f9:e7:43:29:b3:80:78:e3:45:b7:3f:ae:03:c0:
/device/linaro/bootloader/edk2/ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/
DDebugAgentException.asm182 mrc p15, 0, R1, c6, c0, 2 ; Read IFAR
185 mrc p15, 0, R1, c5, c0, 1 ; Read IFSR
188 mrc p15, 0, R1, c6, c0, 0 ; Read DFAR
191 mrc p15, 0, R1, c5, c0, 0 ; Read DFSR
246 mcr p15, 0, R1, c5, c0, 1 ; Write IFSR
249 mcr p15, 0, R1, c5, c0, 0 ; Write DFSR
DDebugAgentException.S187 mrc p15, 0, R1, c6, c0, 2 @ Read IFAR
190 mrc p15, 0, R1, c5, c0, 1 @ Read IFSR
193 mrc p15, 0, R1, c6, c0, 0 @ Read DFAR
196 mrc p15, 0, R1, c5, c0, 0 @ Read DFSR
251 mcr p15, 0, R1, c5, c0, 1 @ Write IFSR
254 mcr p15, 0, R1, c5, c0, 0 @ Write DFSR
/device/linaro/bootloader/edk2/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/
DArmCortexA9Helper.S29 mrc p15, 4, r0, c15, c0, 0
DArmCortexA9Helper.asm30 mrc p15, 4, r0, c15, c0, 0
/device/linaro/bootloader/edk2/ArmPkg/Drivers/CpuDxe/Arm/
DExceptionSupport.asm202 mrc p15, 0, R1, c6, c0, 2 ; Read IFAR
205 mrc p15, 0, R1, c5, c0, 1 ; Read IFSR
208 mrc p15, 0, R1, c6, c0, 0 ; Read DFAR
211 mrc p15, 0, R1, c5, c0, 0 ; Read DFSR
272 mcr p15, 0, R1, c5, c0, 1 ; Write IFSR
275 mcr p15, 0, R1, c5, c0, 0 ; Write DFSR
DExceptionSupport.S208 mrc p15, 0, R1, c6, c0, 2 @ Read IFAR
211 mrc p15, 0, R1, c5, c0, 1 @ Read IFSR
214 mrc p15, 0, R1, c6, c0, 0 @ Read DFAR
217 mrc p15, 0, R1, c5, c0, 0 @ Read DFSR
278 mcr p15, 0, R1, c5, c0, 1 @ Write IFSR
281 mcr p15, 0, R1, c5, c0, 0 @ Write DFSR
/device/google/accessory/demokit/firmware/demokit/
Ddemokit.pde153 char c0;
252 c0 = touchcount > 750;
254 if (c0 != c) {
257 msg[2] = c0;
259 c = c0;
/device/linaro/bootloader/edk2/ArmPkg/Library/BaseMemoryLibVstm/
DBaseMemoryLibVstm.inf10 # mrc p15, 0, r0, c1, c0, 2
12 # mcr p15, 0, r0, c1, c0, 2

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