1//------------------------------------------------------------------------------
2//
3// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
4//
5// This program and the accompanying materials
6// are licensed and made available under the terms and conditions of the BSD License
7// which accompanies this distribution.  The full text of the license may be found at
8// http://opensource.org/licenses/bsd-license.php
9//
10// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12//
13//------------------------------------------------------------------------------
14
15#include <AsmMacroIoLib.h>
16#include <Library/PcdLib.h>
17#include <AutoGen.h>
18  INCLUDE AsmMacroIoLib.inc
19
20  IMPORT  CEntryPoint
21  EXPORT  _ModuleEntryPoint
22
23  PRESERVE8
24  AREA    ModuleEntryPoint, CODE, READONLY
25
26
27_ModuleEntryPoint
28
29  //Disable L2 cache
30  mrc     p15, 0, r0, c1, c0, 1   // read Auxiliary Control Register
31  bic     r0, r0, #0x00000002     // disable L2 cache
32  mcr     p15, 0, r0, c1, c0, 1   // store Auxiliary Control Register
33
34  //Enable Strict alignment checking & Instruction cache
35  mrc     p15, 0, r0, c1, c0, 0
36  bic     r0, r0, #0x00002300     /* clear bits 13, 9:8 (--V- --RS) */
37  bic     r0, r0, #0x00000005     /* clear bits 0, 2 (---- -C-M) */
38  orr     r0, r0, #0x00000002     /* set bit 1 (A) Align */
39  orr     r0, r0, #0x00001000     /* set bit 12 (I) enable I-Cache */
40  mcr     p15, 0, r0, c1, c0, 0
41
42  // Enable NEON register in case folks want to use them for optimizations (CopyMem)
43  mrc     p15, 0, r0, c1, c0, 2
44  orr     r0, r0, #0x00f00000   // Enable VPF access (V* instructions)
45  mcr     p15, 0, r0, c1, c0, 2
46  mov     r0, #0x40000000       // Set EN bit in FPEXC
47  msr     FPEXC,r0
48
49  // Set CPU vectors to start of DRAM
50  LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
51  mcr     p15, 0, r0, c12, c0, 0
52  isb                               // Sync changes to control registers
53
54  // Fill vector table with branchs to current pc (jmp $)
55  ldr     r1, ShouldNeverGetHere
56  movs    r2, #0
57FillVectors
58  str     r1, [r0, r2]
59  adds    r2, r2, #4
60  cmp     r2, #32
61  bne     FillVectors
62
63  /* before we call C code, lets setup the stack pointer in internal RAM */
64stack_pointer_setup
65
66  //
67  // Set stack based on PCD values. Need to do it this way to make C code work
68  // when it runs from FLASH.
69  //
70  LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2)    // stack base arg2
71  LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3)    // stack size arg3
72  add     r4, r2, r3
73
74  //Enter SVC mode and set up SVC stack pointer
75  mov     r5,#0x13|0x80|0x40
76  msr     CPSR_c,r5
77  mov     r13,r4
78
79  // Call C entry point
80  LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1)    // memory size arg1
81  LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0)    // memory start arg0
82  blx     CEntryPoint                                     // Assume C code is thumb
83
84ShouldNeverGetHere
85  /* _CEntryPoint should never return */
86  b       ShouldNeverGetHere
87
88  END
89
90