| /device/linaro/bootloader/arm-trusted-firmware/services/std_svc/psci/ |
| D | psci_main.c | 44 unsigned long entrypoint, in psci_cpu_on() argument
60 rc = psci_plat_pm_ops->validate_ns_entrypoint(entrypoint); in psci_cpu_on()
72 rc = psci_get_ns_ep_info(&ep, entrypoint, context_id); in psci_cpu_on()
97 unsigned long entrypoint, in psci_cpu_suspend() argument
124 rc = psci_plat_pm_ops->validate_ns_entrypoint(entrypoint); in psci_cpu_suspend()
151 rc = psci_get_ns_ep_info(&ep, entrypoint, context_id); in psci_cpu_suspend()
171 int psci_system_suspend(unsigned long entrypoint, in psci_system_suspend() argument
180 rc = psci_plat_pm_ops->validate_ns_entrypoint(entrypoint); in psci_system_suspend()
196 rc = psci_get_ns_ep_info(&ep, entrypoint, context_id); in psci_system_suspend()
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| D | psci_common.c | 328 uint64_t entrypoint, uint64_t context_id) in psci_get_ns_ep_info() argument
344 ep->pc = entrypoint; in psci_get_ns_ep_info()
358 if (entrypoint & 0x1) in psci_get_ns_ep_info()
374 ep->spsr = SPSR_MODE32(mode, entrypoint & 0x1, ee, daif); in psci_get_ns_ep_info()
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| D | psci_private.h | 129 uint64_t entrypoint, uint64_t context_id);
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| /device/linaro/bootloader/arm-trusted-firmware/include/bl31/ |
| D | context_mgmt.h | 56 void cm_set_elr_el3(uint32_t security_state, uint64_t entrypoint);
58 uint64_t entrypoint, uint32_t spsr);
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| /device/linaro/bootloader/arm-trusted-firmware/bl31/ |
| D | context_mgmt.c | 296 void cm_set_elr_el3(uint32_t security_state, uint64_t entrypoint) in cm_set_elr_el3() argument
306 write_ctx_reg(state, CTX_ELR_EL3, entrypoint); in cm_set_elr_el3()
314 uint64_t entrypoint, uint32_t spsr) in cm_set_elr_spsr_el3() argument
324 write_ctx_reg(state, CTX_ELR_EL3, entrypoint); in cm_set_elr_spsr_el3()
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| /device/linaro/bootloader/edk2/MdePkg/Library/PeiPalLib/ |
| D | PeiPalLib.inf | 2 # Instance of PAL Library using a PPI for PAL entrypoint.
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| D | PeiPalLib.uni | 2 // Instance of PAL Library using a PPI for PAL entrypoint.
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| /device/linaro/bootloader/edk2/MdeModulePkg/Universal/CapsulePei/ |
| D | CapsuleX64.inf | 4 # The X64 entrypoint to process capsule in long mode.
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| D | CapsuleX64.uni | 4 // The X64 entrypoint to process capsule in long mode.
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| /device/linaro/bootloader/edk2/ArmPlatformPkg/Sec/Arm/ |
| D | Helper.S | 38 mov lr, r0 @ Use the pass entrypoint as lr
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformPei/ |
| D | PlatformPei.inf | 53 # Platform.c - Provide main flow and entrypoint of PEIM.
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| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/ |
| D | PlatformEarlyInit.inf | 31 # Platform.c - Provide main flow and entrypoint of PEIM.
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| /device/linaro/bootloader/arm-trusted-firmware/docs/ |
| D | user-guide.md | 226 * `RESET_TO_BL31`: Enable BL3-1 entrypoint as the CPU reset vector instead
227 of the BL1 entrypoint. It can take the value 0 (CPU reset to BL1
228 entrypoint) or 1 (CPU reset to BL3-1 entrypoint).
800 ### Running on the Foundation FVP with reset to BL1 entrypoint
877 ### Running on the AEMv8 Base FVP with reset to BL1 entrypoint
896 ### Running on the Cortex-A57-A53 Base FVP with reset to BL1 entrypoint
913 ### Running on the AEMv8 Base FVP with reset to BL3-1 entrypoint
941 ### Running on the Cortex-A57-A53 Base FVP with reset to BL3-1 entrypoint
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| D | firmware-design.md | 79 * specification of the BL3-1 entrypoint requirements for use by alternative
107 entrypoint. In the case of a cold boot, the secondary CPUs are placed in a safe
279 populates a platform-specific area of memory with the entrypoint/load-address
292 entrypoint and Saved Program Status Register (`SPSR`) of the normal world
293 software image. The entrypoint is the load address of the BL3-3 image. The
302 BL3-1 entrypoint. The exception is handled by the SMC exception handler
309 3. BL1 passes control to BL3-1 at the specified entrypoint at EL3.
339 software to function correctly. It also retrieves entrypoint information for
401 non-secure execution state. BL3-1 uses the entrypoint information provided
452 BL3-1 common and SPD initialization code depends on image and entrypoint
[all …]
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| D | porting-guide.md | 398 specific means. If it's a warm reset then it returns the entrypoint into the
404 entrypoint to jump to.
697 On FVP, we are setting the security state and the SPSR for the BL2 entrypoint
884 entrypoint.
896 entrypoint
908 entrypoint
948 entrypoint of that image, which BL3-1 uses to jump to it.
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| D | interrupt-framework-design.md | 465 by exporting a seperate entrypoint for Secure-EL1 interrupts to the SPD
519 The TSP implements an entrypoint (`tsp_fiq_entry()`) for handling Secure-EL1
521 (synchronous handling model). It passes the reference to this entrypoint via
797 receiving control from the SPD service at an entrypoint agreed upon during build
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| D | change-log.md | 42 `entrypoint` parameters early in PSCI `CPU_ON` and `CPU_SUSPEND` code
417 * Added support for optionally making the BL3-1 entrypoint a reset handler
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| /device/linaro/bootloader/OpenPlatformPkg/Platforms/Hisilicon/HiKey/ |
| D | HiKey.fdf | 267 # UEFI Firmware to jump to ArmPlatformPkg/PrePi entrypoint
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| /device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/Juno/ |
| D | ArmJuno.fdf | 272 # UEFI Firmware to jump to ArmPlatformPkg/PrePi entrypoint
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| /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmJunoPkg/ |
| D | ArmJuno.fdf | 272 # UEFI Firmware to jump to ArmPlatformPkg/PrePi entrypoint
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