| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 621 ATOMIC_LOAD_ADD, enumerator
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| D | SelectionDAGNodes.h | 969 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
1054 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 728 ATOMIC_LOAD_ADD, enumerator
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| D | SelectionDAGNodes.h | 1103 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
1184 N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 67 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 142 case ISD::ATOMIC_LOAD_ADD: in PromoteIntegerResult()
1337 case ISD::ATOMIC_LOAD_ADD: in ExpandIntegerResult()
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| D | SelectionDAG.cpp | 466 case ISD::ATOMIC_LOAD_ADD: in AddNodeIDCustom()
4908 assert((Opcode == ISD::ATOMIC_LOAD_ADD || in getAtomic()
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| D | LegalizeDAG.cpp | 3767 case ISD::ATOMIC_LOAD_ADD: in ConvertNodeToLibcall()
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| D | SelectionDAGBuilder.cpp | 3935 case AtomicRMWInst::Add: NT = ISD::ATOMIC_LOAD_ADD; break; in visitAtomicRMW()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 134 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in Mips16TargetLowering()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 124 case ISD::ATOMIC_LOAD_ADD: in PromoteIntegerResult()
1118 case ISD::ATOMIC_LOAD_ADD: in ExpandIntegerResult()
1193 case ISD::ATOMIC_LOAD_ADD: in ExpandAtomic()
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| D | SelectionDAG.cpp | 426 case ISD::ATOMIC_LOAD_ADD: in AddNodeIDCustom()
3930 assert((Opcode == ISD::ATOMIC_LOAD_ADD || in getAtomic()
5878 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; in getOperationName()
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| D | LegalizeDAG.cpp | 2903 case ISD::ATOMIC_LOAD_ADD: in ExpandAtomic()
3046 case ISD::ATOMIC_LOAD_ADD: in ExpandNode()
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| D | DAGCombiner.cpp | 7129 case ISD::ATOMIC_LOAD_ADD: in visitMEMBARRIER()
7155 case ISD::ATOMIC_LOAD_ADD: in visitMEMBARRIER()
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| D | SelectionDAGBuilder.cpp | 3363 case AtomicRMWInst::Add: NT = ISD::ATOMIC_LOAD_ADD; break; in visitAtomicRMW()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 244 setTargetDAGCombine(ISD::ATOMIC_LOAD_ADD); in SITargetLowering()
3010 case ISD::ATOMIC_LOAD_ADD: in PerformDAGCombine()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 742 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_ADD, SYNC_FETCH_AND_ADD) in getSYNC()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 418 def atomic_load_add : SDNode<"ISD::ATOMIC_LOAD_ADD" , SDTAtomic2,
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 498 def atomic_load_add : SDNode<"ISD::ATOMIC_LOAD_ADD" , SDTAtomic2,
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 1745 case ISD::ATOMIC_LOAD_ADD: { in Select()
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| D | X86ISelLowering.cpp | 485 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i64, Custom); in X86TargetLowering()
10322 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, dl, in LowerLOAD_SUB()
10592 case ISD::ATOMIC_LOAD_ADD: in ReplaceNodeResults()
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| D | X86GenDAGISel.inc | 32964 /*SwitchOpcode*/ 94, TARGET_VAL(ISD::ATOMIC_LOAD_ADD),// ->68466
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 205 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Custom); in SystemZTargetLowering()
3303 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT, in lowerATOMIC_LOAD_SUB()
4535 case ISD::ATOMIC_LOAD_ADD: in LowerOperation()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 625 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i64, Custom); in ARMTargetLowering()
640 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in ARMTargetLowering()
5009 case ISD::ATOMIC_LOAD_ADD: in ReplaceNodeResults()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 872 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand); in ARMTargetLowering()
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