| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrQPX.td | 40 : AForm_1<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
41 !strconcat(opc, " $FRT, $FRA, $FRC, $FRB"), IIC_FPFused,
42 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
45 : AForm_1<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB, qfrc:$FRC),
46 !strconcat(opc, " $FRT, $FRA, $FRC, $FRB"), IIC_VecPerm,
47 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
50 : AForm_2<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRA, qfrc:$FRB),
51 !strconcat(opc, " $FRT, $FRA, $FRB"), IIC_FPGeneral,
52 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB))]>;
60 : AForm_4a<opcode, xo, (outs qfrc:$FRT), (ins qfrc:$FRB),
[all …]
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| D | PPCInstrInfo.td | 2411 def FADDrtz: Pseudo<(outs f8rc:$FRT), (ins f8rc:$FRA, f8rc:$FRB), "",
2412 [(set f64:$FRT, (PPCfaddrtz f64:$FRA, f64:$FRB))]>;
2532 (outs f8rc:$FRT), (ins f8rc:$FRA, f8rc:$FRC, f8rc:$FRB),
2533 "fmadd", "$FRT, $FRA, $FRC, $FRB", IIC_FPFused,
2534 [(set f64:$FRT, (fma f64:$FRA, f64:$FRC, f64:$FRB))]>;
2536 (outs f4rc:$FRT), (ins f4rc:$FRA, f4rc:$FRC, f4rc:$FRB),
2537 "fmadds", "$FRT, $FRA, $FRC, $FRB", IIC_FPGeneral,
2538 [(set f32:$FRT, (fma f32:$FRA, f32:$FRC, f32:$FRB))]>;
2540 (outs f8rc:$FRT), (ins f8rc:$FRA, f8rc:$FRC, f8rc:$FRB),
2541 "fmsub", "$FRT, $FRA, $FRC, $FRB", IIC_FPFused,
[all …]
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| D | PPCInstrFormats.td | 570 bits<5> FRB;
575 let Inst{16-20} = FRB;
586 bits<5> FRB;
592 let Inst{16-20} = FRB;
608 bits<5> FRB;
615 let Inst{16-20} = FRB;
852 let FRB = 0;
1456 bits<5> FRB;
1464 let Inst{16-20} = FRB;
1521 bits<5> FRB;
[all …]
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| D | p9-instrs.txt | 118 [PO BF / UIM FRB XO /] dtstsfi BF,UIM,FRB
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 1137 (ins i32imm:$FM, F8RC:$rT, F8RC:$FRB),
1138 "mtfsf $FM, $rT", "$FRB = $FRA", IntMTFSB0,
1140 F8RC:$rT, F8RC:$FRB))]>,
1149 (outs F8RC:$FRT), (ins F8RC:$FRA, F8RC:$FRB),
1150 "fadd $FRT, $FRA, $FRB", FPGeneral,
1151 [(set F8RC:$FRT, (PPCfaddrtz F8RC:$FRA, F8RC:$FRB))]>,
1226 (outs F8RC:$FRT), (ins F8RC:$FRA, F8RC:$FRC, F8RC:$FRB),
1227 "fmadd $FRT, $FRA, $FRC, $FRB", FPFused,
1229 F8RC:$FRB))]>,
1232 (outs F4RC:$FRT), (ins F4RC:$FRA, F4RC:$FRC, F4RC:$FRB),
[all …]
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| D | PPCInstrFormats.td | 323 bits<5> FRB;
328 let Inst{16-20} = FRB;
670 bits<5> FRB;
678 let Inst{16-20} = FRB;
693 let FRB = 0;
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| /external/valgrind/memcheck/tests/ppc32/ |
| D | power_ISA2_05.c | 153 double FRT, FRA, FRB; in test_fcpsgn() local
159 FRB = B[j]; in test_fcpsgn()
161 "f"(FRB)); in test_fcpsgn()
162 printf("fcpsgn sign=%f, base=%f => %f\n", FRA, FRB, FRT); in test_fcpsgn()
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| /external/valgrind/memcheck/tests/ppc64/ |
| D | power_ISA2_05.c | 158 double FRT, FRA, FRB; in test_fcpsgn() local
164 FRB = B[j]; in test_fcpsgn()
166 "f"(FRB)); in test_fcpsgn()
167 printf("fcpsgn sign=%f, base=%f => %f\n", FRA, FRB, FRT); in test_fcpsgn()
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeFrameLowering.cpp | 47 const SmallVector<std::pair<int,int64_t>, 16>::iterator FRB = FR.begin(); in replaceFrameIndexes() local
50 SmallVector<std::pair<int,int64_t>, 16>::iterator FRI = FRB; in replaceFrameIndexes()
|
| /external/llvm/docs/ |
| D | CodeGenerator.rst | 990 (ops F4RC:$FRT, F4RC:$FRA, F4RC:$FRC, F4RC:$FRB),
991 "fmadds $FRT, $FRA, $FRC, $FRB",
993 F4RC:$FRB))]>;
995 (ops F4RC:$FRT, F4RC:$FRA, F4RC:$FRB),
996 "fadds $FRT, $FRA, $FRB",
997 [(set F4RC:$FRT, (fadd F4RC:$FRA, F4RC:$FRB))]>;
|