/external/v8/src/arm64/ |
D | decoder-arm64-inl.h | 132 (instr->Mask(0x01000010) == 0x00000010)) { in DecodeBranchSystemException() 146 (instr->Mask(0x00E0001D) == 0x00200001) || in DecodeBranchSystemException() 147 (instr->Mask(0x00E0001D) == 0x00400001) || in DecodeBranchSystemException() 148 (instr->Mask(0x00E0001E) == 0x00200002) || in DecodeBranchSystemException() 149 (instr->Mask(0x00E0001E) == 0x00400002) || in DecodeBranchSystemException() 150 (instr->Mask(0x00E0001C) == 0x00600000) || in DecodeBranchSystemException() 151 (instr->Mask(0x00E0001C) == 0x00800000) || in DecodeBranchSystemException() 152 (instr->Mask(0x00E0001F) == 0x00A00000) || in DecodeBranchSystemException() 153 (instr->Mask(0x00C0001C) == 0x00C00000)) { in DecodeBranchSystemException() 160 const Instr masked_003FF0E0 = instr->Mask(0x003FF0E0); in DecodeBranchSystemException() [all …]
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D | instructions-arm64.h | 120 Instr Mask(uint32_t mask) const { in Mask() function 160 static_cast<LoadStorePairOp>(Mask(LoadStorePairMask))); in SizeLSPair() 165 return Mask(ConditionalBranchFMask) == ConditionalBranchFixed; in IsCondBranchImm() 169 return Mask(UnconditionalBranchFMask) == UnconditionalBranchFixed; in IsUncondBranchImm() 173 return Mask(CompareBranchFMask) == CompareBranchFixed; in IsCompareBranch() 177 return Mask(TestBranchFMask) == TestBranchFixed; in IsTestBranch() 185 return Mask(LoadLiteralFMask) == LoadLiteralFixed; in IsLdrLiteral() 189 return Mask(LoadLiteralMask) == LDR_x_lit; in IsLdrLiteralX() 193 return Mask(PCRelAddressingFMask) == PCRelAddressingFixed; in IsPCRelAddressing() 197 return Mask(PCRelAddressingMask) == ADR; in IsAdr() [all …]
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D | disasm-arm64.cc | 57 switch (instr->Mask(AddSubImmediateMask)) { in VisitAddSubImmediate() 101 switch (instr->Mask(AddSubShiftedMask)) { in VisitAddSubShifted() 149 switch (instr->Mask(AddSubExtendedMask)) { in VisitAddSubExtended() 184 switch (instr->Mask(AddSubWithCarryMask)) { in VisitAddSubWithCarry() 225 switch (instr->Mask(LogicalImmediateMask)) { in VisitLogicalImmediate() 291 switch (instr->Mask(LogicalShiftedMask)) { in VisitLogicalShifted() 340 switch (instr->Mask(ConditionalCompareRegisterMask)) { in VisitConditionalCompareRegister() 356 switch (instr->Mask(ConditionalCompareImmediateMask)) { in VisitConditionalCompareImmediate() 378 switch (instr->Mask(ConditionalSelectMask)) { in VisitConditionalSelect() 433 switch (instr->Mask(BitfieldMask)) { in VisitBitfield() [all …]
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D | instructions-arm64.cc | 17 if (Mask(LoadStoreAnyFMask) != LoadStoreAnyFixed) { in IsLoad() 21 if (Mask(LoadStorePairAnyFMask) == LoadStorePairAnyFixed) { in IsLoad() 22 return Mask(LoadStorePairLBit) != 0; in IsLoad() 24 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreOpMask)); in IsLoad() 44 if (Mask(LoadStoreAnyFMask) != LoadStoreAnyFixed) { in IsStore() 48 if (Mask(LoadStorePairAnyFMask) == LoadStorePairAnyFixed) { in IsStore() 49 return Mask(LoadStorePairLBit) == 0; in IsStore() 51 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreOpMask)); in IsStore() 244 SetInstructionBits(Mask(~ImmPCRel_mask) | imm); in SetPCRelImmTarget() 283 SetInstructionBits(Mask(~imm_mask) | branch_imm); in SetBranchImmTarget() [all …]
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/external/vixl/src/aarch64/ |
D | decoder-aarch64.cc | 210 (instr->Mask(0x01000010) == 0x00000010)) { in DecodeBranchSystemException() 224 (instr->Mask(0x00E0001D) == 0x00200001) || in DecodeBranchSystemException() 225 (instr->Mask(0x00E0001D) == 0x00400001) || in DecodeBranchSystemException() 226 (instr->Mask(0x00E0001E) == 0x00200002) || in DecodeBranchSystemException() 227 (instr->Mask(0x00E0001E) == 0x00400002) || in DecodeBranchSystemException() 228 (instr->Mask(0x00E0001C) == 0x00600000) || in DecodeBranchSystemException() 229 (instr->Mask(0x00E0001C) == 0x00800000) || in DecodeBranchSystemException() 230 (instr->Mask(0x00E0001F) == 0x00A00000) || in DecodeBranchSystemException() 231 (instr->Mask(0x00C0001C) == 0x00C00000)) { in DecodeBranchSystemException() 238 const Instr masked_003FF0E0 = instr->Mask(0x003FF0E0); in DecodeBranchSystemException() [all …]
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D | disasm-aarch64.cc | 72 switch (instr->Mask(AddSubImmediateMask)) { in VisitAddSubImmediate() 119 switch (instr->Mask(AddSubShiftedMask)) { in VisitAddSubShifted() 170 switch (instr->Mask(AddSubExtendedMask)) { in VisitAddSubExtended() 210 switch (instr->Mask(AddSubWithCarryMask)) { in VisitAddSubWithCarry() 256 switch (instr->Mask(LogicalImmediateMask)) { in VisitLogicalImmediate() 326 switch (instr->Mask(LogicalShiftedMask)) { in VisitLogicalShifted() 387 switch (instr->Mask(ConditionalCompareRegisterMask)) { in VisitConditionalCompareRegister() 407 switch (instr->Mask(ConditionalCompareImmediateMask)) { in VisitConditionalCompareImmediate() 434 switch (instr->Mask(ConditionalSelectMask)) { in VisitConditionalSelect() 492 switch (instr->Mask(BitfieldMask)) { in VisitBitfield() [all …]
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D | instructions-aarch64.cc | 66 if (Mask(LoadStoreAnyFMask) != LoadStoreAnyFixed) { in IsLoad() 70 if (Mask(LoadStorePairAnyFMask) == LoadStorePairAnyFixed) { in IsLoad() 71 return Mask(LoadStorePairLBit) != 0; in IsLoad() 73 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsLoad() 98 if (Mask(LoadStoreAnyFMask) != LoadStoreAnyFixed) { in IsStore() 102 if (Mask(LoadStorePairAnyFMask) == LoadStorePairAnyFixed) { in IsStore() 103 return Mask(LoadStorePairLBit) == 0; in IsStore() 105 LoadStoreOp op = static_cast<LoadStoreOp>(Mask(LoadStoreMask)); in IsStore() 295 if (Mask(PCRelAddressingMask) == ADRP) { in GetImmPCOffsetTarget() 299 VIXL_ASSERT(Mask(PCRelAddressingMask) == ADR); in GetImmPCOffsetTarget() [all …]
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZTDC.cpp | 96 void converted(Instruction *I, Value *V, int Mask, bool Worthy) { in converted() argument 97 ConvertedInsts[I] = std::make_tuple(V, Mask, Worthy); in converted() 204 int Mask = 0; in convertFCmp() local 206 Mask |= Masks[WhichConst][0]; in convertFCmp() 208 Mask |= Masks[WhichConst][1]; in convertFCmp() 210 Mask |= Masks[WhichConst][2]; in convertFCmp() 212 Mask |= Masks[WhichConst][3]; in convertFCmp() 220 Mask &= SystemZ::TDCMASK_PLUS; in convertFCmp() 221 Mask |= Mask >> 1; in convertFCmp() 229 converted(&I, Op0, Mask, Worthy); in convertFCmp() [all …]
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D | SystemZISelDAGToDAG.cpp | 121 Mask(allOnes(BitSize)), Input(N), Start(64 - BitSize), End(63), in RxSBGOperands() 126 uint64_t Mask; member 276 bool refineRxSBGMask(RxSBGOperands &RxSBG, uint64_t Mask) const; 725 uint64_t Mask) const { in refineRxSBGMask() 728 Mask = (Mask << RxSBG.Rotate) | (Mask >> (64 - RxSBG.Rotate)); in refineRxSBGMask() 729 Mask &= RxSBG.Mask; in refineRxSBGMask() 730 if (TII->isRxSBGMask(Mask, RxSBG.BitSize, RxSBG.Start, RxSBG.End)) { in refineRxSBGMask() 731 RxSBG.Mask = Mask; in refineRxSBGMask() 738 static bool maskMatters(RxSBGOperands &RxSBG, uint64_t Mask) { in maskMatters() argument 741 Mask = ((Mask << RxSBG.Rotate) | (Mask >> (64 - RxSBG.Rotate))); in maskMatters() [all …]
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/external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
D | InstCombineVectorOps.cpp | 251 std::vector<Constant*> &Mask) { in CollectSingleShuffleElements() argument 257 Mask.assign(NumElts, UndefValue::get(Type::getInt32Ty(V->getContext()))); in CollectSingleShuffleElements() 263 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()), i)); in CollectSingleShuffleElements() 269 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()), in CollectSingleShuffleElements() 287 if (CollectSingleShuffleElements(VecOp, LHS, RHS, Mask)) { in CollectSingleShuffleElements() 289 Mask[InsertedIdx] = UndefValue::get(Type::getInt32Ty(V->getContext())); in CollectSingleShuffleElements() 302 if (CollectSingleShuffleElements(VecOp, LHS, RHS, Mask)) { in CollectSingleShuffleElements() 305 Mask[InsertedIdx % NumElts] = in CollectSingleShuffleElements() 310 Mask[InsertedIdx % NumElts] = in CollectSingleShuffleElements() 328 static Value *CollectShuffleElements(Value *V, std::vector<Constant*> &Mask, in CollectShuffleElements() argument [all …]
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/external/llvm/lib/Transforms/InstCombine/ |
D | InstCombineVectorOps.cpp | 298 SmallVectorImpl<Constant*> &Mask) { in collectSingleShuffleElements() argument 304 Mask.assign(NumElts, UndefValue::get(Type::getInt32Ty(V->getContext()))); in collectSingleShuffleElements() 310 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()), i)); in collectSingleShuffleElements() 316 Mask.push_back(ConstantInt::get(Type::getInt32Ty(V->getContext()), in collectSingleShuffleElements() 334 if (collectSingleShuffleElements(VecOp, LHS, RHS, Mask)) { in collectSingleShuffleElements() 336 Mask[InsertedIdx] = UndefValue::get(Type::getInt32Ty(V->getContext())); in collectSingleShuffleElements() 349 if (collectSingleShuffleElements(VecOp, LHS, RHS, Mask)) { in collectSingleShuffleElements() 352 Mask[InsertedIdx % NumElts] = in collectSingleShuffleElements() 357 Mask[InsertedIdx % NumElts] = in collectSingleShuffleElements() 451 SmallVectorImpl<Constant *> &Mask, in collectShuffleElements() argument [all …]
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/external/clang/include/clang/Basic/ |
D | Sanitizers.h | 52 return Mask & K; in has() 56 bool hasOneOf(SanitizerMask K) const { return Mask & K; } in hasOneOf() 61 Mask = Value ? (Mask | K) : (Mask & ~K); in set() 65 void clear() { Mask = 0; } in clear() 68 bool empty() const { return Mask == 0; } in empty() 71 SanitizerMask Mask = 0; member
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/external/swiftshader/third_party/LLVM/lib/Analysis/ |
D | ValueTracking.cpp | 60 void llvm::ComputeMaskedBits(Value *V, const APInt &Mask, in ComputeMaskedBits() argument 65 unsigned BitWidth = Mask.getBitWidth(); in ComputeMaskedBits() 78 KnownOne = CI->getValue() & Mask; in ComputeMaskedBits() 79 KnownZero = ~KnownOne & Mask; in ComputeMaskedBits() 86 KnownZero = Mask; in ComputeMaskedBits() 95 ComputeMaskedBits(CV->getOperand(i), Mask, KnownZero2, KnownOne2, in ComputeMaskedBits() 116 KnownZero = Mask & APInt::getLowBitsSet(BitWidth, in ComputeMaskedBits() 129 ComputeMaskedBits(GA->getAliasee(), Mask, KnownZero, KnownOne, in ComputeMaskedBits() 139 KnownZero = Mask & APInt::getLowBitsSet(BitWidth, in ComputeMaskedBits() 147 if (Depth == MaxDepth || Mask == 0) in ComputeMaskedBits() [all …]
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D | AliasAnalysis.cpp | 83 ModRefResult Mask = ModRef; in getModRefInfo() local 85 Mask = Ref; in getModRefInfo() 109 if ((Mask & Mod) && pointsToConstantMemory(Loc)) in getModRefInfo() 110 Mask = ModRefResult(Mask & ~Mod); in getModRefInfo() 113 if (!AA) return Mask; in getModRefInfo() 117 return ModRefResult(AA->getModRefInfo(CS, Loc) & Mask); in getModRefInfo() 135 AliasAnalysis::ModRefResult Mask = ModRef; in getModRefInfo() local 140 Mask = ModRefResult(Mask & Ref); in getModRefInfo() 155 R = ModRefResult((R | getModRefInfo(CS1, CS2Loc)) & Mask); in getModRefInfo() 156 if (R == Mask) in getModRefInfo() [all …]
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/external/llvm/lib/Analysis/ |
D | CostModel.cpp | 92 static bool isReverseVectorMask(SmallVectorImpl<int> &Mask) { in isReverseVectorMask() argument 93 for (unsigned i = 0, MaskSize = Mask.size(); i < MaskSize; ++i) in isReverseVectorMask() 94 if (Mask[i] > 0 && Mask[i] != (int)(MaskSize - 1 - i)) in isReverseVectorMask() 99 static bool isAlternateVectorMask(SmallVectorImpl<int> &Mask) { in isAlternateVectorMask() argument 101 unsigned MaskSize = Mask.size(); in isAlternateVectorMask() 105 if (Mask[i] < 0) in isAlternateVectorMask() 107 isAlternate = Mask[i] == (int)((i & 1) ? MaskSize + i : i); in isAlternateVectorMask() 116 if (Mask[i] < 0) in isAlternateVectorMask() 118 isAlternate = Mask[i] == (int)((i & 1) ? i : MaskSize + i); in isAlternateVectorMask() 147 SmallVector<int, 32> Mask(SI->getType()->getVectorNumElements(), -1); in matchPairwiseShuffleMask() local [all …]
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/external/llvm/lib/CodeGen/ |
D | InterleavedAccessPass.cpp | 122 static bool isDeInterleaveMaskOfFactor(ArrayRef<int> Mask, unsigned Factor, in isDeInterleaveMaskOfFactor() argument 130 for (; i < Mask.size(); i++) in isDeInterleaveMaskOfFactor() 131 if (Mask[i] >= 0 && static_cast<unsigned>(Mask[i]) != Index + i * Factor) in isDeInterleaveMaskOfFactor() 134 if (i == Mask.size()) in isDeInterleaveMaskOfFactor() 146 static bool isDeInterleaveMask(ArrayRef<int> Mask, unsigned &Factor, in isDeInterleaveMask() argument 148 if (Mask.size() < 2) in isDeInterleaveMask() 153 if (isDeInterleaveMaskOfFactor(Mask, Factor, Index)) in isDeInterleaveMask() 165 static bool isReInterleaveMask(ArrayRef<int> Mask, unsigned &Factor) { in isReInterleaveMask() argument 166 unsigned NumElts = Mask.size(); in isReInterleaveMask() 183 if (Mask[i] >= 0 && in isReInterleaveMask() [all …]
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D | StackMapLivenessAnalysis.cpp | 155 uint32_t *Mask = createRegisterMask(MF); in addLiveOutSetToMI() local 156 MachineOperand MO = MachineOperand::CreateRegLiveOut(Mask); in addLiveOutSetToMI() 164 uint32_t *Mask = MF.allocateRegisterMask(TRI->getNumRegs()); in createRegisterMask() local 166 Mask[Reg / 32] |= 1U << (Reg % 32); in createRegisterMask() 169 TRI->adjustStackMapLiveOutMask(Mask); in createRegisterMask() 171 return Mask; in createRegisterMask()
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/external/llvm/include/llvm/ADT/ |
D | SmallBitVector.h | 303 uintptr_t Mask = EMask - IMask; in set() local 304 setSmallBits(getSmallBits() | Mask); in set() 334 uintptr_t Mask = EMask - IMask; in reset() local 335 setSmallBits(getSmallBits() & ~Mask); in reset() 514 void setBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) { 516 applyMask<true, false>(Mask, MaskWords); 518 getPointer()->setBitsInMask(Mask, MaskWords); 523 void clearBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) { 525 applyMask<false, false>(Mask, MaskWords); 527 getPointer()->clearBitsInMask(Mask, MaskWords); [all …]
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D | BitVector.h | 241 BitWord Mask = EMask - IMask; in set() local 242 Bits[I / BITWORD_SIZE] |= Mask; in set() 280 BitWord Mask = EMask - IMask; in reset() local 281 Bits[I / BITWORD_SIZE] &= ~Mask; in reset() 319 BitWord Mask = BitWord(1) << (Idx % BITWORD_SIZE); variable 320 return (Bits[Idx / BITWORD_SIZE] & Mask) != 0; 483 void setBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) { 484 applyMask<true, false>(Mask, MaskWords); 489 void clearBitsInMask(const uint32_t *Mask, unsigned MaskWords = ~0u) { 490 applyMask<false, false>(Mask, MaskWords); [all …]
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/external/swiftshader/third_party/LLVM/utils/PerfectShuffle/ |
D | PerfectShuffle.cpp | 35 static unsigned getMaskElt(unsigned Mask, unsigned Elt) { in getMaskElt() argument 36 return (Mask >> ((3-Elt)*4)) & 0xF; in getMaskElt() 39 static unsigned setMaskElt(unsigned Mask, unsigned Elt, unsigned NewVal) { in setMaskElt() argument 41 return (Mask & ~(0xF << FieldShift)) | (NewVal << FieldShift); in setMaskElt() 45 static bool isValidMask(unsigned short Mask) { in isValidMask() argument 46 unsigned short UndefBits = Mask & 0x8888; in isValidMask() 47 return (Mask & ((UndefBits >> 1)|(UndefBits>>2)|(UndefBits>>3))) == 0; in isValidMask() 52 static bool hasUndefElements(unsigned short Mask) { in hasUndefElements() argument 53 return (Mask & 0x8888) != 0; in hasUndefElements() 58 static bool isOnlyLHSMask(unsigned short Mask) { in isOnlyLHSMask() argument [all …]
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/external/llvm/utils/PerfectShuffle/ |
D | PerfectShuffle.cpp | 35 static unsigned getMaskElt(unsigned Mask, unsigned Elt) { in getMaskElt() argument 36 return (Mask >> ((3-Elt)*4)) & 0xF; in getMaskElt() 39 static unsigned setMaskElt(unsigned Mask, unsigned Elt, unsigned NewVal) { in setMaskElt() argument 41 return (Mask & ~(0xF << FieldShift)) | (NewVal << FieldShift); in setMaskElt() 45 static bool isValidMask(unsigned short Mask) { in isValidMask() argument 46 unsigned short UndefBits = Mask & 0x8888; in isValidMask() 47 return (Mask & ((UndefBits >> 1)|(UndefBits>>2)|(UndefBits>>3))) == 0; in isValidMask() 52 static bool hasUndefElements(unsigned short Mask) { in hasUndefElements() argument 53 return (Mask & 0x8888) != 0; in hasUndefElements() 58 static bool isOnlyLHSMask(unsigned short Mask) { in isOnlyLHSMask() argument [all …]
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/external/llvm/lib/Support/Windows/ |
D | WindowsSupport.h | 61 DWORDLONG Mask = 0; in RunningWindows8OrGreater() local 62 Mask = VerSetConditionMask(Mask, VER_MAJORVERSION, VER_GREATER_EQUAL); in RunningWindows8OrGreater() 63 Mask = VerSetConditionMask(Mask, VER_MINORVERSION, VER_GREATER_EQUAL); in RunningWindows8OrGreater() 64 Mask = VerSetConditionMask(Mask, VER_SERVICEPACKMAJOR, VER_GREATER_EQUAL); in RunningWindows8OrGreater() 68 Mask) != FALSE; in RunningWindows8OrGreater()
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/external/vboot_reference/utility/ |
D | efidecompress.c | 218 UINT16 Mask; in MakeTable() local 261 Mask = (UINT16) (1U << (15 - TableBits)); in MakeTable() 290 if (Index3 & Mask) { in MakeTable() 334 UINT32 Mask; in DecodeP() local 340 Mask = 1U << (BITBUFSIZ - 1 - 8); in DecodeP() 344 if (Sd->mBitBuf & Mask) { in DecodeP() 350 Mask >>= 1; in DecodeP() 397 UINT32 Mask; in ReadPTLen() local 422 Mask = 1U << (BITBUFSIZ - 1 - 3); in ReadPTLen() 423 while (Mask & Sd->mBitBuf) { in ReadPTLen() [all …]
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/external/spirv-llvm/lib/SPIRV/libSPIRV/ |
D | SPIRVIsValidEnum.h | 894 isValidImageOperandsMask(SPIRVWord Mask) { in isValidImageOperandsMask() argument 905 return (Mask & ~ValidMask) == 0; in isValidImageOperandsMask() 909 isValidFPFastMathModeMask(SPIRVWord Mask) { in isValidFPFastMathModeMask() argument 917 return (Mask & ~ValidMask) == 0; in isValidFPFastMathModeMask() 921 isValidSelectionControlMask(SPIRVWord Mask) { in isValidSelectionControlMask() argument 926 return (Mask & ~ValidMask) == 0; in isValidSelectionControlMask() 930 isValidLoopControlMask(SPIRVWord Mask) { in isValidLoopControlMask() argument 937 return (Mask & ~ValidMask) == 0; in isValidLoopControlMask() 941 isValidFunctionControlMask(SPIRVWord Mask) { in isValidFunctionControlMask() argument 948 return (Mask & ~ValidMask) == 0; in isValidFunctionControlMask() [all …]
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/external/swiftshader/third_party/LLVM/ |
D | OnlyX86.patch | 129 - if (ConstantVector *Mask = dyn_cast<ConstantVector>(II->getArgOperand(2))) { 130 - assert(Mask->getNumOperands() == 16 && "Bad type for intrinsic!"); 135 - if (!isa<ConstantInt>(Mask->getOperand(i)) && 136 - !isa<UndefValue>(Mask->getOperand(i))) { 145 - Mask->getType()); 147 - Mask->getType()); 155 - if (isa<UndefValue>(Mask->getOperand(i))) 157 - unsigned Idx=cast<ConstantInt>(Mask->getOperand(i))->getZExtValue(); 176 + // if (ConstantVector *Mask = dyn_cast<ConstantVector>(II->getArgOperand(2))) { 177 + // assert(Mask->getNumOperands() == 16 && "Bad type for intrinsic!"); [all …]
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