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Searched refs:REX (Results 1 – 25 of 33) sorted by relevance

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/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp961 uint8_t REX = 0; in DetermineREXPrefix() local
965 REX |= 1 << 3; // set REX.W in DetermineREXPrefix()
967 if (MI.getNumOperands() == 0) return REX; in DetermineREXPrefix()
982 REX |= 0x40; // REX fixed encoding prefix in DetermineREXPrefix()
988 REX |= isX86_64ExtendedReg(MI, CurOp++) << 0; // REX.B in DetermineREXPrefix()
991 REX |= isX86_64ExtendedReg(MI, CurOp++) << 2; // REX.R in DetermineREXPrefix()
992 REX |= isX86_64ExtendedReg(MI, CurOp++) << 0; // REX.B in DetermineREXPrefix()
995 REX |= isX86_64ExtendedReg(MI, CurOp++) << 2; // REX.R in DetermineREXPrefix()
996 REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B in DetermineREXPrefix()
997 REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrIndexReg) << 1; // REX.X in DetermineREXPrefix()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86CodeEmitter.cpp150 unsigned REX = 0; in determineREX() local
157 REX |= 1 << 3; in determineREX()
171 REX |= 0x40; in determineREX()
178 REX |= (1 << 0) | (1 << 2); in determineREX()
182 REX |= 1 << 2; in determineREX()
187 REX |= 1 << 0; in determineREX()
193 REX |= 1 << 2; in determineREX()
200 REX |= 1 << Bit; in determineREX()
214 REX |= 1 << 2; in determineREX()
220 REX |= 1 << Bit; in determineREX()
[all …]
DX86RegisterInfo.td49 // X86-64 only, requires REX.
66 // with a REX prefix.
87 // X86-64 only, requires REX.
110 // X86-64 only, requires REX
133 // These also require REX.
285 // instruction requiring a REX prefix, while SIL, DIL, BPL, R8D, etc.
286 // require a REX prefix. For example, "addb %ah, %dil" and "movzbl %ah, %r8d"
366 // GR8_NOREX - GR8 registers which do not require a REX prefix.
374 // GR16_NOREX - GR16 registers which do not require a REX prefix.
379 // GR32_NOREX - GR32 registers which do not require a REX prefix.
[all …]
DREADME-X86-64.txt45 requiring REX prefix. However, divb and mulb both produce results in AH. If isel
DX86InstrExtension.td88 // MOVSX64rr8 always has a REX prefix and it has an 8-bit register
DX86InstrFormats.td143 bit hasREX_WPrefix = 0; // Does this inst require the REX.W prefix?
DX86InstrInfo.td284 // plain GR64, so that it doesn't potentially require a REX prefix.
963 // encoded when a REX prefix is present.
DX86InstrArithmetic.td562 /// the 0x40 REX prefix. This is set for i64 types.
/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp625 unsigned REX = 0; in DetermineREXPrefix() local
627 REX |= 1 << 3; // set REX.W in DetermineREXPrefix()
629 if (MI.getNumOperands() == 0) return REX; in DetermineREXPrefix()
645 REX |= 0x40; // REX fixed encoding prefix in DetermineREXPrefix()
654 REX |= 1 << 2; // set REX.R in DetermineREXPrefix()
659 REX |= 1 << 0; // set REX.B in DetermineREXPrefix()
665 REX |= 1 << 2; // set REX.R in DetermineREXPrefix()
672 REX |= 1 << Bit; // set REX.B (Bit=0) and REX.X (Bit=1) in DetermineREXPrefix()
687 REX |= 1 << 2; // set REX.R in DetermineREXPrefix()
693 REX |= 1 << Bit; // REX.B (Bit=0) and REX.X (Bit=1) in DetermineREXPrefix()
[all …]
/external/llvm/lib/Target/X86/
DX86RegisterInfo.td54 // with a REX prefix.
60 // X86-64 only, requires REX.
91 // X86-64 only, requires REX.
115 // X86-64 only, requires REX
138 // These also require REX.
325 // instruction requiring a REX prefix, while SIL, DIL, BPL, R8D, etc.
326 // require a REX prefix. For example, "addb %ah, %dil" and "movzbl %ah, %r8d"
380 // GR8_NOREX - GR8 registers which do not require a REX prefix.
388 // GR16_NOREX - GR16 registers which do not require a REX prefix.
391 // GR32_NOREX - GR32 registers which do not require a REX prefix.
[all …]
DREADME-X86-64.txt45 requiring REX prefix. However, divb and mulb both produce results in AH. If isel
DX86InstrExtension.td119 // MOVSX64rr8 always has a REX prefix and it has an 8-bit register
DX86InstrCompiler.td1415 // This can also reduce instruction size by eliminating the need for the REX
1592 // cases. This uses a bunch of code to prevent a register requiring a REX prefix
DX86InstrFormats.td259 bit hasREX_WPrefix = 0; // Does this inst require the REX.W prefix?
DX86InstrArithmetic.td611 /// the 0x40 REX prefix. This is set for i64 types.
/external/llvm/test/MC/Disassembler/X86/
Dprefixes.txt64 # Test that MMX ignore REX.R and REX.B.
Dx86-64.txt424 # Try all combinations of EVEX.x and REX.b:
/external/llvm/test/CodeGen/X86/
Dtail-call-win64.ll11 ; Check that we merge the REX prefixes into 0x49 instead of 0x48, 0x41.
Dnorex-subreg.ll11 ; REX prefix, so the destination register must be GR8_NOREX. The code above
/external/valgrind/docs/internals/
D3_7_BUGSTATUS.txt48 == 278744 REX.W CVTPS2PD
49 **possible 3.8.0 (redundant REX prefix)
D3_8_BUGSTATUS.txt140 redundant-REX, should be easy to fix
D3_2_BUGSTATUS.txt182 vx1740 vx1754 32 n-i-bz handle REX.W fsqrt
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dnorex-subreg.ll11 ; REX prefix, so the destination register must be GR8_NOREX. The code above
/external/pcre/dist2/src/sljit/
DsljitNativeX86_common.c114 #define REX 0x40 macro
2720 *inst++ = (reg_map[TMP_REG1] <= 7) ? REX : REX_B;
2724 *inst++ = REX | (reg_map[TMP_REG1] <= 7 ? 0 : REX_R) | (reg_map[dst] <= 7 ? 0 : REX_B);
2736 *inst++ = (reg_map[reg] <= 7) ? REX : REX_B;
DsljitNativeX86_64.c378 rex |= REX; in emit_x86_instruction()

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