| /external/llvm/test/CodeGen/AMDGPU/ |
| D | unsupported-cc.ll | 30 ; CHECK: SETGE * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
44 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}}
117 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
|
| D | llvm.round.ll | 20 ; R600-DAG: SETGE
|
| D | setcc.ll | 143 ; R600: SETGE
170 ; R600: SETGE
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | Analysis.cpp | 157 case FCmpInst::FCMP_OGE: FOC = ISD::SETGE; FPC = ISD::SETOGE; break; in getFCmpCondCode()
165 case FCmpInst::FCMP_UGE: FOC = ISD::SETGE; FPC = ISD::SETUGE; break; in getFCmpCondCode()
190 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 734 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator
746 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 872 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator
884 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUISelLowering.cpp | 236 ISD::SETGE); in LowerUDIVREM()
242 ISD::SETGE); in LowerUDIVREM()
|
| D | AMDGPUInstructions.td | 60 case ISD::SETGE: return true;}}}]
|
| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 191 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
205 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
|
| D | TargetLoweringBase.cpp | 771 CCs[RTLIB::OGE_F32] = ISD::SETGE; in InitCmpLibcallCCs()
772 CCs[RTLIB::OGE_F64] = ISD::SETGE; in InitCmpLibcallCCs()
773 CCs[RTLIB::OGE_F128] = ISD::SETGE; in InitCmpLibcallCCs()
774 CCs[RTLIB::OGE_PPCF128] = ISD::SETGE; in InitCmpLibcallCCs()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 51 defm GE_S : ComparisonInt<SETGE, "ge_s">;
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSelectCCInfo.td | 63 IntRegs:$fval, SETGE)),
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 101 defm SETGE : SETCC<0x9D, "setge", X86_COND_GE>; // signed greater or equal
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 109 defm SETGE : SETCC<0x9D, "setge", X86_COND_GE>; // signed greater or equal
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 529 CCs[RTLIB::OGE_F32] = ISD::SETGE; in InitCmpLibcallCCs()
530 CCs[RTLIB::OGE_F64] = ISD::SETGE; in InitCmpLibcallCCs()
2089 case ISD::SETGE: in SimplifySetCC()
2239 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { in SimplifySetCC()
2244 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); in SimplifySetCC()
2257 if ((Cond == ISD::SETGE || Cond == ISD::SETUGE) && C1 == MinVal) in SimplifySetCC()
2561 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> ~X | Y in SimplifySetCC()
|
| D | LegalizeIntegerTypes.cpp | 827 case ISD::SETGE: in PromoteSetCCOperands()
2005 SDValue LHSSign = DAG.getSetCC(dl, OType, LHS, Zero, ISD::SETGE); in ExpandIntRes_SADDSUBO()
2006 SDValue RHSSign = DAG.getSetCC(dl, OType, RHS, Zero, ISD::SETGE); in ExpandIntRes_SADDSUBO()
2011 SDValue SumSign = DAG.getSetCC(dl, OType, Sum, Zero, ISD::SETGE); in ExpandIntRes_SADDSUBO()
2516 case ISD::SETGE: in IntegerExpandSetCCOperands()
2544 (CCCode == ISD::SETLE || CCCode == ISD::SETGE || in IntegerExpandSetCCOperands()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 101 [{return N->get() == ISD::SETOGE || N->get() == ISD::SETGE;}]
141 def COND_SGE : PatLeaf <(cond), [{return N->get() == ISD::SETGE;}]>;
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelDAGToDAG.cpp | 319 case ISD::SETGE: case ISD::SETOGE: case ISD::SETUGE: in Select()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrQPX.td | 1027 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETGE),
1074 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETGE),
1127 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETGE)),
1148 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETGE)),
1169 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETGE)),
|
| D | PPCInstrInfo.td | 2988 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETGE)),
3096 defm : ExtSetCCPat<SETGE,
3128 defm : ExtSetCCPat<SETGE,
3183 defm : CRNotPat<(i1 (setcc i32:$s1, imm32SExt16:$imm, SETGE)),
3211 defm : CRNotPat<(i1 (setcc i32:$s1, i32:$s2, SETGE)),
3251 defm : CRNotPat<(i1 (setcc i64:$s1, imm64SExt16:$imm, SETGE)),
3279 defm : CRNotPat<(i1 (setcc i64:$s1, i64:$s2, SETGE)),
3306 defm : CRNotPat<(i1 (setcc f32:$s1, f32:$s2, SETGE)),
3337 defm : CRNotPat<(i1 (setcc f64:$s1, f64:$s2, SETGE)),
3373 def : Pat <(i1 (selectcc i1:$lhs, i1:$rhs, i1:$tval, i1:$fval, SETGE)),
[all …]
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeInstrInfo.td | 766 def : Pat<(setcc (i32 GPR:$L), (i32 GPR:$R), SETGE),
803 (i32 GPR:$T), (i32 GPR:$F), SETGE),
838 def : Pat<(brcond (setcc (i32 GPR:$L), (i32 GPR:$R), SETGE), bb:$T),
|
| D | MBlazeInstrFPU.td | 163 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETGE),
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 563 case ISD::SETGE: return PPC::PRED_GE; in getPredicateForSetCC()
591 case ISD::SETGE: Invert = true; return 0; // !Bit #0 = SETUGE in getCRIdxForSetCC()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 173 case ISD::SETGE: in softenSetCCOperands()
1584 case ISD::SETGE: in SimplifySetCC()
1748 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { in SimplifySetCC()
1752 ISD::CondCode NewCC = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT; in SimplifySetCC()
1780 if ((Cond == ISD::SETGE || Cond == ISD::SETUGE) && C1 == MinVal) in SimplifySetCC()
2157 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> ~X | Y in SimplifySetCC()
|
| D | LegalizeIntegerTypes.cpp | 980 case ISD::SETGE: in PromoteSetCCOperands()
2281 SDValue LHSSign = DAG.getSetCC(dl, OType, LHS, Zero, ISD::SETGE); in ExpandIntRes_SADDSUBO()
2282 SDValue RHSSign = DAG.getSetCC(dl, OType, RHS, Zero, ISD::SETGE); in ExpandIntRes_SADDSUBO()
2287 SDValue SumSign = DAG.getSetCC(dl, OType, Sum, Zero, ISD::SETGE); in ExpandIntRes_SADDSUBO()
2839 case ISD::SETGE: in IntegerExpandSetCCOperands()
2872 (CCCode == ISD::SETLE || CCCode == ISD::SETGE || in IntegerExpandSetCCOperands()
2904 case ISD::SETLE: CCCode = ISD::SETGE; FlipOperands = true; break; in IntegerExpandSetCCOperands()
|