| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | Analysis.cpp | 160 case FCmpInst::FCMP_ONE: FOC = ISD::SETNE; FPC = ISD::SETONE; break; in getFCmpCondCode()
168 case FCmpInst::FCMP_UNE: FOC = ISD::SETNE; FPC = ISD::SETUNE; break; in getFCmpCondCode()
187 case ICmpInst::ICMP_NE: return ISD::SETNE; in getICmpCondCode()
198 return ISD::SETNE; in getICmpCondCode()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSelectCCInfo.td | 20 IntRegs:$fval, SETNE)),
80 // and similarly for SETNE
83 IntRegs:$fval, SETNE)),
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 527 CCs[RTLIB::UNE_F32] = ISD::SETNE; in InitCmpLibcallCCs()
528 CCs[RTLIB::UNE_F64] = ISD::SETNE; in InitCmpLibcallCCs()
537 CCs[RTLIB::UO_F32] = ISD::SETNE; in InitCmpLibcallCCs()
538 CCs[RTLIB::UO_F64] = ISD::SETNE; in InitCmpLibcallCCs()
1938 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
1943 Cond = ISD::SETNE; in SimplifySetCC()
1972 ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE; in SimplifySetCC()
1981 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) { in SimplifySetCC()
2087 case ISD::SETNE: return DAG.getConstant(1, VT); in SimplifySetCC()
2104 case ISD::SETNE: in SimplifySetCC()
[all …]
|
| D | LegalizeIntegerTypes.cpp | 465 Ofl = DAG.getSetCC(dl, N->getValueType(1), Ofl, Res, ISD::SETNE); in PromoteIntRes_SADDSUBO()
627 Ofl = DAG.getSetCC(dl, N->getValueType(1), Ofl, Res, ISD::SETNE); in PromoteIntRes_UADDSUBO()
664 DAG.getConstant(0, Hi.getValueType()), ISD::SETNE); in PromoteIntRes_XMULO()
669 Overflow = DAG.getSetCC(DL, N->getValueType(1), SExt, Mul, ISD::SETNE); in PromoteIntRes_XMULO()
816 case ISD::SETNE: in PromoteSetCCOperands()
1703 DAG.getConstant(0, NVT), ISD::SETNE); in ExpandIntRes_CTLZ()
1733 DAG.getConstant(0, NVT), ISD::SETNE); in ExpandIntRes_CTTZ()
2009 ISD::SETEQ : ISD::SETNE); in ExpandIntRes_SADDSUBO()
2012 SDValue SumSignNE = DAG.getSetCC(dl, OType, LHSSign, SumSign, ISD::SETNE); in ExpandIntRes_SADDSUBO()
2260 RHS, DAG.getConstant(0, VT), ISD::SETNE); in ExpandIntRes_XMULO()
[all …]
|
| D | LegalizeFloatTypes.cpp | 627 case ISD::SETNE: in SoftenSetCCOperands()
721 CCCode = ISD::SETNE; in SoftenFloatOp_BR_CC()
763 CCCode = ISD::SETNE; in SoftenFloatOp_SELECT_CC()
1332 CCCode = ISD::SETNE; in ExpandFloatOp_BR_CC()
1413 CCCode = ISD::SETNE; in ExpandFloatOp_SELECT_CC()
|
| D | LegalizeDAG.cpp | 2001 case ISD::SETONE: CC1 = ISD::SETNE; CC2 = ISD::SETO; Opc = ISD::AND; break; in LegalizeSetCCCondCode()
2007 case ISD::SETUNE: CC1 = ISD::SETNE; CC2 = ISD::SETUO; Opc = ISD::OR; break; in LegalizeSetCCCondCode()
2578 And2, DAG.getConstant(UINT64_C(0), MVT::i64), ISD::SETNE); in ExpandLegalINT_TO_FP()
3576 ISD::SETEQ : ISD::SETNE); in ExpandNode()
3579 SDValue SumSignNE = DAG.getSetCC(dl, OType, LHSSign, SumSign, ISD::SETNE); in ExpandNode()
3667 ISD::SETNE); in ExpandNode()
3670 DAG.getConstant(0, VT), ISD::SETNE); in ExpandNode()
3697 Tmp2, Tmp3, ISD::SETNE); in ExpandNode()
3748 DAG.getCondCode(ISD::SETNE), Tmp3, in ExpandNode()
3786 CC = DAG.getCondCode(ISD::SETNE); in ExpandNode()
[all …]
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 167 case ISD::SETNE: in softenSetCCOperands()
1293 (Cond != ISD::SETEQ && Cond != ISD::SETNE)) in simplifySetCCWithAnd()
1382 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
1387 Cond = ISD::SETNE; in SimplifySetCC()
1416 ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE; in SimplifySetCC()
1425 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
1493 (!N1C->isNullValue() && Cond == ISD::SETNE); in SimplifySetCC()
1582 case ISD::SETNE: return DAG.getConstant(1, dl, VT); in SimplifySetCC()
1599 case ISD::SETNE: in SimplifySetCC()
1622 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) { in SimplifySetCC()
[all …]
|
| D | LegalizeIntegerTypes.cpp | 559 Ofl = DAG.getSetCC(dl, N->getValueType(1), Ofl, Res, ISD::SETNE); in PromoteIntRes_SADDSUBO()
751 Ofl = DAG.getSetCC(dl, N->getValueType(1), Ofl, Res, ISD::SETNE); in PromoteIntRes_UADDSUBO()
793 ISD::SETNE); in PromoteIntRes_XMULO()
798 Overflow = DAG.getSetCC(DL, N->getValueType(1), SExt, Mul, ISD::SETNE); in PromoteIntRes_XMULO()
950 case ISD::SETNE: { in PromoteSetCCOperands()
1967 DAG.getConstant(0, dl, NVT), ISD::SETNE); in ExpandIntRes_CTLZ()
1998 DAG.getConstant(0, dl, NVT), ISD::SETNE); in ExpandIntRes_CTTZ()
2285 ISD::SETEQ : ISD::SETNE); in ExpandIntRes_SADDSUBO()
2288 SDValue SumSignNE = DAG.getSetCC(dl, OType, LHSSign, SumSign, ISD::SETNE); in ExpandIntRes_SADDSUBO()
2562 ISD::SETNE); in ExpandIntRes_XMULO()
[all …]
|
| D | LegalizeDAG.cpp | 1454 DAG.getConstant(0, DL, IntVT), ISD::SETNE); in ExpandFCOPYSIGN()
1629 case ISD::SETNE: in LegalizeSetCCCondCode()
1632 InvCC = CCCode == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ; in LegalizeSetCCCondCode()
2395 ISD::SETNE); in ExpandLegalINT_TO_FP()
3348 ISD::SETEQ : ISD::SETNE); in ExpandNode()
3351 SDValue SumSignNE = DAG.getSetCC(dl, OType, LHSSign, SumSign, ISD::SETNE); in ExpandNode()
3454 ISD::SETNE); in ExpandNode()
3457 DAG.getConstant(0, dl, VT), ISD::SETNE); in ExpandNode()
3485 Tmp2, Tmp3, ISD::SETNE); in ExpandNode()
3538 DAG.getCondCode(ISD::SETNE), Tmp3, in ExpandNode()
[all …]
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 453 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
494 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
555 case ISD::SETNE: return PPC::PRED_NE; in getPredicateForSetCC()
595 case ISD::SETNE: Invert = true; return 2; // !Bit #2 = SETUNE in getCRIdxForSetCC()
629 case ISD::SETNE: { in SelectSETCC()
662 case ISD::SETNE: { in SelectSETCC()
1014 N2C->getZExtValue() == 1ULL && CC == ISD::SETNE && in Select()
|
| /external/mesa3d/src/mesa/x86/ |
| D | common_x86_asm.S | 66 SETNE (AL)
|
| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 767 CCs[RTLIB::UNE_F32] = ISD::SETNE; in InitCmpLibcallCCs()
768 CCs[RTLIB::UNE_F64] = ISD::SETNE; in InitCmpLibcallCCs()
769 CCs[RTLIB::UNE_F128] = ISD::SETNE; in InitCmpLibcallCCs()
770 CCs[RTLIB::UNE_PPCF128] = ISD::SETNE; in InitCmpLibcallCCs()
787 CCs[RTLIB::UO_F32] = ISD::SETNE; in InitCmpLibcallCCs()
788 CCs[RTLIB::UO_F64] = ISD::SETNE; in InitCmpLibcallCCs()
789 CCs[RTLIB::UO_F128] = ISD::SETNE; in InitCmpLibcallCCs()
790 CCs[RTLIB::UO_PPCF128] = ISD::SETNE; in InitCmpLibcallCCs()
|
| D | Analysis.cpp | 187 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
202 case ICmpInst::ICMP_NE: return ISD::SETNE; in getICmpCondCode()
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 737 SETNE, // 1 X 1 1 0 True if not equal enumerator
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 875 SETNE, // 1 X 1 1 0 True if not equal enumerator
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 209 setCmpLibcallCC(RTLIB::OEQ_F32, ISD::SETNE); in ARMTargetLowering()
210 setCmpLibcallCC(RTLIB::UNE_F32, ISD::SETNE); in ARMTargetLowering()
211 setCmpLibcallCC(RTLIB::OLT_F32, ISD::SETNE); in ARMTargetLowering()
212 setCmpLibcallCC(RTLIB::OLE_F32, ISD::SETNE); in ARMTargetLowering()
213 setCmpLibcallCC(RTLIB::OGE_F32, ISD::SETNE); in ARMTargetLowering()
214 setCmpLibcallCC(RTLIB::OGT_F32, ISD::SETNE); in ARMTargetLowering()
215 setCmpLibcallCC(RTLIB::UO_F32, ISD::SETNE); in ARMTargetLowering()
228 setCmpLibcallCC(RTLIB::OEQ_F64, ISD::SETNE); in ARMTargetLowering()
229 setCmpLibcallCC(RTLIB::UNE_F64, ISD::SETNE); in ARMTargetLowering()
230 setCmpLibcallCC(RTLIB::OLT_F64, ISD::SETNE); in ARMTargetLowering()
[all …]
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUInstructions.td | 47 case ISD::SETNE: return true;}}}]
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 91 [{return N->get() == ISD::SETONE || N->get() == ISD::SETNE;}]
133 [{return N->get() == ISD::SETUNE || N->get() == ISD::SETNE;}]
156 [{return N->get() == ISD::SETNE || N->get() == ISD::SETUNE;}]
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 44 defm NE : ComparisonInt<SETNE, "ne ">;
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 93 defm SETNE : SETCC<0x95, "setne", X86_COND_NE>; // not equal to
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 101 defm SETNE : SETCC<0x95, "setne", X86_COND_NE>; // not equal to
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 192 { RTLIB::OEQ_F32, "__eqsf2vfp", ISD::SETNE }, in ARMTargetLowering()
193 { RTLIB::UNE_F32, "__nesf2vfp", ISD::SETNE }, in ARMTargetLowering()
194 { RTLIB::OLT_F32, "__ltsf2vfp", ISD::SETNE }, in ARMTargetLowering()
195 { RTLIB::OLE_F32, "__lesf2vfp", ISD::SETNE }, in ARMTargetLowering()
196 { RTLIB::OGE_F32, "__gesf2vfp", ISD::SETNE }, in ARMTargetLowering()
197 { RTLIB::OGT_F32, "__gtsf2vfp", ISD::SETNE }, in ARMTargetLowering()
198 { RTLIB::UO_F32, "__unordsf2vfp", ISD::SETNE }, in ARMTargetLowering()
202 { RTLIB::OEQ_F64, "__eqdf2vfp", ISD::SETNE }, in ARMTargetLowering()
203 { RTLIB::UNE_F64, "__nedf2vfp", ISD::SETNE }, in ARMTargetLowering()
204 { RTLIB::OLT_F64, "__ltdf2vfp", ISD::SETNE }, in ARMTargetLowering()
[all …]
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 1992 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
2036 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
2100 case ISD::SETNE: return PPC::PRED_NE; in getPredicateForSetCC()
2136 case ISD::SETNE: Invert = true; return 2; // !Bit #2 = SETUNE in getCRIdxForSetCC()
2170 case ISD::SETNE: CC = ISD::SETEQ; Negate = true; break; in getVCmpInst()
2214 case ISD::SETNE: CC = ISD::SETEQ; Negate = true; break; in getVCmpInst()
2284 case ISD::SETNE: { in trySETCC()
2322 case ISD::SETNE: { in trySETCC()
2780 N2C->getZExtValue() == 1ULL && CC == ISD::SETNE && in Select()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelDAGToDAG.cpp | 321 case ISD::SETNE: case ISD::SETONE: case ISD::SETUNE: in Select()
|
| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXISelLowering.cpp | 161 (CC == ISD::SETEQ || CC == ISD::SETNE)) { in LowerSETCC()
|