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Searched refs:SUnit (Results 1 – 25 of 77) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DResourcePriorityQueue.h31 struct resource_sort : public std::binary_function<SUnit*, SUnit*, bool> {
35 bool operator()(const SUnit* left, const SUnit* right) const;
40 std::vector<SUnit> *SUnits;
49 std::vector<SUnit*> Queue;
71 std::vector<SUnit*> Packet;
82 void initNodes(std::vector<SUnit> &sunits) override;
84 void addNode(const SUnit *SU) override { in addNode()
88 void updateNode(const SUnit *SU) override {} in updateNode()
106 int SUSchedulingCost (SUnit *SU);
110 void initNumRegDefsLeft(SUnit *SU);
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DScheduleDAG.h28 class SUnit; variable
76 PointerIntPair<SUnit *, 2, Kind> Dep;
101 SDep(SUnit *S, Kind kind, unsigned Reg) in SDep()
119 SDep(SUnit *S, OrderKind kind) in SDep()
149 SUnit *getSUnit() const;
152 void setSUnit(SUnit *SU);
244 class SUnit {
251 SUnit *OrigNode; // If not this, the node from which
308 SUnit(SDNode *node, unsigned nodenum)
324 SUnit(MachineInstr *instr, unsigned nodenum)
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DMachineScheduler.h205 virtual SUnit *pickNode(bool &IsTopNode) = 0;
212 virtual void schedNode(SUnit *SU, bool IsTopNode) = 0;
216 virtual void releaseTopNode(SUnit *SU) = 0;
219 virtual void releaseBottomNode(SUnit *SU) = 0;
246 const SUnit *NextClusterPred;
247 const SUnit *NextClusterSucc;
286 bool canAddEdge(SUnit *SuccSU, SUnit *PredSU);
293 bool addEdge(SUnit *SuccSU, const SDep &PredDep);
314 const SUnit *getNextClusterPred() const { return NextClusterPred; } in getNextClusterPred()
316 const SUnit *getNextClusterSucc() const { return NextClusterSucc; } in getNextClusterSucc()
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DScheduleDAGInstrs.h38 SUnit *SU;
40 VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU) in VReg2SUnit()
53 unsigned OperandIndex, SUnit *SU) in VReg2SUnitOperIdx()
60 SUnit *SU;
64 PhysRegSUOper(SUnit *su, int op, unsigned R): SU(su), OpIdx(op), Reg(R) {} in PhysRegSUOper()
139 DenseMap<MachineInstr*, SUnit*> MISUnitMap;
168 SUnit *BarrierChain;
177 typedef std::list<SUnit *> SUList;
190 void addChainDependency(SUnit *SUa, SUnit *SUb,
194 void addChainDependencies(SUnit *SU, SUList &sus, unsigned Latency) { in addChainDependencies()
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DLatencyPriorityQueue.h25 struct latency_sort : public std::binary_function<SUnit*, SUnit*, bool> {
29 bool operator()(const SUnit* left, const SUnit* right) const;
34 std::vector<SUnit> *SUnits;
43 std::vector<SUnit*> Queue;
52 void initNodes(std::vector<SUnit> &sunits) override { in initNodes()
57 void addNode(const SUnit *SU) override { in addNode()
61 void updateNode(const SUnit *SU) override { in updateNode()
80 void push(SUnit *U) override;
82 SUnit *pop() override;
84 void remove(SUnit *SU) override;
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DScheduleDAG.h28 class SUnit; variable
57 PointerIntPair<SUnit *, 2, Kind> Dep;
95 SDep(SUnit *S, Kind kind, unsigned latency = 1, unsigned Reg = 0,
154 SUnit *getSUnit() const { in getSUnit()
159 void setSUnit(SUnit *SU) { in setSUnit()
228 class SUnit {
233 SUnit *OrigNode; // If not this, the node from which
279 SUnit(SDNode *node, unsigned nodenum)
293 SUnit(MachineInstr *instr, unsigned nodenum)
306 SUnit()
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DLatencyPriorityQueue.h25 struct latency_sort : public std::binary_function<SUnit*, SUnit*, bool> {
29 bool operator()(const SUnit* left, const SUnit* right) const;
34 std::vector<SUnit> *SUnits;
43 std::vector<SUnit*> Queue;
52 void initNodes(std::vector<SUnit> &sunits) { in initNodes()
57 void addNode(const SUnit *SU) { in addNode()
61 void updateNode(const SUnit *SU) { in updateNode()
80 virtual void push(SUnit *U);
82 virtual SUnit *pop();
84 virtual void remove(SUnit *SU);
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/external/llvm/lib/CodeGen/
DScheduleDAG.cpp52 EntrySU = SUnit(); in clearDAG()
53 ExitSU = SUnit(); in clearDAG()
65 bool SUnit::addPred(const SDep &D, bool Required) { in addPred()
76 SUnit *PredSU = I->getSUnit(); in addPred()
95 SUnit *N = D.getSUnit(); in addPred()
133 void SUnit::removePred(const SDep &D) { in removePred()
141 SUnit *N = D.getSUnit(); in removePred()
178 void SUnit::setDepthDirty() { in setDepthDirty()
180 SmallVector<SUnit*, 8> WorkList; in setDepthDirty()
183 SUnit *SU = WorkList.pop_back_val(); in setDepthDirty()
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DLatencyPriorityQueue.cpp23 bool latency_sort::operator()(const SUnit *LHS, const SUnit *RHS) const { in operator ()()
56 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { in getSingleUnscheduledPred()
57 SUnit *OnlyAvailablePred = nullptr; in getSingleUnscheduledPred()
58 for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in getSingleUnscheduledPred()
60 SUnit &Pred = *I->getSUnit(); in getSingleUnscheduledPred()
73 void LatencyPriorityQueue::push(SUnit *SU) { in push()
77 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in push()
92 void LatencyPriorityQueue::scheduledNode(SUnit *SU) { in scheduledNode()
93 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in scheduledNode()
105 void LatencyPriorityQueue::AdjustPriorityOfUnscheduledPreds(SUnit *SU) { in AdjustPriorityOfUnscheduledPreds()
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DMachinePipeliner.cpp220 SetVector<SUnit *> NodeOrder;
228 DenseMap<SUnit *, std::pair<unsigned, int64_t>> InstrChanges;
236 std::vector<SUnit> &SUnits;
237 SetVector<SUnit *> Stack;
239 SmallVector<SmallPtrSet<SUnit *, 4>, 10> B;
245 Circuits(std::vector<SUnit> &SUs) in Circuits()
252 B.assign(SUnits.size(), SmallPtrSet<SUnit *, 4>()); in reset()
274 int getASAP(SUnit *Node) { return ScheduleInfo[Node->NodeNum].ASAP; } in getASAP()
277 int getALAP(SUnit *Node) { return ScheduleInfo[Node->NodeNum].ALAP; } in getALAP()
281 int getMOV(SUnit *Node) { return getALAP(Node) - getASAP(Node); } in getMOV()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/
DScheduleDAG.cpp56 if (SUnit *SU = Sequence[i]) in dumpSchedule()
73 EntrySU = SUnit(); in Run()
74 ExitSU = SUnit(); in Run()
88 bool SUnit::addPred(const SDep &D) { in addPred()
97 SUnit *N = D.getSUnit(); in addPred()
125 void SUnit::removePred(const SDep &D) { in removePred()
134 SUnit *N = D.getSUnit(); in removePred()
168 void SUnit::setDepthDirty() { in setDepthDirty()
170 SmallVector<SUnit*, 8> WorkList; in setDepthDirty()
173 SUnit *SU = WorkList.pop_back_val(); in setDepthDirty()
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DLatencyPriorityQueue.cpp22 bool latency_sort::operator()(const SUnit *LHS, const SUnit *RHS) const { in operator ()()
55 SUnit *LatencyPriorityQueue::getSingleUnscheduledPred(SUnit *SU) { in getSingleUnscheduledPred()
56 SUnit *OnlyAvailablePred = 0; in getSingleUnscheduledPred()
57 for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in getSingleUnscheduledPred()
59 SUnit &Pred = *I->getSUnit(); in getSingleUnscheduledPred()
72 void LatencyPriorityQueue::push(SUnit *SU) { in push()
76 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in push()
91 void LatencyPriorityQueue::ScheduledNode(SUnit *SU) { in ScheduledNode()
92 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in ScheduledNode()
104 void LatencyPriorityQueue::AdjustPriorityOfUnscheduledPreds(SUnit *SU) { in AdjustPriorityOfUnscheduledPreds()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DScheduleDAGRRList.cpp139 std::vector<SUnit*> PendingQueue;
158 std::vector<SUnit*> LiveRegDefs;
159 std::vector<SUnit*> LiveRegGens;
190 bool IsReachable(const SUnit *SU, const SUnit *TargetSU) { in IsReachable()
196 bool WillCreateCycle(SUnit *SU, SUnit *TargetSU) { in WillCreateCycle()
203 void AddPred(SUnit *SU, const SDep &D) { in AddPred()
211 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
217 bool isReady(SUnit *SU) { in isReady()
222 void ReleasePred(SUnit *SU, const SDep *PredEdge);
223 void ReleasePredecessors(SUnit *SU);
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DScheduleDAGFast.cpp43 SmallVector<SUnit *, 16> Queue;
47 void push(SUnit *U) { in push()
51 SUnit *pop() { in pop()
53 SUnit *V = Queue.back(); in pop()
71 std::vector<SUnit*> LiveRegDefs;
82 void AddPred(SUnit *SU, const SDep &D) { in AddPred()
88 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
93 void ReleasePred(SUnit *SU, SDep *PredEdge);
94 void ReleasePredecessors(SUnit *SU, unsigned CurCycle);
95 void ScheduleNodeBottomUp(SUnit*, unsigned);
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DScheduleDAGSDNodes.h70 SUnit *NewSUnit(SDNode *N);
75 SUnit *Clone(SUnit *N);
87 void InitVRegCycleFlag(SUnit *SU);
91 void InitNumRegDefsLeft(SUnit *SU);
95 virtual void ComputeLatency(SUnit *SU);
100 virtual void ComputeOperandLatency(SUnit *Def, SUnit *Use, in ComputeOperandLatency()
113 virtual void dumpNode(const SUnit *SU) const;
115 virtual std::string getGraphNodeLabel(const SUnit *SU) const;
129 RegDefIter(const SUnit *SU, const ScheduleDAGSDNodes *SD);
DScheduleDAGList.cpp59 std::vector<SUnit*> PendingQueue;
81 void ReleaseSucc(SUnit *SU, const SDep &D);
82 void ReleaseSuccessors(SUnit *SU);
83 void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
108 void ScheduleDAGList::ReleaseSucc(SUnit *SU, const SDep &D) { in ReleaseSucc()
109 SUnit *SuccSU = D.getSUnit(); in ReleaseSucc()
129 void ScheduleDAGList::ReleaseSuccessors(SUnit *SU) { in ReleaseSuccessors()
131 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in ReleaseSuccessors()
143 void ScheduleDAGList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { in ScheduleNodeTopDown()
175 std::vector<SUnit*> NotReady; in ListScheduleTopDown()
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/external/llvm/lib/Target/AMDGPU/
DR600MachineScheduler.h53 std::vector<SUnit *> Available[IDLast], Pending[IDLast];
54 std::vector<SUnit *> AvailableAlus[AluLast];
55 std::vector<SUnit *> PhysicalRegCopy;
76 SUnit *pickNode(bool &IsTopNode) override;
77 void schedNode(SUnit *SU, bool IsTopNode) override;
78 void releaseTopNode(SUnit *SU) override;
79 void releaseBottomNode(SUnit *SU) override;
85 int getInstKind(SUnit *SU);
87 AluKind getAluKind(SUnit *SU) const;
90 SUnit *AttemptFillSlot (unsigned Slot, bool AnyAlu);
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DR600MachineScheduler.cpp45 void R600SchedStrategy::MoveUnits(std::vector<SUnit *> &QSrc, in MoveUnits()
46 std::vector<SUnit *> &QDst) in MoveUnits()
57 SUnit* R600SchedStrategy::pickNode(bool &IsTopNode) { in pickNode()
58 SUnit *SU = nullptr; in pickNode()
134 const SUnit &S = DAG->SUnits[i]; in pickNode()
144 void R600SchedStrategy::schedNode(SUnit *SU, bool IsTopNode) { in schedNode()
192 void R600SchedStrategy::releaseTopNode(SUnit *SU) { in releaseTopNode()
196 void R600SchedStrategy::releaseBottomNode(SUnit *SU) { in releaseBottomNode()
222 R600SchedStrategy::AluKind R600SchedStrategy::getAluKind(SUnit *SU) const { in getAluKind()
295 int R600SchedStrategy::getInstKind(SUnit* SU) { in getInstKind()
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/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGRRList.cpp125 std::vector<SUnit*> PendingQueue;
144 std::unique_ptr<SUnit*[]> LiveRegDefs;
145 std::unique_ptr<SUnit*[]> LiveRegGens;
149 SmallVector<SUnit*, 4> Interferences;
150 typedef DenseMap<SUnit*, SmallVector<unsigned, 4> > LRegsMapT;
159 DenseMap<SUnit*, SUnit*> CallSeqEndForStart;
186 bool IsReachable(const SUnit *SU, const SUnit *TargetSU) { in IsReachable()
192 bool WillCreateCycle(SUnit *SU, SUnit *TargetSU) { in WillCreateCycle()
199 void AddPred(SUnit *SU, const SDep &D) { in AddPred()
207 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
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DScheduleDAGFast.cpp49 SmallVector<SUnit *, 16> Queue;
53 void push(SUnit *U) { in push()
57 SUnit *pop() { in pop()
59 SUnit *V = Queue.back(); in pop()
77 std::vector<SUnit*> LiveRegDefs;
88 void AddPred(SUnit *SU, const SDep &D) { in AddPred()
94 void RemovePred(SUnit *SU, const SDep &D) { in RemovePred()
99 void ReleasePred(SUnit *SU, SDep *PredEdge);
100 void ReleasePredecessors(SUnit *SU, unsigned CurCycle);
101 void ScheduleNodeBottomUp(SUnit*, unsigned);
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DResourcePriorityQueue.cpp70 ResourcePriorityQueue::numberRCValPredInSU(SUnit *SU, unsigned RCId) { in numberRCValPredInSU()
72 for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in numberRCValPredInSU()
77 SUnit *PredSU = I->getSUnit(); in numberRCValPredInSU()
107 unsigned ResourcePriorityQueue::numberRCValSuccInSU(SUnit *SU, in numberRCValSuccInSU()
110 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in numberRCValSuccInSU()
115 SUnit *SuccSU = I->getSUnit(); in numberRCValSuccInSU()
145 static unsigned numberCtrlDepsInSU(SUnit *SU) { in numberCtrlDepsInSU()
147 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in numberCtrlDepsInSU()
155 static unsigned numberCtrlPredInSU(SUnit *SU) { in numberCtrlPredInSU()
157 for (SUnit::pred_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in numberCtrlPredInSU()
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DScheduleDAGSDNodes.h43 std::vector<SUnit*> Sequence;
76 SUnit *newSUnit(SDNode *N);
81 SUnit *Clone(SUnit *N);
91 void InitNumRegDefsLeft(SUnit *SU);
95 virtual void computeLatency(SUnit *SU);
115 void dumpNode(const SUnit *SU) const override;
119 std::string getGraphNodeLabel(const SUnit *SU) const override;
135 RegDefIter(const SUnit *SU, const ScheduleDAGSDNodes *SD);
175 void EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, unsigned> &VRBaseMap,
/external/llvm/lib/Target/Hexagon/
DHexagonMachineScheduler.h50 std::vector<SUnit*> Packet;
86 bool isResourceAvailable(SUnit *SU);
87 bool reserveResources(SUnit *SU);
114 SUnit *SU;
175 bool checkHazard(SUnit *SU);
177 void releaseNode(SUnit *SU, unsigned ReadyCycle);
181 void bumpNode(SUnit *SU);
185 void removeReady(SUnit *SU);
187 SUnit *pickOnlyChoice();
211 SUnit *pickNode(bool &IsTopNode) override;
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DHexagonMachineScheduler.cpp25 SUnit* LastSequentialCall = nullptr; in postprocessDAG()
43 bool VLIWResourceModel::isResourceAvailable(SUnit *SU) { in isResourceAvailable()
68 for (SUnit::const_succ_iterator I = Packet[i]->Succs.begin(), in isResourceAvailable()
83 bool VLIWResourceModel::reserveResources(SUnit *SU) { in reserveResources()
156 SmallVector<SUnit*, 8> TopRoots, BotRoots; in schedule()
184 SUnit *SU = SchedImpl->pickNode(IsTopNode); in schedule()
228 void ConvergingVLIWScheduler::releaseTopNode(SUnit *SU) { in releaseTopNode()
232 for (SUnit::succ_iterator I = SU->Preds.begin(), E = SU->Preds.end(); in releaseTopNode()
245 void ConvergingVLIWScheduler::releaseBottomNode(SUnit *SU) { in releaseBottomNode()
251 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in releaseBottomNode()
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/external/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.h28 SmallVector<SUnit *, 7> CurGroup;
31 bool isLoadAfterStore(SUnit *SU);
32 bool isBCTRAfterSet(SUnit *SU);
40 HazardType getHazardType(SUnit *SU, int Stalls) override;
41 bool ShouldPreferAnother(SUnit* SU) override;
42 unsigned PreEmitNoops(SUnit *SU) override;
43 void EmitInstruction(SUnit *SU) override;
79 HazardType getHazardType(SUnit *SU, int Stalls) override;
80 void EmitInstruction(SUnit *SU) override;

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