| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | IntrinsicLowering.cpp | 308 Value *ShVal = ConstantInt::get(V->getType(), i); in LowerCTLZ() local
309 ShVal = Builder.CreateLShr(V, ShVal, "ctlz.sh"); in LowerCTLZ()
310 V = Builder.CreateOr(V, ShVal, "ctlz.step"); in LowerCTLZ()
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| /external/llvm/lib/CodeGen/ |
| D | IntrinsicLowering.cpp | 308 Value *ShVal = ConstantInt::get(V->getType(), i); in LowerCTLZ() local
309 ShVal = Builder.CreateLShr(V, ShVal, "ctlz.sh"); in LowerCTLZ()
310 V = Builder.CreateOr(V, ShVal, "ctlz.step"); in LowerCTLZ()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsLongBranch.cpp | 493 int ShVal = STI.inMicroMipsMode() ? 2 : 4; in runOnMachineFunction() local
494 int64_t Offset = computeOffset(I->Br) / ShVal; in runOnMachineFunction()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 797 SDValue ShVal = N.getNode()->getOperand(0); in MatchAddressRecursively() local
802 if (CurDAG->isBaseWithConstantOffset(ShVal)) { in MatchAddressRecursively()
803 AM.IndexReg = ShVal.getNode()->getOperand(0); in MatchAddressRecursively()
805 cast<ConstantSDNode>(ShVal.getNode()->getOperand(1)); in MatchAddressRecursively()
811 AM.IndexReg = ShVal; in MatchAddressRecursively()
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| D | X86ISelLowering.cpp | 4724 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { in isVectorShiftRight() argument
4750 ShVal = SVOp->getOperand(OpSrc); in isVectorShiftRight()
4757 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { in isVectorShiftLeft() argument
4783 ShVal = SVOp->getOperand(OpSrc); in isVectorShiftLeft()
4790 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { in isVectorShift() argument
4796 if (isVectorShiftLeft(SVOp, DAG, isLeft, ShVal, ShAmt) || in isVectorShift()
4797 isVectorShiftRight(SVOp, DAG, isLeft, ShVal, ShAmt)) in isVectorShift()
6630 SDValue ShVal; in LowerVECTOR_SHUFFLE() local
6632 isVectorShift(SVOp, DAG, isLeft, ShVal, ShAmt); in LowerVECTOR_SHUFFLE()
6633 if (isShift && ShVal.hasOneUse()) { in LowerVECTOR_SHUFFLE()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/ |
| D | GVN.cpp | 1064 Value *ShVal = Builder.CreateShl(Val, NumBytesSet*8); in GetMemInstValueForLoad() local
1065 Val = Builder.CreateOr(Val, ShVal); in GetMemInstValueForLoad()
1071 Value *ShVal = Builder.CreateShl(Val, 1*8); in GetMemInstValueForLoad() local
1072 Val = Builder.CreateOr(OneElt, ShVal); in GetMemInstValueForLoad()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 1188 SDValue ShVal = N.getNode()->getOperand(0); in matchAddressRecursively() local
1193 if (CurDAG->isBaseWithConstantOffset(ShVal)) { in matchAddressRecursively()
1194 AM.IndexReg = ShVal.getNode()->getOperand(0); in matchAddressRecursively()
1196 cast<ConstantSDNode>(ShVal.getNode()->getOperand(1)); in matchAddressRecursively()
1202 AM.IndexReg = ShVal; in matchAddressRecursively()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | GVN.cpp | 1107 Value *ShVal = Builder.CreateShl(Val, NumBytesSet*8); in GetMemInstValueForLoad() local
1108 Val = Builder.CreateOr(Val, ShVal); in GetMemInstValueForLoad()
1114 Value *ShVal = Builder.CreateShl(Val, 1*8); in GetMemInstValueForLoad() local
1115 Val = Builder.CreateOr(OneElt, ShVal); in GetMemInstValueForLoad()
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| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| D | InstCombineAndOrXor.cpp | 322 Value *ShVal = Op->getOperand(0); in OptAndOp() local
323 ShVal = Builder->CreateLShr(ShVal, OpRHS, Op->getName()); in OptAndOp()
324 return BinaryOperator::CreateAnd(ShVal, AndRHS, TheAnd.getName()); in OptAndOp()
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineAndOrXor.cpp | 275 Value *ShVal = Op->getOperand(0); in OptAndOp() local
276 ShVal = Builder->CreateLShr(ShVal, OpRHS, Op->getName()); in OptAndOp()
277 return BinaryOperator::CreateAnd(ShVal, AndRHS, TheAnd.getName()); in OptAndOp()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1742 uint64_t ShVal = ShAmt->getZExtValue(); in SimplifyDemandedBits() local
1744 TLO.DAG.getConstant(ShVal, getShiftAmountTy(Op.getValueType())); in SimplifyDemandedBits()
1799 unsigned ShVal = Op.getValueType().getSizeInBits()-1; in SimplifyDemandedBits() local
1800 SDValue ShAmt = TLO.DAG.getConstant(ShVal, Op.getValueType()); in SimplifyDemandedBits()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 1065 uint64_t ShVal = ShAmt->getZExtValue(); in SimplifyDemandedBits() local
1066 Shift = TLO.DAG.getConstant(ShVal, dl, in SimplifyDemandedBits()
1126 unsigned ShVal = Op.getValueType().getSizeInBits()-1; in SimplifyDemandedBits() local
1127 SDValue ShAmt = TLO.DAG.getConstant(ShVal, dl, Op.getValueType()); in SimplifyDemandedBits()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 274 unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt); in SelectArithImmed() local
277 Shift = CurDAG->getTargetConstant(ShVal, dl, MVT::i32); in SelectArithImmed()
354 unsigned ShVal = AArch64_AM::getShifterImm(ShType, Val); in SelectShiftedRegister() local
357 Shift = CurDAG->getTargetConstant(ShVal, SDLoc(N), MVT::i32); in SelectShiftedRegister()
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