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Searched refs:Tmp1 (Results 1 – 25 of 43) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp640 SDValue Tmp1 = Vec; in PerformInsertVectorEltInMemory() local
650 EVT VT = Tmp1.getValueType(); in PerformInsertVectorEltInMemory()
659 SDValue Ch = DAG.getStore(DAG.getEntryNode(), dl, Tmp1, StackPtr, in PerformInsertVectorEltInMemory()
714 SDValue Tmp1 = ST->getChain(); in OptimizeFloatStore() local
727 return DAG.getStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(), in OptimizeFloatStore()
736 return DAG.getStore(Tmp1, dl, Tmp3, Tmp2, ST->getPointerInfo(), in OptimizeFloatStore()
749 Lo = DAG.getStore(Tmp1, dl, Lo, Tmp2, ST->getPointerInfo(), isVolatile, in OptimizeFloatStore()
753 Hi = DAG.getStore(Tmp1, dl, Hi, Tmp2, in OptimizeFloatStore()
790 SDValue Tmp1, Tmp2, Tmp3, Tmp4; in LegalizeOp() local
954 Tmp1 = TLI.LowerOperation(Result, DAG); in LegalizeOp()
[all …]
DLegalizeVectorOps.cpp209 SDValue Tmp1 = TLI.LowerOperation(Op, DAG); in LegalizeOp() local
210 if (Tmp1.getNode()) { in LegalizeOp()
211 Result = Tmp1; in LegalizeOp()
DLegalizeFloatTypes.cpp1308 SDValue Tmp1, Tmp2, Tmp3; in FloatExpandSetCCOperands() local
1309 Tmp1 = DAG.getSetCC(dl, TLI.getSetCCResultType(LHSHi.getValueType()), in FloatExpandSetCCOperands()
1313 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
1314 Tmp1 = DAG.getSetCC(dl, TLI.getSetCCResultType(LHSHi.getValueType()), in FloatExpandSetCCOperands()
1318 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
1319 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3); in FloatExpandSetCCOperands()
DLegalizeIntegerTypes.cpp2527 SDValue Tmp1, Tmp2; in IntegerExpandSetCCOperands() local
2528 Tmp1 = TLI.SimplifySetCC(TLI.getSetCCResultType(LHSLo.getValueType()), in IntegerExpandSetCCOperands()
2530 if (!Tmp1.getNode()) in IntegerExpandSetCCOperands()
2531 Tmp1 = DAG.getSetCC(dl, TLI.getSetCCResultType(LHSLo.getValueType()), in IntegerExpandSetCCOperands()
2540 ConstantSDNode *Tmp1C = dyn_cast<ConstantSDNode>(Tmp1.getNode()); in IntegerExpandSetCCOperands()
2563 NewLHS = DAG.getNode(ISD::SELECT, dl, Tmp1.getValueType(), in IntegerExpandSetCCOperands()
2564 NewLHS, Tmp1, Tmp2); in IntegerExpandSetCCOperands()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp317 SDValue Tmp1 = Vec; in PerformInsertVectorEltInMemory() local
327 EVT VT = Tmp1.getValueType(); in PerformInsertVectorEltInMemory()
337 DAG.getEntryNode(), dl, Tmp1, StackPtr, in PerformInsertVectorEltInMemory()
1521 SDValue Tmp1 = SDValue(Node, 0); in ExpandDYNAMIC_STACKALLOC() local
1524 SDValue Chain = Tmp1.getOperand(0); in ExpandDYNAMIC_STACKALLOC()
1536 Tmp1 = DAG.getNode(ISD::SUB, dl, VT, SP, Size); // Value in ExpandDYNAMIC_STACKALLOC()
1538 Tmp1 = DAG.getNode(ISD::AND, dl, VT, Tmp1, in ExpandDYNAMIC_STACKALLOC()
1540 Chain = DAG.getCopyToReg(Chain, dl, SPReg, Tmp1); // Output chain in ExpandDYNAMIC_STACKALLOC()
1545 Results.push_back(Tmp1); in ExpandDYNAMIC_STACKALLOC()
2419 SDValue Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0); in ExpandLegalINT_TO_FP() local
[all …]
DLegalizeFloatTypes.cpp1549 SDValue Tmp1, Tmp2, Tmp3; in FloatExpandSetCCOperands() local
1550 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), in FloatExpandSetCCOperands()
1554 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
1555 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()), in FloatExpandSetCCOperands()
1559 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2); in FloatExpandSetCCOperands()
1560 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3); in FloatExpandSetCCOperands()
DLegalizeVectorOps.cpp361 if (SDValue Tmp1 = TLI.LowerOperation(Op, DAG)) { in LegalizeOp() local
362 Result = Tmp1; in LegalizeOp()
DLegalizeIntegerTypes.cpp2851 SDValue Tmp1, Tmp2; in IntegerExpandSetCCOperands() local
2854 Tmp1 = TLI.SimplifySetCC(getSetCCResultType(LHSLo.getValueType()), in IntegerExpandSetCCOperands()
2856 if (!Tmp1.getNode()) in IntegerExpandSetCCOperands()
2857 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()), in IntegerExpandSetCCOperands()
2868 ConstantSDNode *Tmp1C = dyn_cast<ConstantSDNode>(Tmp1.getNode()); in IntegerExpandSetCCOperands()
2887 NewLHS = Tmp1; in IntegerExpandSetCCOperands()
2932 NewLHS = DAG.getSelect(dl, Tmp1.getValueType(), in IntegerExpandSetCCOperands()
2933 NewLHS, Tmp1, Tmp2); in IntegerExpandSetCCOperands()
/external/pdfium/third_party/lcms2-2.6/src/
Dcmsintrp.c842 cmsUInt16Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval4Inputs() local
932 … Tmp1[OutChan] = (cmsUInt16Number) c0 + ROUND_FIXED_TO_INT(_cmsToFixedDomain(Rest)); in Eval4Inputs()
1002 Output[i] = LinearInterp(rk, Tmp1[i], Tmp2[i]); in Eval4Inputs()
1023 cmsFloat32Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval4InputsFloat() local
1039 TetrahedralInterpFloat(Input + 1, Tmp1, &p1); in Eval4InputsFloat()
1047 cmsFloat32Number y0 = Tmp1[i]; in Eval4InputsFloat()
1067 cmsUInt16Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval5Inputs() local
1084 Eval4Inputs(Input + 1, Tmp1, &p1); in Eval5Inputs()
1093 Output[i] = LinearInterp(rk, Tmp1[i], Tmp2[i]); in Eval5Inputs()
1110 cmsFloat32Number Tmp1[MAX_STAGE_CHANNELS], Tmp2[MAX_STAGE_CHANNELS]; in Eval5InputsFloat() local
[all …]
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DIntrinsicLowering.cpp176 Value *Tmp1 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
180 V = Builder.CreateOr(Tmp1, Tmp2, "bswap.i16"); in LowerBSWAP()
190 Value *Tmp1 = Builder.CreateLShr(V,ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
199 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or2"); in LowerBSWAP()
220 Value* Tmp1 = Builder.CreateLShr(V, in LowerBSWAP() local
250 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or4"); in LowerBSWAP()
/external/llvm/lib/Transforms/Utils/
DIntegerDivision.cpp132 Value *Tmp1 = Builder.CreateAShr(Divisor, Shift); in generateSignedDivisionCode() local
135 Value *Tmp3 = Builder.CreateXor(Tmp1, Divisor); in generateSignedDivisionCode()
136 Value *U_Dvsr = Builder.CreateSub(Tmp3, Tmp1); in generateSignedDivisionCode()
137 Value *Q_Sgn = Builder.CreateXor(Tmp1, Tmp); in generateSignedDivisionCode()
256 Value *Tmp1 = Builder.CreateCall(CTLZ, {Dividend, True}); in generateUnsignedDivisionCode() local
257 Value *SR = Builder.CreateSub(Tmp0, Tmp1); in generateUnsignedDivisionCode()
/external/llvm/lib/CodeGen/
DIntrinsicLowering.cpp176 Value *Tmp1 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
180 V = Builder.CreateOr(Tmp1, Tmp2, "bswap.i16"); in LowerBSWAP()
190 Value *Tmp1 = Builder.CreateLShr(V,ConstantInt::get(V->getType(), 24), in LowerBSWAP() local
199 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or2"); in LowerBSWAP()
220 Value* Tmp1 = Builder.CreateLShr(V, in LowerBSWAP() local
250 Tmp2 = Builder.CreateOr(Tmp2, Tmp1, "bswap.or4"); in LowerBSWAP()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelDAGToDAG.cpp1331 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in SelectAtomic64() local
1332 if (!SelectAddr(Node, In1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) in SelectAtomic64()
1336 const SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, In2L, In2H, Chain}; in SelectAtomic64()
1359 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in SelectAtomicLoadAdd() local
1360 if (!SelectAddr(Node, Ptr, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) in SelectAtomicLoadAdd()
1482 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Chain }; in SelectAtomicLoadAdd()
1488 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Val, Chain }; in SelectAtomicLoadAdd()
1571 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in SelectAtomicLoadArith() local
1572 if (!SelectAddr(Node, Ptr, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) in SelectAtomicLoadArith()
1643 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Val, Chain }; in SelectAtomicLoadArith()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp623 SDValue Tmp0, Tmp1, Tmp2; in Select() local
624 bool foldedLoad = TryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2); in Select()
644 SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) }; in Select()
705 SDValue Tmp0, Tmp1, Tmp2; in Select() local
706 bool foldedLoad = TryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2); in Select()
729 SDValue Ops[] = { DivVal, Tmp0, Tmp1, Tmp2, N1.getOperand(0) }; in Select()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUISelLowering.cpp244 SDValue Tmp1 = DAG.getNode(ISD::AND, DL, VT, Remainder_GE_Den, in LowerUDIVREM() local
258 SDValue Div = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, VT), in LowerUDIVREM()
274 SDValue Rem = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, VT), in LowerUDIVREM()
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
DAlphaISelLowering.cpp683 SDValue Tmp1 = Op.getNode()->getOpcode() == ISD::UREM ? in LowerOperation() local
686 Tmp1 = DAG.getNode(ISD::MUL, dl, VT, Tmp1, Op.getOperand(1)); in LowerOperation()
687 Tmp1 = DAG.getNode(ISD::SUB, dl, VT, Op.getOperand(0), Tmp1); in LowerOperation()
688 return Tmp1; in LowerOperation()
704 SDValue Tmp1 = Op.getOperand(0), in LowerOperation() local
707 return DAG.getNode(AlphaISD::DivCall, dl, MVT::i64, Addr, Tmp1, Tmp2); in LowerOperation()
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp2211 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
2212 bool foldedLoad = tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2215 foldedLoad = tryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2227 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0), in Select()
2364 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4; in Select() local
2365 bool foldedLoad = tryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); in Select()
2372 SDValue Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, Move, Chain; in Select() local
2373 if (tryFoldLoad(Node, N0, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4)) { in Select()
2374 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N0.getOperand(0) }; in Select()
2428 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0), in Select()
/external/clang/lib/StaticAnalyzer/Core/
DCheckerManager.cpp108 ExplodedNodeSet Tmp1, Tmp2; in expandGraphWithCheckers() local
116 CurrSet = (PrevSet == &Tmp1) ? &Tmp2 : &Tmp1; in expandGraphWithCheckers()
/external/webrtc/webrtc/modules/audio_coding/codecs/isac/main/source/
Dstructs.h253 double Tmp1[MAXFFTSIZE]; member
/external/llvm/lib/Target/AMDGPU/
DAMDGPUPromoteAlloca.cpp711 Value *Tmp1 = Builder.CreateMul(TIdY, TCntZ, "", true, true); in handleAlloca() local
712 Value *TID = Builder.CreateAdd(Tmp0, Tmp1); in handleAlloca()
DAMDGPUISelLowering.cpp1484 SDValue Tmp1 = DAG.getNode(ISD::AND, DL, VT, Remainder_GE_Den, in LowerUDIVREM() local
1498 SDValue Div = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, DL, VT), in LowerUDIVREM()
1514 SDValue Rem = DAG.getSelectCC(DL, Tmp1, DAG.getConstant(0, DL, VT), in LowerUDIVREM()
1686 SDValue Tmp1 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpLt0, SignBit64, Tmp0); in LowerFTRUNC() local
1687 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpGt51, BcInt, Tmp1); in LowerFTRUNC()
1704 SDValue Tmp1 = DAG.getNode(ISD::FADD, SL, MVT::f64, Src, CopySign); in LowerFRINT() local
1705 SDValue Tmp2 = DAG.getNode(ISD::FSUB, SL, MVT::f64, Tmp1, CopySign); in LowerFRINT()
1784 SDValue Tmp1 = DAG.getSetCC(SL, SetCCVT, in LowerFROUND64() local
1788 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, Tmp1, in LowerFROUND64()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelLowering.cpp3087 SDValue Tmp1 = Op.getOperand(1); in LowerFCOPYSIGN() local
3090 EVT SrcVT = Tmp1.getValueType(); in LowerFCOPYSIGN()
3108 Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1); in LowerFCOPYSIGN()
3110 Tmp1 = DAG.getNode(ARMISD::VSHL, dl, OpVT, in LowerFCOPYSIGN()
3111 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
3114 Tmp1 = DAG.getNode(ARMISD::VSHRu, dl, MVT::v1i64, in LowerFCOPYSIGN()
3115 DAG.getNode(ISD::BITCAST, dl, MVT::v1i64, Tmp1), in LowerFCOPYSIGN()
3118 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); in LowerFCOPYSIGN()
3127 DAG.getNode(ISD::AND, dl, OpVT, Tmp1, Mask), in LowerFCOPYSIGN()
3142 Tmp1 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonHardwareLoops.cpp1839 SmallVector<MachineOperand,2> Tmp1; in createPreheaderForLoop() local
1842 if (TII->analyzeBranch(*ExitingBlock, TB, FB, Tmp1, false)) in createPreheaderForLoop()
1847 bool NotAnalyzed = TII->analyzeBranch(*PB, TB, FB, Tmp1, false); in createPreheaderForLoop()
/external/llvm/lib/Support/
DAPInt.cpp773 unsigned Tmp1 = unsigned(VAL >> 16); in byteSwap() local
774 Tmp1 = ByteSwap_32(Tmp1); in byteSwap()
777 return APInt(BitWidth, (uint64_t(Tmp2) << 32) | Tmp1); in byteSwap()
/external/swiftshader/third_party/LLVM/lib/Support/
DAPInt.cpp880 unsigned Tmp1 = unsigned(VAL >> 16); in byteSwap() local
881 Tmp1 = ByteSwap_32(Tmp1); in byteSwap()
884 return APInt(BitWidth, (uint64_t(Tmp2) << 32) | Tmp1); in byteSwap()

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