Searched refs:TrueReg (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.h | 181 ArrayRef<MachineOperand> Cond, unsigned TrueReg,
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| D | PPCInstrInfo.cpp | 687 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
703 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
728 ArrayRef<MachineOperand> Cond, unsigned TrueReg, in insertSelect() argument
739 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in insertSelect()
791 unsigned FirstReg = SwapOps ? FalseReg : TrueReg, in insertSelect()
792 SecondReg = SwapOps ? TrueReg : FalseReg; in insertSelect()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 724 unsigned TrueReg = getRegForValue(Select->getTrueValue()); in selectSelect() local
725 if (TrueReg == 0) in selectSelect()
733 std::swap(TrueReg, FalseReg); in selectSelect()
763 .addReg(TrueReg) in selectSelect()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.h | 158 ArrayRef<MachineOperand> Cond, unsigned TrueReg,
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| D | AArch64InstrInfo.cpp | 368 unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, in canInsertSelect() argument
373 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
387 if (canFoldIntoCSel(MRI, TrueReg)) in canInsertSelect()
411 unsigned TrueReg, unsigned FalseReg) const { in insertSelect() argument
514 unsigned FoldedOpc = canFoldIntoCSel(MRI, TrueReg, &NewVReg); in insertSelect()
519 TrueReg = FalseReg; in insertSelect()
533 MRI.constrainRegClass(TrueReg, RC); in insertSelect()
537 BuildMI(MBB, I, DL, get(Opc), DstReg).addReg(TrueReg).addReg(FalseReg).addImm( in insertSelect()
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 690 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
714 unsigned TrueReg, unsigned FalseReg) const { in insertSelect() argument
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 327 ArrayRef<MachineOperand> Cond, unsigned TrueReg,
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| D | X86InstrInfo.cpp | 4279 unsigned TrueReg, unsigned FalseReg, in canInsertSelect() argument
4293 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
4316 ArrayRef<MachineOperand> Cond, unsigned TrueReg, in insertSelect() argument
4323 BuildMI(MBB, I, DL, get(Opc), DstReg).addReg(FalseReg).addReg(TrueReg); in insertSelect()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 5204 unsigned TrueReg = MI.getOperand(1).getReg(); in emitSelect() local
5233 .addReg(TrueReg).addMBB(StartMBB) in emitSelect()
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