| /external/clang/test/SemaTemplate/ |
| D | alias-templates.cpp | 69 itt::rebind<bool> btr; variable
70 itt::rebind_thing<bool> btt(btr);
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrInfo.td | 1080 "btr{w}\t{$src2, $src1|$src1, $src2}", []>, OpSize, TB;
1082 "btr{l}\t{$src2, $src1|$src1, $src2}", []>, TB;
1084 "btr{q}\t{$src2, $src1|$src1, $src2}", []>, TB;
1086 "btr{w}\t{$src2, $src1|$src1, $src2}", []>, OpSize, TB;
1088 "btr{l}\t{$src2, $src1|$src1, $src2}", []>, TB;
1090 "btr{q}\t{$src2, $src1|$src1, $src2}", []>, TB;
1092 "btr{w}\t{$src2, $src1|$src1, $src2}", []>, OpSize, TB;
1094 "btr{l}\t{$src2, $src1|$src1, $src2}", []>, TB;
1096 "btr{q}\t{$src2, $src1|$src1, $src2}", []>, TB;
1098 "btr{w}\t{$src2, $src1|$src1, $src2}", []>, OpSize, TB;
[all …]
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| D | README.txt | 153 We should generate bts/btr/etc instructions on targets where they are cheap or
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| D | X86GenAsmWriter1.inc | 3844 "bsr\t\000bswap\t\000bt\t\000btc\t\000btr\t\000bts\t\000call\t\000callw\t"
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.td | 1717 "btr{w}\t{$src2, $src1|$src1, $src2}", [], IIC_BTX_RR>,
1720 "btr{l}\t{$src2, $src1|$src1, $src2}", [], IIC_BTX_RR>,
1723 "btr{q}\t{$src2, $src1|$src1, $src2}", []>, TB;
1728 "btr{w}\t{$src2, $src1|$src1, $src2}", [], IIC_BTX_MR>,
1731 "btr{l}\t{$src2, $src1|$src1, $src2}", [], IIC_BTX_MR>,
1734 "btr{q}\t{$src2, $src1|$src1, $src2}", [], IIC_BTX_MR>, TB;
1739 "btr{w}\t{$src2, $src1|$src1, $src2}", [], IIC_BTX_RI>,
1742 "btr{l}\t{$src2, $src1|$src1, $src2}", [], IIC_BTX_RI>,
1745 "btr{q}\t{$src2, $src1|$src1, $src2}", [], IIC_BTX_RI>, TB;
1750 "btr{w}\t{$src2, $src1|$src1, $src2}", [], IIC_BTX_MI>,
[all …]
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| D | README.txt | 105 We should generate bts/btr/etc instructions on targets where they are cheap or
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| /external/llvm/test/MC/X86/ |
| D | intel-syntax.s | 397 btr DWORD PTR [EAX], 1
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| D | x86-32-coverage.s | 10601 btr $4, (%eax) label
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| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 404 #define BTR_L(a, b) CHOICE(btrl ARG2(a,b), btrl ARG2(a,b), _LTOG btr ARG2(b,a))
405 #define BTR_W(a, b) CHOICE(btrw ARG2(a,b), btrw ARG2(a,b), _WTOG btr ARG2(b,a))
1140 #define BTR_L(a, b) btr L_(b), L_(a)
1141 #define BTR_W(a, b) btr W_(b), W_(a)
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| /external/valgrind/VEX/test/ |
| D | test-i386.c | 154 #define OP btr
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| D | test-amd64.c | 166 #define OP btr
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| /external/elfutils/libcpu/defs/ |
| D | i386 | 107 00001111,10110011,{mod}{reg}{r_m}:btr {reg},{mod}{r_m}
108 00001111,10111010,{mod}110{r_m},{imm8}:btr{w} {imm8},{mod}{r_m}
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| /external/elfutils/tests/ |
| D | testfile44.expect.bz2 | 1testfile44.o: elf32-elf_i386
2
3Disassembly of section .text:
4
5 0 ... |
| D | testfile45.expect.bz2 | 1testfile45.o: elf64-elf_x86_64
2
3Disassembly of section .text:
4
5 0 ... |
| /external/valgrind/perf/ |
| D | tinycc.c | 3073 DEF_WL(btr)
4405 DEF_WL(btr)
|