| /external/swiftshader/third_party/LLVM/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 65 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm())); in printInst()
73 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0); in printInst()
84 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm())); in printInst()
91 if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) { in printInst()
96 O << ", #" << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm())); in printInst()
115 MI->getOperand(3).getImm() == -4) { in printInst()
136 MI->getOperand(4).getImm() == 4) { in printInst()
206 O << '#' << Op.getImm(); in printOperand()
230 O << "[pc, #" << MO1.getImm() << "]"; in printT2LdrLabelOperand()
249 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ClauseMergePass.cpp | 78 .getImm(); in getCFAluSize()
85 .getImm(); in isCFAluEnabled()
126 if (LatrCFAlu.getOperand(Mode0Idx).getImm() && in mergeIfPossible()
127 RootCFAlu.getOperand(Mode0Idx).getImm() && in mergeIfPossible()
128 (LatrCFAlu.getOperand(KBank0Idx).getImm() != in mergeIfPossible()
129 RootCFAlu.getOperand(KBank0Idx).getImm() || in mergeIfPossible()
130 LatrCFAlu.getOperand(KBank0LineIdx).getImm() != in mergeIfPossible()
131 RootCFAlu.getOperand(KBank0LineIdx).getImm())) { in mergeIfPossible()
142 if (LatrCFAlu.getOperand(Mode1Idx).getImm() && in mergeIfPossible()
143 RootCFAlu.getOperand(Mode1Idx).getImm() && in mergeIfPossible()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZAsmPrinter.cpp | 35 .addImm(MI->getOperand(1).getImm()); in lowerRILow()
40 .addImm(MI->getOperand(2).getImm()); in lowerRILow()
49 .addImm(MI->getOperand(1).getImm()); in lowerRIHigh()
54 .addImm(MI->getOperand(2).getImm()); in lowerRIHigh()
64 .addImm(MI->getOperand(3).getImm()) in lowerRIEfLow()
65 .addImm(MI->getOperand(4).getImm()) in lowerRIEfLow()
66 .addImm(MI->getOperand(5).getImm()); in lowerRIEfLow()
89 .addImm(MI->getOperand(2).getImm()) in lowerSubvectorLoad()
99 .addImm(MI->getOperand(2).getImm()) in lowerSubvectorStore()
114 .addImm(MI->getOperand(0).getImm()) in EmitInstruction()
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| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 85 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm())); in printInst()
96 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0); in printInst()
107 O << '\t' << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm())); in printInst()
116 if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) { in printInst()
122 << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm())) << markup(">"); in printInst()
145 MI->getOperand(3).getImm() == -4) { in printInst()
174 MI->getOperand(4).getImm() == 4) { in printInst()
279 O << markup("<imm:") << '#' << formatImm(Op.getImm()) << markup(">"); in printOperand()
323 int32_t OffImm = (int32_t)MO1.getImm(); in printThumbLdrLabelOperand()
352 ARM_AM::ShiftOpc ShOpc = ARM_AM::getSORegShOp(MO3.getImm()); in printSORegRegOperand()
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| /external/llvm/lib/Target/AMDGPU/InstPrinter/ |
| D | AMDGPUInstPrinter.cpp | 36 O << formatHex(MI->getOperand(OpNo).getImm() & 0xf); in printU4ImmOperand()
41 O << formatHex(MI->getOperand(OpNo).getImm() & 0xff); in printU8ImmOperand()
46 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffff); in printU16ImmOperand()
51 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffffffff); in printU32ImmOperand()
56 O << formatDec(MI->getOperand(OpNo).getImm() & 0xf); in printU4ImmDecOperand()
61 O << formatDec(MI->getOperand(OpNo).getImm() & 0xff); in printU8ImmDecOperand()
66 O << formatDec(MI->getOperand(OpNo).getImm() & 0xffff); in printU16ImmDecOperand()
71 if (MI->getOperand(OpNo).getImm()) { in printNamedBit()
93 if (MI->getOperand(OpNo).getImm()) { in printMBUFOffset()
101 uint16_t Imm = MI->getOperand(OpNo).getImm(); in printOffset()
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| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 60 unsigned char SH = MI->getOperand(2).getImm(); in printInst()
61 unsigned char MB = MI->getOperand(3).getImm(); in printInst()
62 unsigned char ME = MI->getOperand(4).getImm(); in printInst()
93 unsigned char SH = MI->getOperand(2).getImm(); in printInst()
94 unsigned char ME = MI->getOperand(3).getImm(); in printInst()
116 unsigned char TH = MI->getOperand(0).getImm(); in printInst()
148 unsigned Code = MI->getOperand(OpNo).getImm(); in printPredicateOperand()
244 unsigned int Value = MI->getOperand(OpNo).getImm(); in printU1ImmOperand()
251 unsigned int Value = MI->getOperand(OpNo).getImm(); in printU2ImmOperand()
258 unsigned int Value = MI->getOperand(OpNo).getImm(); in printU3ImmOperand()
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| /external/llvm/lib/Target/Lanai/MCTargetDesc/ |
| D | LanaiMCCodeEmitter.cpp | 118 return static_cast<unsigned>(MCOp.getImm()); in getMachineOpValue()
141 unsigned AluCode = AluOp.getImm(); in adjustPqBits()
148 ((Op2.isImm() && Op2.getImm() != 0) || in adjustPqBits()
156 if (LPAC::modifiesOp(AluCode) && ((Op2.isImm() && Op2.getImm() != 0) || in adjustPqBits()
199 assert((LPAC::getAluOp(AluOp.getImm()) == LPAC::ADD) && in getRiMemoryOpValue()
204 assert(isInt<16>(Op2.getImm()) && in getRiMemoryOpValue()
207 Encoding |= (Op2.getImm() & 0xffff); in getRiMemoryOpValue()
208 if (Op2.getImm() != 0) { in getRiMemoryOpValue()
209 if (LPAC::isPreOp(AluOp.getImm())) in getRiMemoryOpValue()
211 if (LPAC::isPostOp(AluOp.getImm())) in getRiMemoryOpValue()
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| /external/llvm/lib/Target/Lanai/InstPrinter/ |
| D | LanaiInstPrinter.cpp | 47 unsigned AluCode = MI->getOperand(3).getImm(); in usesGivenOffset()
49 (MI->getOperand(2).getImm() == AddOffset || in usesGivenOffset()
50 MI->getOperand(2).getImm() == -AddOffset); in usesGivenOffset()
54 unsigned AluCode = MI->getOperand(3).getImm(); in isPreIncrementForm()
59 unsigned AluCode = MI->getOperand(3).getImm(); in isPostIncrementForm()
64 if (MI->getOperand(2).getImm() < 0) in decIncOperator()
153 OS << formatHex(Op.getImm()); in printOperand()
164 OS << '[' << formatHex(Op.getImm()) << ']'; in printMemImmOperand()
178 OS << formatHex(Op.getImm() << 16); in printHi16ImmOperand()
190 OS << formatHex((Op.getImm() << 16) | 0xffff); in printHi16AndImmOperand()
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| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCCodeEmitter.cpp | 193 return static_cast<unsigned>(MO.getImm()); in getMachineOpValue()
204 ImmVal = static_cast<uint32_t>(MO.getImm()); in getLdStUImm12OpValue()
225 return MO.getImm(); in getAdrLabelOpValue()
250 assert(AArch64_AM::getShiftType(MO1.getImm()) == AArch64_AM::LSL && in getAddSubImmOpValue()
252 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue()
256 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << 12)); in getAddSubImmOpValue()
278 return MO.getImm(); in getCondBranchTargetOpValue()
300 return MO.getImm(); in getLoadLiteralOpValue()
316 unsigned SignExtend = MI.getOperand(OpIdx).getImm(); in getMemExtendOpValue()
317 unsigned DoShift = MI.getOperand(OpIdx + 1).getImm(); in getMemExtendOpValue()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 167 ARM_AM::AMSubMode Mode = (ARM_AM::AMSubMode)MI.getOperand(OpIdx).getImm(); in getLdStmModeOpValue()
239 unsigned SoImm = MI.getOperand(Op).getImm(); in getSOImmOpValue()
255 unsigned SoImm = MI.getOperand(Op).getImm(); in getT2SOImmOpValue()
280 return 64 - MI.getOperand(Op).getImm(); in getNEONVcvtImm32OpValue()
419 return static_cast<unsigned>(MO.getImm()); in getMachineOpValue()
438 int32_t SImm = MO1.getImm(); in EncodeAddrModeOpValues()
465 if (MO.isImm()) return MO.getImm(); in getBranchTargetOpValue()
502 return encodeThumbBLOffset(MO.getImm()); in getThumbBLTargetOpValue()
514 return encodeThumbBLOffset(MO.getImm()); in getThumbBLXTargetOpValue()
525 return (MO.getImm() >> 1); in getThumbBRTargetOpValue()
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.cpp | 74 if (Op2.isImm() && Op2.getImm() == 0 && Op3.isImm()) { in printInst()
77 switch (Op3.getImm()) { in printInst()
113 int64_t immr = Op2.getImm(); in printInst()
114 int64_t imms = Op3.getImm(); in printInst()
144 if (Op2.getImm() > Op3.getImm()) { in printInst()
147 << ", #" << (Is64Bit ? 64 : 32) - Op2.getImm() << ", #" << Op3.getImm() + 1; in printInst()
155 << ", #" << Op2.getImm() << ", #" << Op3.getImm() - Op2.getImm() + 1; in printInst()
163 int ImmR = MI->getOperand(3).getImm(); in printInst()
164 int ImmS = MI->getOperand(4).getImm(); in printInst()
230 int Shift = MI->getOperand(2).getImm(); in printInst()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 38 unsigned char SH = MI->getOperand(2).getImm(); in printInst()
39 unsigned char MB = MI->getOperand(3).getImm(); in printInst()
40 unsigned char ME = MI->getOperand(4).getImm(); in printInst()
71 unsigned char SH = MI->getOperand(2).getImm(); in printInst()
72 unsigned char ME = MI->getOperand(3).getImm(); in printInst()
94 unsigned Code = MI->getOperand(OpNo).getImm(); in printPredicateOperand()
119 char Value = MI->getOperand(OpNo).getImm(); in printS5ImmOperand()
126 unsigned char Value = MI->getOperand(OpNo).getImm(); in printU5ImmOperand()
133 unsigned char Value = MI->getOperand(OpNo).getImm(); in printU6ImmOperand()
140 O << (short)MI->getOperand(OpNo).getImm(); in printS16ImmOperand()
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| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | R600MCCodeEmitter.cpp | 98 uint32_t InstWord2 = MI.getOperand(2).getImm(); // Offset in encodeInstruction()
107 int64_t Sampler = MI.getOperand(14).getImm(); in encodeInstruction()
110 MI.getOperand(2).getImm(), in encodeInstruction()
111 MI.getOperand(3).getImm(), in encodeInstruction()
112 MI.getOperand(4).getImm(), in encodeInstruction()
113 MI.getOperand(5).getImm() in encodeInstruction()
116 MI.getOperand(6).getImm() & 0x1F, in encodeInstruction()
117 MI.getOperand(7).getImm() & 0x1F, in encodeInstruction()
118 MI.getOperand(8).getImm() & 0x1F in encodeInstruction()
178 return MO.getImm(); in getMachineOpValue()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/InstPrinter/ |
| D | X86ATTInstPrinter.cpp | 61 switch (MI->getOperand(Op).getImm()) { in printSSECC()
83 O << (int)Op.getImm(); in print_pcrel_imm()
97 O << '$' << (int64_t)Op.getImm(); in printOperand()
99 if (CommentStream && (Op.getImm() > 255 || Op.getImm() < -256)) in printOperand()
100 *CommentStream << format("imm = 0x%llX\n", (long long)Op.getImm()); in printOperand()
122 int64_t DispVal = DispSpec.getImm(); in printMemReference()
138 unsigned ScaleVal = MI->getOperand(Op+1).getImm(); in printMemReference()
|
| D | X86InstComments.cpp | 39 DecodeINSERTPSMask(MI->getOperand(3).getImm(), ShuffleMask); in EmitAnyX86InstComments()
59 DecodePSHUFMask(4, MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
68 DecodePSHUFHWMask(MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
76 DecodePSHUFLWMask(MI->getOperand(MI->getNumOperands()-1).getImm(), in EmitAnyX86InstComments()
142 DecodeSHUFPSMask(2, MI->getOperand(3).getImm(), ShuffleMask); in EmitAnyX86InstComments()
150 DecodeSHUFPSMask(4, MI->getOperand(3).getImm(), ShuffleMask); in EmitAnyX86InstComments()
211 DecodeVPERMILPSMask(4, MI->getOperand(2).getImm(), in EmitAnyX86InstComments()
216 DecodeVPERMILPSMask(8, MI->getOperand(2).getImm(), in EmitAnyX86InstComments()
221 DecodeVPERMILPDMask(2, MI->getOperand(2).getImm(), in EmitAnyX86InstComments()
226 DecodeVPERMILPDMask(4, MI->getOperand(2).getImm(), in EmitAnyX86InstComments()
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| /external/llvm/lib/Target/Lanai/AsmParser/ |
| D | LanaiAsmParser.cpp | 144 const MCExpr *getImm() const { in getImm() function
392 addExpr(Inst, getImm()); in addImmOperands()
397 addExpr(Inst, getImm()); in addBrTargetOperands()
402 addExpr(Inst, getImm()); in addCallTargetOperands()
407 addExpr(Inst, getImm()); in addCondCodeOperands()
441 addExpr(Inst, getImm()); in addImmShiftOperands()
446 addExpr(Inst, getImm()); in addImm10Operands()
451 if (const MCConstantExpr *ConstExpr = dyn_cast<MCConstantExpr>(getImm())) in addLoImm16Operands()
454 else if (isa<LanaiMCExpr>(getImm())) { in addLoImm16Operands()
456 const LanaiMCExpr *SymbolRefExpr = dyn_cast<LanaiMCExpr>(getImm()); in addLoImm16Operands()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 194 ARM_AM::AMSubMode Mode = (ARM_AM::AMSubMode)MI.getOperand(OpIdx).getImm(); in getLdStmModeOpValue()
294 unsigned SoImm = MO.getImm(); in getSOImmOpValue()
322 return MO.getImm(); in getModImmOpValue()
329 unsigned SoImm = MI.getOperand(Op).getImm(); in getT2SOImmOpValue()
359 return 64 - MI.getOperand(Op).getImm(); in getNEONVcvtImm32OpValue()
540 return static_cast<unsigned>(MO.getImm()); in getMachineOpValue()
559 int32_t SImm = MO1.getImm(); in EncodeAddrModeOpValues()
587 if (MO.isImm()) return MO.getImm(); in getBranchTargetOpValue()
625 return encodeThumbBLOffset(MO.getImm()); in getThumbBLTargetOpValue()
638 return encodeThumbBLOffset(MO.getImm()); in getThumbBLXTargetOpValue()
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| D | ARMMCTargetDesc.cpp | 37 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) && in getMCRDeprecationInfo()
38 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) && in getMCRDeprecationInfo()
41 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) { in getMCRDeprecationInfo()
42 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) { in getMCRDeprecationInfo()
43 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) { in getMCRDeprecationInfo()
50 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10) { in getMCRDeprecationInfo()
57 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10 && in getMCRDeprecationInfo()
58 (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 5)) { in getMCRDeprecationInfo()
69 MI.getOperand(1).getImm() != 8) { in getITDeprecationInfo()
243 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL) in isUnconditionalBranch()
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| /external/llvm/lib/Target/SystemZ/InstPrinter/ |
| D | SystemZInstPrinter.cpp | 45 O << MO.getImm(); in printOperand()
65 int64_t Value = MI->getOperand(OpNum).getImm(); in printUImmOperand()
72 int64_t Value = MI->getOperand(OpNum).getImm(); in printSImmOperand()
139 uint64_t Value = MI->getOperand(OpNum).getImm(); in printAccessRegOperand()
149 O.write_hex(MO.getImm()); in printPCRelOperand()
185 MI->getOperand(OpNum + 1).getImm(), 0, O); in printBDAddrOperand()
191 MI->getOperand(OpNum + 1).getImm(), in printBDXAddrOperand()
198 uint64_t Disp = MI->getOperand(OpNum + 1).getImm(); in printBDLAddrOperand()
199 uint64_t Length = MI->getOperand(OpNum + 2).getImm(); in printBDLAddrOperand()
209 MI->getOperand(OpNum + 1).getImm(), in printBDVAddrOperand()
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUAsmPrinter.cpp | 68 O << MO.getImm(); in printOperand()
85 unsigned int value = MI->getOperand(OpNo).getImm(); in printU7ImmOperand()
93 char value = MI->getOperand(OpNo).getImm(); in printShufAddr()
103 O << (short) MI->getOperand(OpNo).getImm(); in printS16ImmOperand()
109 O << (unsigned short)MI->getOperand(OpNo).getImm(); in printU16ImmOperand()
125 unsigned int value = MI->getOperand(OpNo).getImm(); in printU18ImmOperand()
133 short value = (short) (((int) MI->getOperand(OpNo).getImm() << 16) in printS10ImmOperand()
143 short value = (short) (((int) MI->getOperand(OpNo).getImm() << 16) in printU10ImmOperand()
154 int64_t value = int64_t(MI->getOperand(OpNo).getImm()); in printDFormAddr()
172 int displ = int(MI->getOperand(OpNo+1).getImm()); in printAddr256K()
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| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 392 int64_t getImm() const { in getImm() function
453 bool isU1Imm() const { return Kind == Immediate && isUInt<1>(getImm()); } in isU1Imm()
454 bool isU2Imm() const { return Kind == Immediate && isUInt<2>(getImm()); } in isU2Imm()
455 bool isU3Imm() const { return Kind == Immediate && isUInt<3>(getImm()); } in isU3Imm()
456 bool isU4Imm() const { return Kind == Immediate && isUInt<4>(getImm()); } in isU4Imm()
457 bool isU5Imm() const { return Kind == Immediate && isUInt<5>(getImm()); } in isU5Imm()
458 bool isS5Imm() const { return Kind == Immediate && isInt<5>(getImm()); } in isS5Imm()
459 bool isU6Imm() const { return Kind == Immediate && isUInt<6>(getImm()); } in isU6Imm()
461 isUInt<6>(getImm()) && in isU6ImmX2()
462 (getImm() & 1) == 0; } in isU6ImmX2()
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| /external/llvm/lib/Target/X86/InstPrinter/ |
| D | X86IntelInstPrinter.cpp | 56 int64_t Imm = MI->getOperand(Op).getImm(); in printSSEAVXCC()
96 int64_t Imm = MI->getOperand(Op).getImm(); in printXOPCC()
112 int64_t Imm = MI->getOperand(Op).getImm() & 0x3; in printRoundingControl()
127 O << formatImm(Op.getImm()); in printPCRelImm()
150 O << formatImm((int64_t)Op.getImm()); in printOperand()
160 unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm(); in printMemReference()
192 int64_t DispVal = DispSpec.getImm(); in printMemReference()
245 O << formatImm(DispSpec.getImm()); in printMemOffset()
256 O << formatImm(MI->getOperand(Op).getImm() & 0xff); in printU8Imm()
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| D | X86ATTInstPrinter.cpp | 74 int64_t Imm = MI->getOperand(Op).getImm(); in printSSEAVXCC()
114 int64_t Imm = MI->getOperand(Op).getImm(); in printXOPCC()
130 int64_t Imm = MI->getOperand(Op).getImm() & 0x3; in printRoundingControl()
146 O << formatImm(Op.getImm()); in printPCRelImm()
169 int64_t Imm = Op.getImm(); in printOperand()
211 int64_t DispVal = DispSpec.getImm(); in printMemReference()
227 unsigned ScaleVal = MI->getOperand(Op + X86::AddrScaleAmt).getImm(); in printMemReference()
283 O << formatImm(DispSpec.getImm()); in printMemOffset()
294 O << markup("<imm:") << '$' << formatImm(MI->getOperand(Op).getImm() & 0xff) in printU8Imm()
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| /external/swiftshader/third_party/LLVM/lib/Target/PTX/InstPrinter/ |
| D | PTXInstPrinter.cpp | 71 int PredOp = MI->getOperand(OpIndex).getImm(); in printPredicate()
87 unsigned NumRets = MI->getOperand(Index++).getImm(); in printCall()
101 unsigned NumArgs = MI->getOperand(Index++).getImm(); in printCall()
116 O << Op.getImm(); in printOperand()
145 if (Op2.getImm() == 0) in printMemOperand()
147 O << "+" << Op2.getImm(); in printMemOperand()
154 switch (Op.getImm()) { in printRoundingMode()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonCopyToCombine.cpp | 161 bool NotExt = Op1.isImm() && isInt<8>(Op1.getImm()); in isCombinableInstType()
177 return !Op.isImm() || !isInt<N>(Op.getImm()); in isGreaterThanNBitTFRI()
629 int64_t V = HiOperand.getImm(); in emitConst64()
630 V = (V << 32) | (0x0ffffffffLL & LoOperand.getImm()); in emitConst64()
648 .addImm(LoOperand.getImm()); in emitCombineII()
653 .addImm(HiOperand.getImm()) in emitCombineII()
664 .addImm(LoOperand.getImm()); in emitCombineII()
669 .addImm(HiOperand.getImm()) in emitCombineII()
679 .addImm(LoOperand.getImm()); in emitCombineII()
684 .addImm(HiOperand.getImm()) in emitCombineII()
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