| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | CallingConvLower.h | 117 bool isMemLoc() const { return isMem; } in isMemLoc() function
122 unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; } in getLocMemOffset()
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| /external/llvm/include/llvm/CodeGen/ |
| D | CallingConvLower.h | 144 bool isMemLoc() const { return isMem; } in isMemLoc() function
149 unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; } in getLocMemOffset()
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| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinISelLowering.cpp | 210 assert(VA.isMemLoc() && "CCValAssign must be RegLoc or MemLoc"); in LowerFormalArguments()
332 assert(VA.isMemLoc() && "CCValAssign must be RegLoc or MemLoc"); in LowerCall()
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| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 194 if (NextVA.isMemLoc()) { in LowerFormalArguments()
226 assert(VA.isMemLoc()); in LowerFormalArguments()
450 if (VA.isMemLoc()) { in LowerCall()
525 assert(VA.isMemLoc()); in LowerCall()
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 335 assert(VA.isMemLoc()); in LowerCCCArguments()
431 assert(VA.isMemLoc()); in LowerCCCCallTo()
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeISelLowering.cpp | 745 assert(VA.isMemLoc()); in LowerCall()
931 assert(VA.isMemLoc()); in LowerFormalArguments()
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1084 assert(VA.isMemLoc()); in LowerCallResult()
1176 assert(VA.isMemLoc()); in LowerCCCCallTo()
1330 assert(VA.isMemLoc()); in LowerCCCArguments()
1484 assert(VA.isMemLoc()); in LowerReturn()
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 359 assert(VA.isMemLoc()); in LowerCCCArguments()
494 assert(VA.isMemLoc()); in LowerCCCCallTo()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 427 if (NextVA.isMemLoc()) { in LowerFormalArguments_32()
463 assert(VA.isMemLoc()); in LowerFormalArguments_32()
640 assert(VA.isMemLoc()); in LowerFormalArguments_64()
842 if (VA.isMemLoc()) { in LowerCall_32()
921 assert(VA.isMemLoc()); in LowerCall_32()
1273 assert(VA.isMemLoc()); in LowerCall_64()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 468 assert(VA.isMemLoc()); in LowerCCCArguments()
606 assert(VA.isMemLoc()); in LowerCCCCallTo()
|
| /external/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 474 assert(VA.isMemLoc()); in LowerCCCArguments()
676 assert(VA.isMemLoc()); in LowerCCCCallTo()
|
| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 949 assert(VA.isMemLoc()); in LowerCCCCallTo()
1122 assert(VA.isMemLoc()); in LowerCCCArguments()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1125 VA.isMemLoc()) { in processCallArgs()
1186 assert(VA.isMemLoc() && "Assuming store on stack."); in processCallArgs()
|
| D | MipsISelLowering.cpp | 2808 assert(VA.isMemLoc()); in LowerCall()
3122 assert(VA.isMemLoc()); in LowerFormalArguments()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 711 if (VA.isMemLoc()) { in LowerCall()
759 if (VA.isMemLoc()) { in LowerCall()
1159 assert(VA.isMemLoc()); in LowerFormalArguments()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelLowering.cpp | 283 assert(VA.isMemLoc()); in LowerCall()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1202 assert(NextVA.isMemLoc()); in PassF64ArgInRegs()
1312 assert(VA.isMemLoc()); in LowerCall()
1324 assert(VA.isMemLoc()); in LowerCall()
1363 assert(VA.isMemLoc()); in LowerCall()
2380 if (NextVA.isMemLoc()) { in GetF64FormalArgument()
2519 if (VA.isMemLoc()) { in LowerFormalArguments()
2583 assert(VA.isMemLoc()); in LowerFormalArguments()
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| D | ARMFastISel.cpp | 1655 assert(VA.isMemLoc()); in ProcessCallArgs()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 2049 assert(VA.isMemLoc()); in LowerCall()
2331 assert(VA.isMemLoc()); in LowerFormalArguments()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1560 assert(NextVA.isMemLoc()); in PassF64ArgInRegs()
1686 assert(VA.isMemLoc()); in LowerCall()
1705 assert(VA.isMemLoc()); in LowerCall()
1757 assert(VA.isMemLoc()); in LowerCall()
3092 if (NextVA.isMemLoc()) { in GetF64FormalArgument()
3236 assert(VA.isMemLoc() && "unexpected byval pointer in reg"); in LowerFormalArguments()
3275 if (VA.isMemLoc()) { in LowerFormalArguments()
3342 assert(VA.isMemLoc()); in LowerFormalArguments()
|
| D | ARMFastISel.cpp | 1996 assert(VA.isMemLoc()); in ProcessCallArgs()
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 1714 assert(VA.isMemLoc()); in LowerFormalArguments_SVR4()
3003 assert(VA.isMemLoc()); in LowerCall_SVR4()
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 927 assert(VA.isMemLoc() && "Argument not register or memory"); in LowerFormalArguments()
1109 assert(VA.isMemLoc() && "Argument not register or memory"); in LowerCall()
|
| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 3217 assert(VA.isMemLoc()); in fastLowerCall()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 744 if (VA.isMemLoc()) { in LowerFormalArguments()
|