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Searched refs:isSubClassOf (Results 1 – 25 of 44) sorted by relevance

12

/external/swiftshader/third_party/LLVM/utils/TableGen/
DCallingConvEmitter.cpp66 if (Action->isSubClassOf("CCPredicateAction")) { in EmitAction()
69 if (Action->isSubClassOf("CCIfType")) { in EmitAction()
77 } else if (Action->isSubClassOf("CCIf")) { in EmitAction()
88 if (Action->isSubClassOf("CCDelegateTo")) { in EmitAction()
93 } else if (Action->isSubClassOf("CCAssignToReg")) { in EmitAction()
114 } else if (Action->isSubClassOf("CCAssignToRegWithShadow")) { in EmitAction()
156 } else if (Action->isSubClassOf("CCAssignToStack")) { in EmitAction()
172 if (Action->isSubClassOf("CCAssignToStackWithShadow")) in EmitAction()
178 } else if (Action->isSubClassOf("CCPromoteToType")) { in EmitAction()
187 } else if (Action->isSubClassOf("CCBitConvertToType")) { in EmitAction()
[all …]
DDAGISelMatcherGen.cpp226 LeafRec->isSubClassOf("RegisterClass") || in EmitLeafMatchCode()
227 LeafRec->isSubClassOf("RegisterOperand") || in EmitLeafMatchCode()
228 LeafRec->isSubClassOf("PointerLikeRegClass") || in EmitLeafMatchCode()
229 LeafRec->isSubClassOf("SubRegIndex") || in EmitLeafMatchCode()
236 if (LeafRec->isSubClassOf("Register")) { in EmitLeafMatchCode()
243 if (LeafRec->isSubClassOf("ValueType")) in EmitLeafMatchCode()
246 if (LeafRec->isSubClassOf("CondCode")) in EmitLeafMatchCode()
249 if (LeafRec->isSubClassOf("ComplexPattern")) { in EmitLeafMatchCode()
584 if (Def->isSubClassOf("Register")) { in EmitResultLeafAsOperand()
600 if (Def->isSubClassOf("RegisterOperand")) in EmitResultLeafAsOperand()
[all …]
DCodeGenDAGPatterns.cpp747 if (!Def->isSubClassOf("Predicate")) { in getPredicateCheck()
769 if (R->isSubClassOf("SDTCisVT")) { in SDTypeConstraint()
775 } else if (R->isSubClassOf("SDTCisPtrTy")) { in SDTypeConstraint()
777 } else if (R->isSubClassOf("SDTCisInt")) { in SDTypeConstraint()
779 } else if (R->isSubClassOf("SDTCisFP")) { in SDTypeConstraint()
781 } else if (R->isSubClassOf("SDTCisVec")) { in SDTypeConstraint()
783 } else if (R->isSubClassOf("SDTCisSameAs")) { in SDTypeConstraint()
786 } else if (R->isSubClassOf("SDTCisVTSmallerThanOp")) { in SDTypeConstraint()
790 } else if (R->isSubClassOf("SDTCisOpSmallerThanOp")) { in SDTypeConstraint()
794 } else if (R->isSubClassOf("SDTCisEltOfVec")) { in SDTypeConstraint()
[all …]
DCodeGenInstruction.cpp73 if (Rec->isSubClassOf("RegisterOperand")) { in CGIOperandList()
75 } else if (Rec->isSubClassOf("Operand")) { in CGIOperandList()
94 if (Rec->isSubClassOf("PredicateOperand")) in CGIOperandList()
96 else if (Rec->isSubClassOf("OptionalDefOperand")) in CGIOperandList()
101 } else if (Rec->isSubClassOf("RegisterClass")) { in CGIOperandList()
103 } else if (!Rec->isSubClassOf("PointerLikeRegClass") && in CGIOperandList()
344 assert(FirstImplicitDef->isSubClassOf("Register")); in HasOneImplicitDefWithKnownVT()
427 if (ADI && ADI->getDef()->isSubClassOf("Register")) { in tryAliasOpMatch()
428 if (InstOpRec->isSubClassOf("OptionalDefOperand")) { in tryAliasOpMatch()
435 if (InstOpRec->isSubClassOf("RegisterOperand")) in tryAliasOpMatch()
[all …]
DCodeGenTarget.cpp408 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); in CodeGenIntrinsic()
410 if (TyEl->isSubClassOf("LLVMMatchType")) { in CodeGenIntrinsic()
418 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && in CodeGenIntrinsic()
419 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || in CodeGenIntrinsic()
442 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); in CodeGenIntrinsic()
444 if (TyEl->isSubClassOf("LLVMMatchType")) { in CodeGenIntrinsic()
452 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && in CodeGenIntrinsic()
453 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || in CodeGenIntrinsic()
476 assert(Property->isSubClassOf("IntrinsicProperty") && in CodeGenIntrinsic()
491 else if (Property->isSubClassOf("NoCapture")) { in CodeGenIntrinsic()
DInstrInfoEmitter.cpp82 if (OpR->isSubClassOf("RegisterOperand")) in GetOperandInfo()
84 if (OpR->isSubClassOf("RegisterClass")) in GetOperandInfo()
86 else if (OpR->isSubClassOf("PointerLikeRegClass")) in GetOperandInfo()
96 if (OpR->isSubClassOf("PointerLikeRegClass")) in GetOperandInfo()
101 if (Inst.Operands[i].Rec->isSubClassOf("PredicateOperand")) in GetOperandInfo()
106 if (Inst.Operands[i].Rec->isSubClassOf("OptionalDefOperand")) in GetOperandInfo()
DIntrinsicEmitter.cpp232 if (ArgType->isSubClassOf("LLVMMatchType")) { in EmitTypeGenerate()
235 if (ArgType->isSubClassOf("LLVMExtendedElementVectorType")) in EmitTypeGenerate()
238 else if (ArgType->isSubClassOf("LLVMTruncatedElementVectorType")) in EmitTypeGenerate()
354 if (ArgType->isSubClassOf("LLVMMatchType")) { in EmitVerifier()
359 if (ArgType->isSubClassOf("LLVMExtendedElementVectorType")) in EmitVerifier()
361 else if (ArgType->isSubClassOf("LLVMTruncatedElementVectorType")) in EmitVerifier()
382 if (ArgType->isSubClassOf("LLVMMatchType")) { in EmitVerifier()
387 if (ArgType->isSubClassOf("LLVMExtendedElementVectorType")) in EmitVerifier()
389 else if (ArgType->isSubClassOf("LLVMTruncatedElementVectorType")) in EmitVerifier()
DPseudoLoweringEmitter.cpp34 if (DI->getDef()->isSubClassOf("Register") || in addDagOperandMapping()
89 if (!Operator->isSubClassOf("Instruction")) in evaluateExpansion()
230 if (I->second->isSubClassOf(ExpansionClass) && in run()
231 I->second->isSubClassOf(InstructionClass)) in run()
DFastISelEmitter.cpp251 if (OpLeafRec->isSubClassOf("RegisterOperand")) in initialize()
253 if (OpLeafRec->isSubClassOf("RegisterClass")) in initialize()
255 else if (OpLeafRec->isSubClassOf("Register")) in initialize()
406 if (!OpLeafRec->isSubClassOf("Register")) in PhyRegForNode()
433 if (!Op->isSubClassOf("Instruction")) in collectPatterns()
445 if (ChildOp->getOperator()->isSubClassOf("Instruction")) { in collectPatterns()
459 if (Op0Rec->isSubClassOf("RegisterOperand")) in collectPatterns()
461 if (!Op0Rec->isSubClassOf("RegisterClass")) in collectPatterns()
DDAGISelEmitter.cpp33 if (Op->isSubClassOf("Instruction")) { in getResultPatternCost()
52 if (Op->isSubClassOf("Instruction")) { in getResultPatternSize()
DEDEmitter.cpp353 if (!inst.TheDef->isSubClassOf("X86Inst")) in X86PopulateOperands()
364 !rec.isSubClassOf("PointerLikeRegClass")) { in X86PopulateOperands()
717 if (!inst.TheDef->isSubClassOf("InstARM") && in ARMPopulateOperands()
718 !inst.TheDef->isSubClassOf("InstThumb")) in ARMPopulateOperands()
/external/llvm/utils/TableGen/
DCallingConvEmitter.cpp85 if (Action->isSubClassOf("CCPredicateAction")) { in EmitAction()
88 if (Action->isSubClassOf("CCIfType")) { in EmitAction()
96 } else if (Action->isSubClassOf("CCIf")) { in EmitAction()
107 if (Action->isSubClassOf("CCDelegateTo")) { in EmitAction()
112 } else if (Action->isSubClassOf("CCAssignToReg")) { in EmitAction()
133 } else if (Action->isSubClassOf("CCAssignToRegWithShadow")) { in EmitAction()
174 } else if (Action->isSubClassOf("CCAssignToStack")) { in EmitAction()
198 } else if (Action->isSubClassOf("CCAssignToStackWithShadow")) { in EmitAction()
221 } else if (Action->isSubClassOf("CCPromoteToType")) { in EmitAction()
235 } else if (Action->isSubClassOf("CCPromoteToUpperBitsInType")) { in EmitAction()
[all …]
DDAGISelMatcherGen.cpp233 if (LeafRec->isSubClassOf("ValueType")) { in EmitLeafMatchCode()
242 LeafRec->isSubClassOf("RegisterClass") || in EmitLeafMatchCode()
243 LeafRec->isSubClassOf("RegisterOperand") || in EmitLeafMatchCode()
244 LeafRec->isSubClassOf("PointerLikeRegClass") || in EmitLeafMatchCode()
245 LeafRec->isSubClassOf("SubRegIndex") || in EmitLeafMatchCode()
252 if (LeafRec->isSubClassOf("Register")) { in EmitLeafMatchCode()
259 if (LeafRec->isSubClassOf("CondCode")) in EmitLeafMatchCode()
262 if (LeafRec->isSubClassOf("ComplexPattern")) { in EmitLeafMatchCode()
287 if (N->getOperator()->isSubClassOf("ComplexPattern")) { in EmitOperatorMatchCode()
617 if (Def->isSubClassOf("Register")) { in EmitResultLeafAsOperand()
[all …]
DCodeGenInstruction.cpp76 if (Rec->isSubClassOf("RegisterOperand")) { in CGIOperandList()
80 } else if (Rec->isSubClassOf("Operand")) { in CGIOperandList()
99 if (Rec->isSubClassOf("PredicateOp")) in CGIOperandList()
101 else if (Rec->isSubClassOf("OptionalDefOperand")) in CGIOperandList()
106 } else if (Rec->isSubClassOf("RegisterClass")) { in CGIOperandList()
108 } else if (!Rec->isSubClassOf("PointerLikeRegClass") && in CGIOperandList()
109 !Rec->isSubClassOf("unknown_class")) in CGIOperandList()
375 assert(FirstImplicitDef->isSubClassOf("Register")); in HasOneImplicitDefWithKnownVT()
460 if (InstOpRec->isSubClassOf("RegisterOperand")) in tryAliasOpMatch()
463 if (ADI && ADI->getDef()->isSubClassOf("RegisterOperand")) in tryAliasOpMatch()
[all …]
DCodeGenDAGPatterns.cpp876 if (!Def->isSubClassOf("Predicate")) { in getPredicateCheck()
905 if (R->isSubClassOf("SDTCisVT")) { in SDTypeConstraint()
911 } else if (R->isSubClassOf("SDTCisPtrTy")) { in SDTypeConstraint()
913 } else if (R->isSubClassOf("SDTCisInt")) { in SDTypeConstraint()
915 } else if (R->isSubClassOf("SDTCisFP")) { in SDTypeConstraint()
917 } else if (R->isSubClassOf("SDTCisVec")) { in SDTypeConstraint()
919 } else if (R->isSubClassOf("SDTCisSameAs")) { in SDTypeConstraint()
922 } else if (R->isSubClassOf("SDTCisVTSmallerThanOp")) { in SDTypeConstraint()
926 } else if (R->isSubClassOf("SDTCisOpSmallerThanOp")) { in SDTypeConstraint()
930 } else if (R->isSubClassOf("SDTCisEltOfVec")) { in SDTypeConstraint()
[all …]
DCodeGenTarget.cpp501 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); in CodeGenIntrinsic()
503 if (TyEl->isSubClassOf("LLVMMatchType")) { in CodeGenIntrinsic()
511 assert(((!TyEl->isSubClassOf("LLVMExtendedType") && in CodeGenIntrinsic()
512 !TyEl->isSubClassOf("LLVMTruncatedType")) || in CodeGenIntrinsic()
535 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); in CodeGenIntrinsic()
537 if (TyEl->isSubClassOf("LLVMMatchType")) { in CodeGenIntrinsic()
545 assert(((!TyEl->isSubClassOf("LLVMExtendedType") && in CodeGenIntrinsic()
546 !TyEl->isSubClassOf("LLVMTruncatedType") && in CodeGenIntrinsic()
547 !TyEl->isSubClassOf("LLVMVectorSameWidth") && in CodeGenIntrinsic()
548 !TyEl->isSubClassOf("LLVMPointerToElt")) || in CodeGenIntrinsic()
[all …]
DCodeGenSchedule.cpp164 if (ModelKey->isSubClassOf("SchedMachineModel")) { in addProcModel()
185 if (RWDef->isSubClassOf("WriteSequence")) { in scanSchedRW()
190 else if (RWDef->isSubClassOf("SchedVariant")) { in scanSchedRW()
219 if ((*RWI)->isSubClassOf("SchedWrite")) in collectSchedRW()
222 assert((*RWI)->isSubClassOf("SchedRead") && "Unknown SchedReadWrite"); in collectSchedRW()
234 if ((*RWI)->isSubClassOf("SchedWrite")) in collectSchedRW()
237 assert((*RWI)->isSubClassOf("SchedRead") && "Unknown SchedReadWrite"); in collectSchedRW()
249 if ((*RWI)->isSubClassOf("SchedWrite")) in collectSchedRW()
252 assert((*RWI)->isSubClassOf("SchedRead") && "Unknown SchedReadWrite"); in collectSchedRW()
264 if (MatchDef->isSubClassOf("SchedWrite")) { in collectSchedRW()
[all …]
DIntrinsicEmitter.cpp245 if (R->isSubClassOf("LLVMMatchType")) { in EncodeFixedType()
248 if (R->isSubClassOf("LLVMExtendedType")) in EncodeFixedType()
250 else if (R->isSubClassOf("LLVMTruncatedType")) in EncodeFixedType()
252 else if (R->isSubClassOf("LLVMHalfElementsVectorType")) in EncodeFixedType()
254 else if (R->isSubClassOf("LLVMVectorSameWidth")) { in EncodeFixedType()
261 else if (R->isSubClassOf("LLVMPointerTo")) in EncodeFixedType()
263 else if (R->isSubClassOf("LLVMVectorOfPointersToElt")) in EncodeFixedType()
294 if (R->isSubClassOf("LLVMQualPointerType")) { in EncodeFixedType()
DFastISelEmitter.cpp258 if (OpLeafRec->isSubClassOf("RegisterOperand")) in initialize()
260 if (OpLeafRec->isSubClassOf("RegisterClass")) in initialize()
262 else if (OpLeafRec->isSubClassOf("Register")) in initialize()
264 else if (OpLeafRec->isSubClassOf("ValueType")) { in initialize()
430 if (!OpLeafRec->isSubClassOf("Register")) in PhyRegForNode()
457 if (!Op->isSubClassOf("Instruction")) in collectPatterns()
469 if (ChildOp->getOperator()->isSubClassOf("Instruction")) { in collectPatterns()
483 if (Op0Rec->isSubClassOf("RegisterOperand")) in collectPatterns()
485 if (!Op0Rec->isSubClassOf("RegisterClass")) in collectPatterns()
DPseudoLoweringEmitter.cpp81 if (DI->getDef()->isSubClassOf("Register") || in addDagOperandMapping()
136 if (!Operator->isSubClassOf("Instruction")) in evaluateExpansion()
281 if (D.second->isSubClassOf(ExpansionClass) && in run()
282 D.second->isSubClassOf(InstructionClass)) in run()
DInstrInfoEmitter.cpp118 if (OpR->isSubClassOf("RegisterOperand")) in GetOperandInfo()
120 if (OpR->isSubClassOf("RegisterClass")) in GetOperandInfo()
122 else if (OpR->isSubClassOf("PointerLikeRegClass")) in GetOperandInfo()
132 if (OpR->isSubClassOf("PointerLikeRegClass")) in GetOperandInfo()
137 if (Op.Rec->isSubClassOf("PredicateOp")) in GetOperandInfo()
142 if (Op.Rec->isSubClassOf("OptionalDefOperand")) in GetOperandInfo()
DCodeGenSchedule.h64 IsRead = Def->isSubClassOf("SchedRead"); in CodeGenSchedRW()
65 HasVariants = Def->isSubClassOf("SchedVariant"); in CodeGenSchedRW()
72 IsSequence = Def->isSubClassOf("WriteSequence"); in CodeGenSchedRW()
334 bool IsRead = Def->isSubClassOf("SchedRead"); in getSchedRW()
DSubtargetEmitter.cpp616 if (PRDef->isSubClassOf("ProcResGroup")) { in EmitProcessorResources()
653 if (SchedWrite.TheDef->isSubClassOf("SchedWriteRes")) in FindWriteResources()
671 if (AliasDef && AliasDef->isSubClassOf("SchedWriteRes")) in FindWriteResources()
677 if (!WR->isSubClassOf("WriteRes")) in FindWriteResources()
704 if (SchedRead.TheDef->isSubClassOf("SchedReadAdvance")) in FindReadAdvance()
723 if (AliasDef && AliasDef->isSubClassOf("SchedReadAdvance")) in FindReadAdvance()
729 if (!RA->isSubClassOf("ReadAdvance")) in FindReadAdvance()
761 if (PRDef->isSubClassOf("ProcResGroup")) in ExpandProcResources()
768 if (SubDef->isSubClassOf("ProcResGroup")) { in ExpandProcResources()
781 if (PR == PRDef || !PR->isSubClassOf("ProcResGroup")) in ExpandProcResources()
DDAGISelEmitter.cpp47 if (Op->isSubClassOf("Instruction")) { in getResultPatternCost()
66 if (Op->isSubClassOf("Instruction")) { in getResultPatternSize()
/external/clang/utils/TableGen/
DClangAttrEmitter.cpp160 if (Attr->isSubClassOf("TargetSpecificAttr") && in getParsedAttrList()
1969 if (Attr->isSubClassOf(TheRecord)) { in classifyAttr()
2127 if (R.isSubClassOf(InhClass)) in EmitClangAttrPCHRead()
2143 if (R.isSubClassOf(InhClass)) in EmitClangAttrPCHRead()
2166 if (R.isSubClassOf(InhClass) || !Args.empty()) in EmitClangAttrPCHWrite()
2169 if (R.isSubClassOf(InhClass)) in EmitClangAttrPCHWrite()
2267 if (Attr->isSubClassOf("TargetSpecificAttr")) { in GenerateHasAttrSpellingStringSwitch()
2585 if (R.isSubClassOf("SubsetSubject")) { in CalculateDiagnostic()
2689 if (Base->isSubClassOf("SubsetSubject")) { in GenerateCustomAppertainsTo()
2737 if ((*I)->isSubClassOf("SubsetSubject")) { in GenerateAppertainsTo()
[all …]

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