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Searched refs:srw (Results 1 – 23 of 23) sorted by relevance

/external/llvm/test/CodeGen/PowerPC/
Dfast-isel-shifter.ll22 ; ELF64: srw
30 ; ELF64: srw
/external/llvm/test/MC/PowerPC/
Dppc64-encoding.s792 # CHECK-BE: srw 2, 3, 4 # encoding: [0x7c,0x62,0x24,0x30]
793 # CHECK-LE: srw 2, 3, 4 # encoding: [0x30,0x24,0x62,0x7c]
794 srw 2, 3, 4
795 # CHECK-BE: srw. 2, 3, 4 # encoding: [0x7c,0x62,0x24,0x31]
796 # CHECK-LE: srw. 2, 3, 4 # encoding: [0x31,0x24,0x62,0x7c]
797 srw. 2, 3, 4
/external/valgrind/none/tests/ppc64/
Djm-int.stdout.exp-LE714 srw 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)
715 srw 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)
716 srw 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)
717 srw 0000001cbe991def, 0000000000000000 => 00000000be991def (00000000 00000000)
718 srw 0000001cbe991def, 0000001cbe991def => 0000000000000000 (00000000 00000000)
719 srw 0000001cbe991def, ffffffffffffffff => 0000000000000000 (00000000 00000000)
720 srw ffffffffffffffff, 0000000000000000 => 00000000ffffffff (00000000 00000000)
721 srw ffffffffffffffff, 0000001cbe991def => 0000000000000000 (00000000 00000000)
722 srw ffffffffffffffff, ffffffffffffffff => 0000000000000000 (00000000 00000000)
855 srw. 0000000000000000, 0000000000000000 => 0000000000000000 (20000000 00000000)
[all …]
Djm-int.stdout.exp714 srw 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)
715 srw 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)
716 srw 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)
717 srw 0000001cbe991def, 0000000000000000 => 00000000be991def (00000000 00000000)
718 srw 0000001cbe991def, 0000001cbe991def => 0000000000000000 (00000000 00000000)
719 srw 0000001cbe991def, ffffffffffffffff => 0000000000000000 (00000000 00000000)
720 srw ffffffffffffffff, 0000000000000000 => 00000000ffffffff (00000000 00000000)
721 srw ffffffffffffffff, 0000001cbe991def => 0000000000000000 (00000000 00000000)
722 srw ffffffffffffffff, ffffffffffffffff => 0000000000000000 (00000000 00000000)
/external/valgrind/none/tests/ppc32/
Djm-int.stdout.exp554 srw 00000000, 00000000 => 00000000 (00000000 00000000)
555 srw 00000000, 000f423f => 00000000 (00000000 00000000)
556 srw 00000000, ffffffff => 00000000 (00000000 00000000)
557 srw 000f423f, 00000000 => 000f423f (00000000 00000000)
558 srw 000f423f, 000f423f => 00000000 (00000000 00000000)
559 srw 000f423f, ffffffff => 00000000 (00000000 00000000)
560 srw ffffffff, 00000000 => ffffffff (00000000 00000000)
561 srw ffffffff, 000f423f => 00000000 (00000000 00000000)
562 srw ffffffff, ffffffff => 00000000 (00000000 00000000)
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64-encoding.txt622 # CHECK: srw 2, 3, 4
625 # CHECK: srw. 2, 3, 4
Dppc64le-encoding.txt601 # CHECK: srw 2, 3, 4
604 # CHECK: srw. 2, 3, 4
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCSchedule.td308 // srw IntGeneral
DPPCInstrInfo.td950 "srw $rA, $rS, $rB", IntGeneral,
/external/testng/src/main/java/org/testng/
DTestNG.java1243 SuiteRunnerWorker srw = new SuiteRunnerWorker(suiteRunnerMap.get(xmlSuite), suiteRunnerMap, in runSuitesSequentially() local
1245 srw.run(); in runSuitesSequentially()
/external/v8/src/ppc/
Dmacro-assembler-ppc.cc827 srw(scratch, src_low, scratch); in ShiftLeftPair()
866 srw(dst_low, src_high, scratch); in ShiftRightPair()
872 srw(dst_low, src_low, shift); in ShiftRightPair()
875 srw(dst_high, src_high, shift); in ShiftRightPair()
918 srw(dst_low, src_low, shift); in ShiftRightAlgPair()
Dmacro-assembler-ppc.h101 #define ShiftRight_ srw
Dassembler-ppc.h950 void srw(Register dst, Register src1, Register src2, RCBit r = LeaveRC);
Dassembler-ppc.cc831 void Assembler::srw(Register dst, Register src1, Register src2, RCBit r) { in srw() function in v8::internal::Assembler
Dcode-stubs-ppc.cc149 __ srw(scratch_low, scratch_low, scratch); in Generate() local
/external/webrtc/talk/media/testdata/
Dvoice.rtpdump8 …����9_�4�ʎ�pju}�����qo~�{{oj}va`pw�������z~���whijoqwohel���m{������������srw���{c`q��igeu|�lg_d�…
/external/v8/src/compiler/ppc/
Dcode-generator-ppc.cc1195 ASSEMBLE_BINOP_RC(srw, srwi); in AssembleArchInstruction()
/external/llvm/lib/Target/PowerPC/
DPPCInstr64Bit.td617 "srw", "$rA, $rS, $rB", IIC_IntGeneral, []>;
DPPCInstrInfo.td2054 "srw", "$rA, $rS, $rB", IIC_IntGeneral,
/external/v8/src/crankshaft/ppc/
Dlithium-codegen-ppc.cc1607 __ srw(result, left, scratch, SetRC); in DoShiftI() local
1613 __ srw(result, left, scratch); in DoShiftI() local
/external/v8/src/full-codegen/ppc/
Dfull-codegen-ppc.cc1895 __ srw(scratch1, scratch1, scratch2); in EmitInlineSmiBinaryOp() local
/external/valgrind/VEX/orig_ppc32/
Dreturn0.orig5345 0x25482E28: 7D6B5430 srw r11,r11,r10
7619 0x25482FE8: 7D292C30 srw r9,r9,r5
14396 0x25483E90: 7D693C30 srw r9,r11,r7
14452 0x25483E50: 7D493C30 srw r9,r10,r7
14485 0x25483E64: 7D6A3C30 srw r10,r11,r7
14520 0x25483E78: 7D4B3C30 srw r11,r10,r7
14563 0x25483E90: 7D693C30 srw r9,r11,r7
14619 0x25483EB0: 7D483C30 srw r8,r10,r7
15673 0x25483E64: 7D6A3C30 srw r10,r11,r7
15708 0x25483E78: 7D4B3C30 srw r11,r10,r7
[all …]
Ddate.orig5345 0x25482E28: 7D6B5430 srw r11,r11,r10
7619 0x25482FE8: 7D292C30 srw r9,r9,r5
12552 0x25483E64: 7D6A3C30 srw r10,r11,r7
12587 0x25483E78: 7D4B3C30 srw r11,r10,r7
12630 0x25483E90: 7D693C30 srw r9,r11,r7
12686 0x25483E50: 7D493C30 srw r9,r10,r7
12719 0x25483E64: 7D6A3C30 srw r10,r11,r7
12754 0x25483E78: 7D4B3C30 srw r11,r10,r7
12797 0x25483E90: 7D693C30 srw r9,r11,r7
12853 0x25483EB0: 7D483C30 srw r8,r10,r7
[all …]