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Searched refs:Bridge (Results 1 – 25 of 55) sorted by relevance

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/device/linaro/bootloader/edk2/DuetPkg/PciBusNoEnumerationDxe/
DPciDeviceSupport.c82 PCI_IO_DEVICE *Bridge, in InsertPciDevice() argument
104 InsertTailList (&Bridge->ChildList, &(PciDeviceNode->Link)); in InsertPciDevice()
105 PciDeviceNode->Parent = Bridge; in InsertPciDevice()
138 IN PCI_IO_DEVICE *Bridge in DestroyPciDeviceTree() argument
160 while (!IsListEmpty (&Bridge->ChildList)) { in DestroyPciDeviceTree()
162 CurrentLink = Bridge->ChildList.ForwardLink; in DestroyPciDeviceTree()
494 if ((((PciData.Bridge.IoBase & 0xF) == 0) && in EnableBridgeAttributes()
495 (PciData.Bridge.IoBase != 0 || PciData.Bridge.IoLimit != 0)) || in EnableBridgeAttributes()
496 (((PciData.Bridge.IoBase & 0xF) == 1) && in EnableBridgeAttributes()
497 …((PciData.Bridge.IoBase & 0xF0) != 0 || (PciData.Bridge.IoLimit & 0xF0) != 0 || PciData.Bridge.IoB… in EnableBridgeAttributes()
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DPciDeviceSupport.h50 PCI_IO_DEVICE *Bridge,
73 IN PCI_IO_DEVICE *Bridge
262 IN PCI_IO_DEVICE *Bridge,
DPciEnumeratorSupport.c66 IN PCI_IO_DEVICE *Bridge,
177 IN PCI_IO_DEVICE *Bridge, in PciPciDeviceInfoCollector() argument
213 Bridge->PciRootBridgeIo, in PciPciDeviceInfoCollector()
233 Bridge, in PciPciDeviceInfoCollector()
286 IN PCI_IO_DEVICE *Bridge, in PciSearchDevice() argument
322 Bridge->PciRootBridgeIo, in PciSearchDevice()
337 Bridge->PciRootBridgeIo, in PciSearchDevice()
352 Bridge->PciRootBridgeIo, in PciSearchDevice()
375 Bridge->DevicePath, in PciSearchDevice()
405 InsertPciDevice (Bridge, PciIoDevice); in PciSearchDevice()
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/
DPciEnumerator.c325 IN PCI_IO_DEVICE *Bridge, in ProcessOptionRom() argument
336 CurrentLink = Bridge->ChildList.ForwardLink; in ProcessOptionRom()
337 while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) { in ProcessOptionRom()
372 IN PCI_IO_DEVICE *Bridge, in PciAssignBusNumber() argument
387 PciRootBridgeIo = Bridge->PciRootBridgeIo; in PciAssignBusNumber()
424 Status = PciAllocateBusNumber (Bridge, *SubBusNumber, 1, SubBusNumber); in PciAssignBusNumber()
468 Bridge, in PciAssignBusNumber()
573 IN PCI_IO_DEVICE *Bridge in GetMaxOptionRomSize() argument
586 CurrentLink = Bridge->ChildList.ForwardLink; in GetMaxOptionRomSize()
587 while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) { in GetMaxOptionRomSize()
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DPciResourceSupport.c101 IN OUT PCI_RESOURCE_NODE *Bridge, in InsertResourceNode() argument
110 ASSERT (Bridge != NULL); in InsertResourceNode()
113 InsertHeadList (&Bridge->ChildList, &ResNode->Link); in InsertResourceNode()
115 CurrentLink = Bridge->ChildList.ForwardLink->ForwardLink; in InsertResourceNode()
116 while (CurrentLink != &Bridge->ChildList) { in InsertResourceNode()
190 IN PCI_RESOURCE_NODE *Bridge in CalculateApertureIo16() argument
235 if (Bridge == NULL) { in CalculateApertureIo16()
242 for ( CurrentLink = GetFirstNode (&Bridge->ChildList) in CalculateApertureIo16()
243 ; !IsNull (&Bridge->ChildList, CurrentLink) in CalculateApertureIo16()
244 ; CurrentLink = GetNextNode (&Bridge->ChildList, CurrentLink) in CalculateApertureIo16()
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DPciResourceSupport.h79 IN OUT PCI_RESOURCE_NODE *Bridge,
117 IN PCI_RESOURCE_NODE *Bridge
129 IN PCI_RESOURCE_NODE *Bridge
216 IN PCI_IO_DEVICE *Bridge,
261 IN PCI_IO_DEVICE *Bridge,
280 IN PCI_IO_DEVICE *Bridge,
299 IN PCI_RESOURCE_NODE *Bridge
367 IN PCI_RESOURCE_NODE *Bridge
392 IN PCI_RESOURCE_NODE *Bridge
DPciLib.h56 IN PCI_IO_DEVICE *Bridge
92 IN PCI_IO_DEVICE *Bridge,
114 IN PCI_IO_DEVICE *Bridge,
131 IN PCI_IO_DEVICE *Bridge
DPciEnumerator.h62 IN PCI_IO_DEVICE *Bridge,
80 IN PCI_IO_DEVICE *Bridge,
112 IN PCI_IO_DEVICE *Bridge
257 IN PCI_IO_DEVICE *Bridge,
313 IN PCI_IO_DEVICE *Bridge
332 IN PCI_IO_DEVICE *Bridge,
449 IN PCI_IO_DEVICE *Bridge,
DPciEnumeratorSupport.h55 IN PCI_IO_DEVICE *Bridge,
75 IN PCI_IO_DEVICE *Bridge,
97 IN PCI_IO_DEVICE *Bridge,
118 IN PCI_IO_DEVICE *Bridge,
139 IN PCI_IO_DEVICE *Bridge,
378 IN PCI_IO_DEVICE *Bridge,
459 IN PCI_IO_DEVICE *Bridge,
DPciDeviceSupport.h48 IN PCI_IO_DEVICE *Bridge,
72 IN PCI_IO_DEVICE *Bridge
126 PCI_IO_DEVICE *Bridge
228 IN PCI_IO_DEVICE *Bridge,
DPciLib.c120 IN PCI_IO_DEVICE *Bridge in RemoveRejectedPciDevices() argument
131 CurrentLink = Bridge->ChildList.ForwardLink; in RemoveRejectedPciDevices()
133 while (CurrentLink != NULL && CurrentLink != &Bridge->ChildList) { in RemoveRejectedPciDevices()
279 IN PCI_IO_DEVICE *Bridge, in DumpResourceMap() argument
295 Bridge->Handle, in DumpResourceMap()
305 Bridge->BusNumber, Bridge->DeviceNumber, Bridge->FunctionNumber in DumpResourceMap()
309 DevicePathFromHandle (Bridge->Handle), in DumpResourceMap()
324 for ( Link = Bridge->ChildList.ForwardLink in DumpResourceMap()
325 ; Link != &Bridge->ChildList in DumpResourceMap()
909 IN PCI_IO_DEVICE *Bridge, in PciAllocateBusNumber() argument
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DPciDeviceSupport.c59 IN PCI_IO_DEVICE *Bridge, in InsertPciDevice() argument
63 InsertTailList (&Bridge->ChildList, &(PciDeviceNode->Link)); in InsertPciDevice()
64 PciDeviceNode->Parent = Bridge; in InsertPciDevice()
120 IN PCI_IO_DEVICE *Bridge in DestroyPciDeviceTree() argument
126 while (!IsListEmpty (&Bridge->ChildList)) { in DestroyPciDeviceTree()
128 CurrentLink = Bridge->ChildList.ForwardLink; in DestroyPciDeviceTree()
425 PCI_IO_DEVICE *Bridge in RemoveAllPciDeviceOnBridge() argument
431 while (!IsListEmpty (&Bridge->ChildList)) { in RemoveAllPciDeviceOnBridge()
433 CurrentLink = Bridge->ChildList.ForwardLink; in RemoveAllPciDeviceOnBridge()
961 IN PCI_IO_DEVICE *Bridge, in PciDeviceExisted() argument
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DPciEnumeratorSupport.c94 IN PCI_IO_DEVICE *Bridge, in PciPciDeviceInfoCollector() argument
117 Bridge->PciRootBridgeIo, in PciPciDeviceInfoCollector()
136 …PreprocessController (Bridge, (UINT8) StartBusNumber, Device, Func, EfiPciBeforeResourceCollection… in PciPciDeviceInfoCollector()
142 Bridge, in PciPciDeviceInfoCollector()
213 IN PCI_IO_DEVICE *Bridge, in PciSearchDevice() argument
238 Bridge, in PciSearchDevice()
253 Bridge, in PciSearchDevice()
268 Bridge, in PciSearchDevice()
314 InsertPciDevice (Bridge, PciIoDevice); in PciSearchDevice()
456 IN PCI_IO_DEVICE *Bridge, in GatherDeviceInfo() argument
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/device/linaro/bootloader/edk2/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/
DUefiPciSegmentLibPciRootBridgeIo.uni2 // PCI Segment Library that layers on top of the PCI Root Bridge I/O Protocol.
5 // by calling into the PCI Root Bridge I/O Protocols that are present in the platform.
6 // The PCI Root Bridge I/O Protocols are typically produced by a chipset specific DXE driver.
7 // This library binds to all of the PCI Root Bridge I/O Protocols in the platform and handles
8 // the translation from a PCI segment number into a specific PCI Root Bridge I/O Protocol.
22 #string STR_MODULE_ABSTRACT #language en-US "Layers on top of the PCI Root Bridge I/O P…
24 …Bridge I/O Protocols that are present in the platform. The PCI Root Bridge I/O Protocols are typic…
DUefiPciSegmentLibPciRootBridgeIo.inf2 # PCI Segment Library that layers on top of the PCI Root Bridge I/O Protocol.
5 # by calling into the PCI Root Bridge I/O Protocols that are present in the platform.
6 # The PCI Root Bridge I/O Protocols are typically produced by a chipset specific DXE driver.
7 # This library binds to all of the PCI Root Bridge I/O Protocols in the platform and handles
8 # the translation from a PCI segment number into a specific PCI Root Bridge I/O Protocol.
/device/linaro/bootloader/edk2/EmbeddedPkg/Ebl/
DHwDebug.c196 PCI_BRIDGE_CONTROL_REGISTER *Bridge; in EblPciCmd() local
230 Hdr = &PciHeader.Bridge.Hdr; in EblPciCmd()
270 Hdr = &PciHeader.Bridge.Hdr; in EblPciCmd()
271 if (IS_PCI_BRIDGE (&PciHeader.Bridge)) { in EblPciCmd()
272 Bridge = &PciHeader.Bridge.Bridge; in EblPciCmd()
275 Bridge->PrimaryBus, Bridge->SecondaryBus, Bridge->SubordinateBus in EblPciCmd()
277 AsciiPrint (" Bar 0: 0x%08x Bar 1: 0x%08x\n", Bridge->Bar[0], Bridge->Bar[1]); in EblPciCmd()
/device/linaro/bootloader/edk2/MdePkg/Library/SmmPciLibPciRootBridgeIo/
DSmmPciLibPciRootBridgeIo.uni2 // PCI Library that layers on top of the SMM PCI Root Bridge I/O Protocol.
5 // by calling into SMM PCI Root Bridge I/O Protocol. SMM PCI Root Bridge I/O Protocol is
7 // This library binds to the first SMM PCI Root Bridge I/O Protocol in the platform. As a result,
22 … #language en-US "PCI Library that layers on top of the SMM PCI Root Bridge I/O Protocol"
24 …Bridge I/O Protocol. SMM PCI Root Bridge I/O Protocol is typically produced by a chipset-specific …
DSmmPciLibPciRootBridgeIo.inf2 # PCI Library that layers on top of the SMM PCI Root Bridge I/O Protocol.
5 # by calling into SMM PCI Root Bridge I/O Protocol. SMM PCI Root Bridge I/O Protocol is
7 # This library binds to the first SMM PCI Root Bridge I/O Protocol in the platform. As a result,
/device/linaro/bootloader/edk2/MdePkg/Library/UefiPciLibPciRootBridgeIo/
DUefiPciLibPciRootBridgeIo.uni2 // PCI Library that layers on top of the PCI Root Bridge I/O Protocol.
5 // by calling into the PCI Root Bridge I/O Protocol. The PCI Root Bridge I/O Protocol is
7 // This library binds to the first PCI Root Bridge I/O Protocol in the platform. As a result,
22 …CT #language en-US "PCI Library that layers on top of the PCI Root Bridge I/O Protocol"
24 …Bridge I/O Protocol. The PCI Root Bridge I/O Protocol is typically produced by a chipset-specific …
DUefiPciLibPciRootBridgeIo.inf2 # PCI Library that layers on top of the PCI Root Bridge I/O Protocol.
5 # by calling into the PCI Root Bridge I/O Protocol. The PCI Root Bridge I/O Protocol is
7 # This library binds to the first PCI Root Bridge I/O Protocol in the platform. As a result,
/device/linaro/bootloader/edk2/PcAtChipsetPkg/PciHostBridgeDxe/
DPciHostBridge.uni2 // The basic interfaces implementation to a single segment PCI Host Bridge driver.
4 // The basic interfaces implementation to a single segment PCI Host Bridge driver.
19 … #language en-US "The basic interfaces implementation to a single segment PCI Host Bridge driver"
21 … #language en-US "The basic interfaces implementation to a single segment PCI Host Bridge driver."
/device/linaro/bootloader/edk2/DuetPkg/PciRootBridgeNoEnumerationDxe/
DPcatPciRootBridge.c240 if (PciConfigurationHeader.Bridge.SubordinateBus > PrivateData->SubordinateBus) { in InitializePcatPciRootBridge()
245 PrivateData->SubordinateBus = PciConfigurationHeader.Bridge.SubordinateBus; in InitializePcatPciRootBridge()
251 Value = PciConfigurationHeader.Bridge.IoBase & 0x0f; in InitializePcatPciRootBridge()
252 Base = ((UINT32)PciConfigurationHeader.Bridge.IoBase & 0xf0) << 8; in InitializePcatPciRootBridge()
253 Limit = (((UINT32)PciConfigurationHeader.Bridge.IoLimit & 0xf0) << 8) | 0x0fff; in InitializePcatPciRootBridge()
255 Base |= ((UINT32)PciConfigurationHeader.Bridge.IoBaseUpper16 << 16); in InitializePcatPciRootBridge()
256 Limit |= ((UINT32)PciConfigurationHeader.Bridge.IoLimitUpper16 << 16); in InitializePcatPciRootBridge()
270 Base = ((UINT32)PciConfigurationHeader.Bridge.MemoryBase & 0xfff0) << 16; in InitializePcatPciRootBridge()
271 Limit = (((UINT32)PciConfigurationHeader.Bridge.MemoryLimit & 0xfff0) << 16) | 0xfffff; in InitializePcatPciRootBridge()
290 Value = PciConfigurationHeader.Bridge.PrefetchableMemoryBase & 0x0f; in InitializePcatPciRootBridge()
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/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/
DPciTree.asl4 ;* Intel Corporation - ACPI Reference Code for the Sandy Bridge *;
124 // LPC Bridge
138 // Host Bridge
196 // LPC Bridge
209 // Host Bridge
356 Device(PCI0) // PCI Bridge "Host Bridge"
376 Device(LPCB) // LPC Bridge
380 } // end "LPC Bridge"
382 } // end PCI0 Bridge "Host Bridge"
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Acpi/AcpiTables/Dsdt/
DPciHostBridge.asi2 PCI Host Bridge Definitions
151 // Bus 0, Device 20 - IOSFAHB Bridge
157 // Bus 0, Device 21 - IOSFAHB Bridge
170 Package() {0x001fffff, 0, \_SB.PCI0.LPC.LNKA, 0}, // LPC Bridge
178 // Bus 0, Device 20 - IOSFAHB Bridge
184 // Bus 0, Device 21 - IOSFAHB Bridge
197 Package() {0x001fffff, 0, 0, 16}, // LPC Bridge
/device/linaro/bootloader/edk2/ShellPkg/Library/UefiShellDebug1CommandsLib/
DPci.c1946 IN PCI_BRIDGE_HEADER *Bridge,
3225 &(ConfigSpace->NonCommon.Bridge), in PciExplainData()
3229 CapPtr = ConfigSpace->NonCommon.Bridge.CapabilitiesPtr; in PciExplainData()
3414 IN PCI_BRIDGE_HEADER *Bridge, in PciExplainBridgeData() argument
3430 …, -1, NULL,STRING_TOKEN (STR_PCI2_BASE_ADDRESS), gShellDebug1HiiHandle, INDEX_OF (&(Bridge->Bar))); in PciExplainBridgeData()
3433 BarCount = sizeof (Bridge->Bar) / sizeof (Bridge->Bar[0]); in PciExplainBridgeData()
3436 if (Bridge->Bar[Index] == 0) { in PciExplainBridgeData()
3447 &(Bridge->Bar[Index]), in PciExplainBridgeData()
3468 if ((Bridge->ROMBar & PCI_BIT_0) == 0) { in PciExplainBridgeData()
3469 …ULL,STRING_TOKEN (STR_PCI2_NO_EXPANSION_ROM), gShellDebug1HiiHandle, INDEX_OF (&(Bridge->ROMBar))); in PciExplainBridgeData()
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