Searched refs:MPIDR_AFFLVL0 (Results 1 – 12 of 12) sorted by relevance
98 for (i = psci_aff_limits[MPIDR_AFFLVL0].min; in psci_is_last_on_cpu()99 i <= psci_aff_limits[MPIDR_AFFLVL0].max; i++) { in psci_is_last_on_cpu()101 assert(psci_aff_map[i].level == MPIDR_AFFLVL0); in psci_is_last_on_cpu()171 MPIDR_AFFLVL0); in get_power_on_target_afflvl()203 assert(aff_lvl <= MPIDR_MAX_AFFLVL && aff_lvl >= MPIDR_AFFLVL0); in get_max_afflvl()242 if (start_afflvl < MPIDR_AFFLVL0) in psci_check_afflvl_range()390 assert(node->level >= MPIDR_AFFLVL0 && node->level <= MPIDR_MAX_AFFLVL); in psci_get_state()393 if (node->level == MPIDR_AFFLVL0) in psci_get_state()417 assert(node->level >= MPIDR_AFFLVL0 && node->level <= MPIDR_MAX_AFFLVL); in psci_set_state()425 if (node->level > MPIDR_AFFLVL0) { in psci_set_state()
162 if (level == MPIDR_AFFLVL0) { in psci_get_aff_map_nodes()198 if (level == MPIDR_AFFLVL0) { in psci_init_aff_map_node()333 for (afflvl = max_afflvl; afflvl >= MPIDR_AFFLVL0; afflvl--) { in psci_setup()355 for (afflvl = MPIDR_AFFLVL0; afflvl < max_afflvl; afflvl++) { in psci_setup()368 for (afflvl = MPIDR_AFFLVL0; afflvl <= max_afflvl; afflvl++) { in psci_setup()
53 rc = psci_validate_mpidr(target_cpu, MPIDR_AFFLVL0); in psci_cpu_on()81 start_afflvl = MPIDR_AFFLVL0; in psci_cpu_on()163 MPIDR_AFFLVL0, in psci_cpu_suspend()219 MPIDR_AFFLVL0, in psci_system_suspend()238 rc = psci_afflvl_off(MPIDR_AFFLVL0, target_afflvl); in psci_cpu_off()298 rc = psci_validate_mpidr(target_cpu, MPIDR_AFFLVL0); in psci_migrate()
73 assert(cpu_node->level == MPIDR_AFFLVL0); in psci_afflvl0_on()248 target_cpu_nodes[MPIDR_AFFLVL0])); in psci_afflvl_on()305 assert(cpu_node->level == MPIDR_AFFLVL0); in psci_afflvl0_on_finish()
46 assert(cpu_node->level == MPIDR_AFFLVL0); in psci_afflvl0_off()52 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL0); in psci_afflvl0_off()
111 assert(cpu_node->level == MPIDR_AFFLVL0); in psci_afflvl0_suspend()120 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL0); in psci_afflvl0_suspend()361 assert(cpu_node->level == MPIDR_AFFLVL0); in psci_afflvl0_suspend_finish()
153 mov x0, #MPIDR_AFFLVL0
80 cmp x0, #MPIDR_AFFLVL0
148 if (afflvl != MPIDR_AFFLVL0) in fvp_affinst_on()193 if (afflvl != MPIDR_AFFLVL0) in fvp_affinst_off()232 if (afflvl != MPIDR_AFFLVL0) in fvp_affinst_suspend()256 if (afflvl != MPIDR_AFFLVL0) { in fvp_affinst_on_finish()335 if (psci_get_pstate_afflvl(power_state) != MPIDR_AFFLVL0) in fvp_validate_power_state()
98 if (psci_get_pstate_afflvl(power_state) != MPIDR_AFFLVL0) in juno_validate_power_state()125 if (afflvl != MPIDR_AFFLVL0) in juno_affinst_on()161 if (afflvl != MPIDR_AFFLVL0) in juno_affinst_on_finish()189 if (afflvl > MPIDR_AFFLVL0) { in juno_power_down_common()
81 case MPIDR_AFFLVL0: in hikey_affinst_on()115 case MPIDR_AFFLVL0: in hikey_affinst_off()153 case MPIDR_AFFLVL0: in hikey_affinst_suspend()182 if (afflvl != MPIDR_AFFLVL0) in hikey_affinst_on_finish()
60 #define MPIDR_AFFLVL0 0 macro