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/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp102 bool MatchAddress(SDValue N, MSP430ISelAddressMode &AM);
103 bool MatchWrapper(SDValue N, MSP430ISelAddressMode &AM);
104 bool MatchAddressBase(SDValue N, MSP430ISelAddressMode &AM);
134 bool MSP430DAGToDAGISel::MatchWrapper(SDValue N, MSP430ISelAddressMode &AM) { in MatchWrapper() argument
137 if (AM.hasSymbolicDisplacement()) in MatchWrapper()
143 AM.GV = G->getGlobal(); in MatchWrapper()
144 AM.Disp += G->getOffset(); in MatchWrapper()
147 AM.CP = CP->getConstVal(); in MatchWrapper()
148 AM.Align = CP->getAlignment(); in MatchWrapper()
149 AM.Disp += CP->getOffset(); in MatchWrapper()
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp106 bool MatchAddress(SDValue N, MSP430ISelAddressMode &AM);
107 bool MatchWrapper(SDValue N, MSP430ISelAddressMode &AM);
108 bool MatchAddressBase(SDValue N, MSP430ISelAddressMode &AM);
139 bool MSP430DAGToDAGISel::MatchWrapper(SDValue N, MSP430ISelAddressMode &AM) { in MatchWrapper() argument
142 if (AM.hasSymbolicDisplacement()) in MatchWrapper()
148 AM.GV = G->getGlobal(); in MatchWrapper()
149 AM.Disp += G->getOffset(); in MatchWrapper()
152 AM.CP = CP->getConstVal(); in MatchWrapper()
153 AM.Align = CP->getAlignment(); in MatchWrapper()
154 AM.Disp += CP->getOffset(); in MatchWrapper()
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp85 void getAddressOperandsRI(const SystemZRRIAddressMode &AM,
87 void getAddressOperands(const SystemZRRIAddressMode &AM,
141 bool MatchAddress(SDValue N, SystemZRRIAddressMode &AM,
143 bool MatchAddressBase(SDValue N, SystemZRRIAddressMode &AM);
182 bool SystemZDAGToDAGISel::MatchAddress(SDValue N, SystemZRRIAddressMode &AM, in MatchAddress() argument
185 DEBUG(errs() << "MatchAddress: "; AM.dump()); in MatchAddress()
188 return MatchAddressBase(N, AM); in MatchAddress()
199 isImmZExt12(AM.Disp + Val, Imm) : in MatchAddress()
200 isImmSExt20(AM.Disp + Val, Imm)); in MatchAddress()
202 AM.Disp = Imm; in MatchAddress()
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DSystemZInstrBuilder.h90 addFullAddress(const MachineInstrBuilder &MIB, const SystemZAddressMode &AM) { in addFullAddress() argument
91 if (AM.BaseType == SystemZAddressMode::RegBase) in addFullAddress()
92 MIB.addReg(AM.Base.Reg); in addFullAddress()
93 else if (AM.BaseType == SystemZAddressMode::FrameIndexBase) in addFullAddress()
94 MIB.addFrameIndex(AM.Base.FrameIndex); in addFullAddress()
98 return MIB.addImm(AM.Disp).addReg(AM.IndexReg); in addFullAddress()
/external/llvm/lib/Target/X86/
DX86InstrBuilder.h90 X86AddressMode AM; in getAddressFromInstr() local
93 AM.BaseType = X86AddressMode::RegBase; in getAddressFromInstr()
94 AM.Base.Reg = Op.getReg(); in getAddressFromInstr()
96 AM.BaseType = X86AddressMode::FrameIndexBase; in getAddressFromInstr()
97 AM.Base.FrameIndex = Op.getIndex(); in getAddressFromInstr()
101 AM.Scale = Op.getImm(); in getAddressFromInstr()
104 AM.IndexReg = Op.getImm(); in getAddressFromInstr()
107 AM.GV = Op.getGlobal(); in getAddressFromInstr()
109 AM.Disp = Op.getImm(); in getAddressFromInstr()
111 return AM; in getAddressFromInstr()
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DX86ISelDAGToDAG.cpp202 bool foldOffsetIntoAddress(uint64_t Offset, X86ISelAddressMode &AM);
203 bool matchLoadInAddress(LoadSDNode *N, X86ISelAddressMode &AM);
204 bool matchWrapper(SDValue N, X86ISelAddressMode &AM);
205 bool matchAddress(SDValue N, X86ISelAddressMode &AM);
206 bool matchAdd(SDValue N, X86ISelAddressMode &AM, unsigned Depth);
207 bool matchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
209 bool matchAddressBase(SDValue N, X86ISelAddressMode &AM);
244 inline void getAddressOperands(X86ISelAddressMode &AM, const SDLoc &DL, in getAddressOperands() argument
248 Base = (AM.BaseType == X86ISelAddressMode::FrameIndexBase) in getAddressOperands()
250 AM.Base_FrameIndex, in getAddressOperands()
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DX86FastISel.cpp88 bool X86FastEmitLoad(EVT VT, X86AddressMode &AM, MachineMemOperand *MMO,
91 bool X86FastEmitStore(EVT VT, const Value *Val, X86AddressMode &AM,
94 X86AddressMode &AM,
100 bool X86SelectAddress(const Value *V, X86AddressMode &AM);
101 bool X86SelectCallAddress(const Value *V, X86AddressMode &AM);
143 bool handleConstantAddresses(const Value *V, X86AddressMode &AM);
172 X86AddressMode &AM);
256 X86AddressMode &AM) { in addFullAddress() argument
258 AM.IndexReg = constrainOperandRegClass(MIB->getDesc(), AM.IndexReg, in addFullAddress()
261 return ::addFullAddress(MIB, AM); in addFullAddress()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelDAGToDAG.cpp195 bool FoldOffsetIntoAddress(uint64_t Offset, X86ISelAddressMode &AM);
196 bool MatchLoadInAddress(LoadSDNode *N, X86ISelAddressMode &AM);
197 bool MatchWrapper(SDValue N, X86ISelAddressMode &AM);
198 bool MatchAddress(SDValue N, X86ISelAddressMode &AM);
199 bool MatchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
201 bool MatchAddressBase(SDValue N, X86ISelAddressMode &AM);
230 inline void getAddressOperands(X86ISelAddressMode &AM, SDValue &Base, in getAddressOperands() argument
233 Base = (AM.BaseType == X86ISelAddressMode::FrameIndexBase) ? in getAddressOperands()
234 CurDAG->getTargetFrameIndex(AM.Base_FrameIndex, TLI.getPointerTy()) : in getAddressOperands()
235 AM.Base_Reg; in getAddressOperands()
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DX86InstrBuilder.h124 const X86AddressMode &AM) { in addFullAddress() argument
125 assert(AM.Scale == 1 || AM.Scale == 2 || AM.Scale == 4 || AM.Scale == 8); in addFullAddress()
127 if (AM.BaseType == X86AddressMode::RegBase) in addFullAddress()
128 MIB.addReg(AM.Base.Reg); in addFullAddress()
130 assert(AM.BaseType == X86AddressMode::FrameIndexBase); in addFullAddress()
131 MIB.addFrameIndex(AM.Base.FrameIndex); in addFullAddress()
134 MIB.addImm(AM.Scale).addReg(AM.IndexReg); in addFullAddress()
135 if (AM.GV) in addFullAddress()
136 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
138 MIB.addImm(AM.Disp); in addFullAddress()
DX86FastISel.cpp81 bool X86FastEmitLoad(EVT VT, const X86AddressMode &AM, unsigned &RR);
83 bool X86FastEmitStore(EVT VT, const Value *Val, const X86AddressMode &AM);
84 bool X86FastEmitStore(EVT VT, unsigned Val, const X86AddressMode &AM);
89 bool X86SelectAddress(const Value *V, X86AddressMode &AM);
90 bool X86SelectCallAddress(const Value *V, X86AddressMode &AM);
176 bool X86FastISel::X86FastEmitLoad(EVT VT, const X86AddressMode &AM, in X86FastEmitLoad() argument
226 DL, TII.get(Opc), ResultReg), AM); in X86FastEmitLoad()
235 X86FastISel::X86FastEmitStore(EVT VT, unsigned Val, const X86AddressMode &AM) { in X86FastEmitStore() argument
264 DL, TII.get(Opc)), AM).addReg(Val); in X86FastEmitStore()
269 const X86AddressMode &AM) { in X86FastEmitStore() argument
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/external/llvm/include/llvm/IR/
DPassManager.h244 PreservedAnalyses run(IRUnitT &IR, AnalysisManager<IRUnitT> &AM) { in run() argument
255 PreservedAnalyses PassPA = Passes[Idx]->run(IR, AM); in run()
261 PassPA = AM.invalidate(IR, std::move(PassPA)); in run()
678 explicit Result(AnalysisManagerT &AM) : AM(&AM) {} in Result() argument
679 Result(Result &&Arg) : AM(std::move(Arg.AM)) { in Result()
683 Arg.AM = nullptr; in Result()
686 AM = RHS.AM;
690 RHS.AM = nullptr;
695 if (!AM) in ~Result()
700 AM->clear(); in ~Result()
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DPassManagerInternal.h43 virtual PreservedAnalyses run(IRUnitT &IR, AnalysisManager<IRUnitT> &AM) = 0;
71 PreservedAnalysesT run(IRUnitT &IR, AnalysisManager<IRUnitT> &AM) override { in run()
72 return Pass.run(IR, AM); in run()
201 run(IRUnitT &IR, AnalysisManager<IRUnitT> &AM) = 0;
236 run(IRUnitT &IR, AnalysisManager<IRUnitT> &AM) override {
237 return make_unique<ResultModelT>(Pass.run(IR, AM));
/external/curl/tests/data/
Dtest111442 Time: 04-27-10 05:12AM
48 Time: 04-23-10 03:12AM
54 Time: 01-11-10 10:00AM
64 Time: 02-01-10 08:00AM
74 Time: 02-01-10 08:00AM
84 Time: 05-04-10 04:31AM
90 Time: 05-04-10 04:31AM
96 Time: 04-27-10 11:01AM
105 Time: 04-27-10 11:01AM
115 Time: 01-23-05 02:05AM
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/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp151 bool expandAddress(SystemZAddressingMode &AM, bool IsBase) const;
154 bool selectAddress(SDValue N, SystemZAddressingMode &AM) const;
157 void getAddressOperands(const SystemZAddressingMode &AM, EVT VT,
159 void getAddressOperands(const SystemZAddressingMode &AM, EVT VT,
382 static void changeComponent(SystemZAddressingMode &AM, bool IsBase, in changeComponent() argument
385 AM.Base = Value; in changeComponent()
387 AM.Index = Value; in changeComponent()
393 static bool expandAdjDynAlloc(SystemZAddressingMode &AM, bool IsBase, in expandAdjDynAlloc() argument
395 if (AM.isDynAlloc() && !AM.IncludesDynAlloc) { in expandAdjDynAlloc()
396 changeComponent(AM, IsBase, Value); in expandAdjDynAlloc()
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/external/llvm/unittests/Analysis/
DCGSCCPassManagerTest.cpp37 Result run(Module &M, ModuleAnalysisManager &AM) { in run() argument
62 Result run(LazyCallGraph::SCC &C, CGSCCAnalysisManager &AM) { in run() argument
87 Result run(Function &F, FunctionAnalysisManager &AM) { in run() argument
116 Result run(Function &F, FunctionAnalysisManager &AM) { in run() argument
132 PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM) { in run()
134 (void)AM.getResult<TestModuleAnalysis>(M); in run()
152 PreservedAnalyses run(LazyCallGraph::SCC &C, CGSCCAnalysisManager &AM) { in run()
156 AM.getResult<ModuleAnalysisManagerCGSCCProxy>(C).getManager(); in run()
158 AM.getResult<FunctionAnalysisManagerCGSCCProxy>(C).getManager(); in run()
166 if (TestSCCAnalysis::Result *AR = AM.getCachedResult<TestSCCAnalysis>(C)) in run()
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DLoopPassManagerTest.cpp45 Result run(Loop &L, AnalysisManager<Loop> &AM) { in run() argument
68 PreservedAnalyses run(Loop &L, AnalysisManager<Loop> &AM) { in run() argument
73 if (auto *AR = AM.getCachedResult<TestLoopAnalysis>(L)) in run()
77 auto &AR = AM.getResult<TestLoopAnalysis>(L); in run()
94 PreservedAnalyses run(Loop &L, AnalysisManager<Loop> &AM) { in run() argument
/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/
DLoopStrengthReduce.cpp217 TargetLowering::AddrMode AM; member
318 AM.HasBaseReg = true; in InitialMatch()
324 AM.HasBaseReg = true; in InitialMatch()
340 AM.BaseGV ? AM.BaseGV->getType() : in getType()
373 if (AM.BaseGV) { in print()
375 WriteAsOperand(OS, AM.BaseGV, /*PrintType=*/false); in print()
377 if (AM.BaseOffs != 0) { in print()
379 OS << AM.BaseOffs; in print()
386 if (AM.HasBaseReg && BaseRegs.empty()) { in print()
389 } else if (!AM.HasBaseReg && !BaseRegs.empty()) { in print()
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/external/llvm/lib/Analysis/
DRegionInfo.cpp187 RegionInfo RegionInfoAnalysis::run(Function &F, AnalysisManager<Function> &AM) { in run() argument
189 auto *DT = &AM.getResult<DominatorTreeAnalysis>(F); in run()
190 auto *PDT = &AM.getResult<PostDominatorTreeAnalysis>(F); in run()
191 auto *DF = &AM.getResult<DominanceFrontierAnalysis>(F); in run()
201 FunctionAnalysisManager &AM) { in run() argument
203 AM.getResult<RegionInfoAnalysis>(F).print(OS); in run()
209 AnalysisManager<Function> &AM) { in run() argument
210 AM.getResult<RegionInfoAnalysis>(F).verifyAnalysis(); in run()
DDominanceFrontier.cpp62 FunctionAnalysisManager &AM) { in run() argument
64 DF.analyze(AM.getResult<DominatorTreeAnalysis>(F)); in run()
72 DominanceFrontierPrinterPass::run(Function &F, FunctionAnalysisManager &AM) { in run() argument
74 AM.getResult<DominanceFrontierAnalysis>(F).print(OS); in run()
/external/icu/icu4c/source/data/locales/
Dru_UA.txt28 "AM",
32 "AM",
36 "AM",
76 am{"AM"}
80 am{"AM"}
84 am{"AM"}
/external/llvm/unittests/IR/
DPassManagerTest.cpp32 Result run(Function &F, FunctionAnalysisManager &AM) { in run() argument
60 Result run(Module &M, ModuleAnalysisManager &AM) { in run() argument
96 PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM) { in run()
100 (void)AM.getResult<TestModuleAnalysis>(M); in run()
115 PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM) { in run()
119 AM.getResult<ModuleAnalysisManagerFunctionProxy>(F).getManager(); in run()
127 AM.getCachedResult<TestFunctionAnalysis>(F)) in run()
131 TestFunctionAnalysis::Result &AR = AM.getResult<TestFunctionAnalysis>(F); in run()
150 PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM) { in run()
/external/swiftshader/third_party/LLVM/include/llvm/Transforms/Utils/
DAddrModeMatcher.h50 static inline raw_ostream &operator<<(raw_ostream &OS, const ExtAddrMode &AM) {
51 AM.print(OS);
75 Instruction *MI, ExtAddrMode &AM) in AddressingModeMatcher() argument
76 : AddrModeInsts(AMI), TLI(T), AccessTy(AT), MemoryInst(MI), AddrMode(AM) { in AddressingModeMatcher()
/external/llvm/include/llvm/Transforms/
DPGOInstrumentation.h25 PreservedAnalyses run(Module &M, AnalysisManager<Module> &AM);
31 PreservedAnalyses run(Module &M, AnalysisManager<Module> &AM);
42 PreservedAnalyses run(Module &M, AnalysisManager<Module> &AM);
/external/llvm/include/llvm/Analysis/
DCGSCCPassManager.h92 PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM) { in run() argument
95 AM.getResult<CGSCCAnalysisManagerModuleProxy>(M).getManager(); in run()
98 LazyCallGraph &CG = AM.getResult<LazyCallGraphAnalysis>(M); in run()
188 PreservedAnalyses run(LazyCallGraph::SCC &C, CGSCCAnalysisManager &AM) { in run() argument
191 AM.getResult<FunctionAnalysisManagerCGSCCProxy>(C).getManager(); in run()
/external/llvm/lib/Transforms/Utils/
DSimplifyInstructions.cpp129 AnalysisManager<Function> &AM) { in run() argument
130 auto *DT = AM.getCachedResult<DominatorTreeAnalysis>(F); in run()
131 auto &TLI = AM.getResult<TargetLibraryAnalysis>(F); in run()
132 auto &AC = AM.getResult<AssumptionAnalysis>(F); in run()

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