/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUInstructions.td | 180 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS; 198 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS; 218 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS; 229 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS; 242 return cast<MemSDNode>(N)->getAddressSPace() == AMDGPUAS::FLAT_ADDRESS; 310 return cast<MemSDNode>(N)->getAlignment() % 8 == 0; 324 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::LOCAL_ADDRESS; 342 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS; 368 return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::FLAT_ADDRESS; 374 [{return cast<MemSDNode>(N)->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS;}] [all …]
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D | AMDGPUISelDAGToDAG.cpp | 76 bool isConstantLoad(const MemSDNode *N, int cbID) const; 221 cast<MemSDNode>(N)->getAddressSpace() != AMDGPUAS::LOCAL_ADDRESS) in glueCopyToM0() 485 bool AMDGPUDAGToDAGISel::isConstantLoad(const MemSDNode *N, int CbId) const { in isConstantLoad() 1365 MemSDNode *Mem = cast<MemSDNode>(N); in SelectATOMIC_CMP_SWAP() 1524 if (MemSDNode *M = dyn_cast<MemSDNode>(User)) { in PreprocessISelDAG()
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D | R600Instructions.td | 342 const MemSDNode *LD = cast<MemSDNode>(N); 355 const MemSDNode *LD = cast<MemSDNode>(N);
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D | SIISelLowering.cpp | 509 const MemSDNode *MemNode = cast<MemSDNode>(N); in isMemOpUniform() 1925 MemSDNode *M = cast<MemSDNode>(Op); in LowerINTRINSIC_W_CHAIN() 3025 MemSDNode *MemNode = cast<MemSDNode>(N); in PerformDAGCombine()
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D | SIInstrInfo.td | 155 const MemSDNode *LD = cast<MemSDNode>(N); 170 const MemSDNode *ST = cast<MemSDNode>(N); 183 const MemSDNode *LD = cast<MemSDNode>(N);
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D | AMDGPUISelLowering.cpp | 2163 if (MemSDNode *M = dyn_cast<MemSDNode>(U)) { in hasVolatileUser()
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | SelectionDAGNodes.h | 882 class MemSDNode : public SDNode { 892 MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT MemoryVT, 895 MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, const SDValue *Ops, 960 static bool classof(const MemSDNode *) { return true; } 987 class AtomicSDNode : public MemSDNode { 1020 : MemSDNode(Opc, dl, VTL, MemVT, MMO) { 1028 : MemSDNode(Opc, dl, VTL, MemVT, MMO) { 1036 : MemSDNode(Opc, dl, VTL, MemVT, MMO) { 1073 class MemIntrinsicSDNode : public MemSDNode { 1078 : MemSDNode(Opc, dl, VTs, Ops, NumOps, MemoryVT, MMO) { [all …]
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/external/llvm/lib/Target/Mips/ |
D | MipsISelDAGToDAG.cpp | 226 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <= in Select() 227 cast<MemSDNode>(Node)->getAlignment()) && in Select()
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/external/llvm/include/llvm/CodeGen/ |
D | SelectionDAGNodes.h | 1011 class MemSDNode : public SDNode { 1021 MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs, 1125 class AtomicSDNode : public MemSDNode { 1157 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) { 1203 class MemIntrinsicSDNode : public MemSDNode { 1207 : MemSDNode(Opc, Order, dl, VTs, MemoryVT, MMO) { 1777 class LSBaseSDNode : public MemSDNode { 1782 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) { 1866 class MaskedLoadStoreSDNode : public MemSDNode { 1872 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {} [all …]
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/external/llvm/lib/Target/AVR/ |
D | AVR.h | 42 inline bool isProgramMemoryAccess(MemSDNode const *N) { in isProgramMemoryAccess()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelDAGToDAG.cpp | 539 static unsigned int getCodeAddrSpace(MemSDNode *N) { in getCodeAddrSpace() 559 static bool canLowerToLDG(MemSDNode *N, const NVPTXSubtarget &Subtarget, in canLowerToLDG() 907 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in tryLoad() 922 MemSDNode *MemSD = cast<MemSDNode>(N); in tryLoadVector() 1293 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in tryLoadVector() 1304 MemSDNode *Mem; in tryLDGLDU() 1329 Mem = cast<MemSDNode>(N); in tryLDGLDU() 2345 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in tryStore() 2359 MemSDNode *MemSD = cast<MemSDNode>(N); in tryStoreVector() 2719 MemRefs0[0] = cast<MemSDNode>(N)->getMemOperand(); in tryStoreVector() [all …]
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D | NVPTXISelLowering.cpp | 1941 MemSDNode *MemSD = cast<MemSDNode>(N); in LowerSTOREVector() 4004 MemSDNode *Mem = dyn_cast<MemSDNode>(Val); in PerformANDCombine()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 525 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { in print_details()
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D | SelectionDAG.cpp | 485 const MemSDNode *PF = cast<MemSDNode>(N); in AddNodeIDCustom() 508 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace()); in AddNodeIDCustom() 6723 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, in MemSDNode() function in MemSDNode
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelDAGToDAG.cpp | 363 MemRefs0[0] = cast<MemSDNode>(N1)->getMemOperand(); in tryIndexedBinOp()
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
D | MSP430ISelDAGToDAG.cpp | 366 MemRefs0[0] = cast<MemSDNode>(N1)->getMemOperand(); in SelectIndexedBinOp()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 1146 cast<MemSDNode>(Parent)->getPointerInfo().getAddrSpace(); in SelectAddr() 1335 MemOp[0] = cast<MemSDNode>(Node)->getMemOperand(); in SelectAtomic64() 1480 MemOp[0] = cast<MemSDNode>(Node)->getMemOperand(); in SelectAtomicLoadAdd() 1642 MemOp[0] = cast<MemSDNode>(Node)->getMemOperand(); in SelectAtomicLoadArith()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelDAGToDAG.cpp | 180 bool isAlignedMemNode(const MemSDNode *N) const; 1520 bool HexagonDAGToDAGISel::isAlignedMemNode(const MemSDNode *N) const { in isAlignedMemNode()
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D | HexagonInstrInfoV60.td | 14 return isAlignedMemNode(dyn_cast<MemSDNode>(N)); 18 return !isAlignedMemNode(dyn_cast<MemSDNode>(N)); 22 return isAlignedMemNode(dyn_cast<MemSDNode>(N)); 26 return !isAlignedMemNode(dyn_cast<MemSDNode>(N));
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 617 if (isStrongerThanMonotonic(cast<MemSDNode>(Use)->getOrdering())) in isWorthFoldingADDlow() 827 if (!isa<MemSDNode>(*UI)) in SelectAddrModeWRO() 911 if (!isa<MemSDNode>(*UI)) in SelectAddrModeXRO() 2527 EVT MemTy = cast<MemSDNode>(N)->getMemoryVT(); in SelectCMP_SWAP() 2547 MemOp[0] = cast<MemSDNode>(N)->getMemOperand(); in SelectCMP_SWAP()
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/external/llvm/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 524 if (isa<MemSDNode>(Chain.getNode()) && in isCalleeLoad() 525 cast<MemSDNode>(Chain.getNode())->writeMem()) in isCalleeLoad() 1479 cast<MemSDNode>(Parent)->getPointerInfo().getAddrSpace(); in selectAddr()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 791 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!"); in VerifySDNode() 5656 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt, in MemSDNode() function in MemSDNode 5667 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, in MemSDNode() function in MemSDNode 6306 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { in print_details()
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D | SelectionDAGISel.cpp | 2218 MatchedMemRefs.push_back(cast<MemSDNode>(N)->getMemOperand()); in SelectCodeCommon()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 1108 MemSDNode *MemN = cast<MemSDNode>(Parent); in SelectAddrMode6() 2630 EVT MemTy = cast<MemSDNode>(N)->getMemoryVT(); in SelectCMP_SWAP() 2647 MemOp[0] = cast<MemSDNode>(N)->getMemOperand(); in SelectCMP_SWAP()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 9693 if (MemSDNode *ChainLD = dyn_cast<MemSDNode>(ChainNext)) { in findConsecutiveLoad() 9724 if (MemSDNode *ChainLD = dyn_cast<MemSDNode>(LoadRoot)) in findConsecutiveLoad() 9730 if (((isa<MemSDNode>(*UI) && in findConsecutiveLoad() 9731 cast<MemSDNode>(*UI)->getChain().getNode() == LoadRoot) || in findConsecutiveLoad()
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