/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | SelectionDAGNodes.h | 1584 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; } 1587 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; } 1769 Ld->getAddressingMode() == ISD::UNINDEXED; 1804 cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED; 1812 St->getAddressingMode() == ISD::UNINDEXED; 1831 cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
|
D | ISDOpcodes.h | 672 UNINDEXED = 0, enumerator
|
/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 808 UNINDEXED = 0, enumerator
|
D | SelectionDAGNodes.h | 1798 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; } 1801 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; } 2085 Ld->getAddressingMode() == ISD::UNINDEXED; 2115 cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED; 2123 St->getAddressingMode() == ISD::UNINDEXED; 2139 cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelDAGToDAG.cpp | 523 if (AM != ISD::UNINDEXED) { in SelectLoad() 631 if (AM != ISD::UNINDEXED) { in SelectStore() 673 LD->getAddressingMode() != ISD::UNINDEXED) { in SelectMul() 702 LD->getAddressingMode() != ISD::UNINDEXED) { in SelectMul()
|
/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 5105 bool Indexed = AM != ISD::UNINDEXED; in getLoad() 5138 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, in getLoad() 5146 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, in getLoad() 5157 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, in getExtLoad() 5166 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, in getExtLoad() 5218 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), in getStore() 5227 ISD::UNINDEXED, false, VT, MMO); in getStore() 5288 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), in getTruncStore() 5297 ISD::UNINDEXED, true, SVT, MMO); in getTruncStore() 5341 ID.AddInteger(encodeMemSDNodeFlags(ExtTy, ISD::UNINDEXED, in getMaskedLoad() [all …]
|
D | LegalizeVectorTypes.cpp | 226 SDValue Result = DAG.getLoad(ISD::UNINDEXED, in ScalarizeVecRes_LOAD() 1063 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD() 1070 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD()
|
D | TargetLowering.cpp | 3245 assert(LD->getAddressingMode() == ISD::UNINDEXED && in expandUnalignedLoad() 3402 assert(ST->getAddressingMode() == ISD::UNINDEXED && in expandUnalignedStore()
|
D | DAGCombiner.cpp | 9696 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPreIndexedLoadStore() 9924 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPostIndexedLoadStore() 10005 assert(AM != ISD::UNINDEXED); in SplitIndexingFromLoad()
|
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 4188 bool Indexed = AM != ISD::UNINDEXED; in getLoad() 4218 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef, in getLoad() 4228 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, in getExtLoad() 4284 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(), in getStore() 4291 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, in getStore() 4351 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(), in getTruncStore() 4358 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED, in getTruncStore() 5659 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), in MemSDNode() 5672 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(), in MemSDNode()
|
D | LegalizeVectorTypes.cpp | 188 SDValue Result = DAG.getLoad(ISD::UNINDEXED, in ScalarizeVecRes_LOAD() 720 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD() 727 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset, in SplitVecRes_LOAD()
|
D | DAGCombiner.cpp | 5906 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPreIndexedLoadStore() 6041 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPostIndexedLoadStore()
|
/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
D | TargetSelectionDAG.td | 596 return cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED; 661 return cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
|
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrFragmentsSIMD.td | 318 ST->getAddressingMode() == ISD::UNINDEXED &&
|
D | X86ISelDAGToDAG.cpp | 404 LD->getAddressingMode() != ISD::UNINDEXED || in isCalleeLoad()
|
/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 709 return cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED; 819 return cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
|
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
D | SPUISelLowering.cpp | 563 assert( LN->getAddressingMode() == ISD::UNINDEXED in LowerLOAD() 776 assert( SN->getAddressingMode() == ISD::UNINDEXED in LowerSTORE()
|
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 1332 if (AM == ISD::UNINDEXED) in SelectARMIndexedLoad() 1405 if (AM == ISD::UNINDEXED) in SelectT2IndexedLoad()
|
/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 1474 if (AM == ISD::UNINDEXED) in tryARMIndexedLoad() 1549 if (AM == ISD::UNINDEXED) in tryT2IndexedLoad()
|
/external/llvm/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 509 LD->getAddressingMode() != ISD::UNINDEXED || in isCalleeLoad()
|
/external/llvm/lib/Target/AMDGPU/ |
D | R600ISelLowering.cpp | 1797 SDValue Arg = DAG.getLoad(ISD::UNINDEXED, Ext, VT, DL, Chain, in LowerFormalArguments()
|
D | SIInstrInfo.td | 227 return cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED && 265 return cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED &&
|
D | SIISelLowering.cpp | 580 return DAG.getLoad(ISD::UNINDEXED, ExtTy, in LowerParameter()
|
/external/llvm/docs/ |
D | WritingAnLLVMBackend.rst | 1249 ST->getAddressingMode() == ISD::UNINDEXED;
|
/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/ |
D | org.apache.lucene_1.9.1.v20100518-1140.jar | META-INF/MANIFEST.MF
META-INF/ECLIPSEF.SF
META-INF/ECLIPSEF ... |