1%default {"source_suffix":"","dest_suffix":"","wide":""}
2/*
3 * Generic 32-bit FP conversion operation.
4 */
5    /* unop vA, vB */
6    movl    rINST, %ecx                     # rcx <- A+
7    sarl    $$4, rINST                      # rINST <- B
8    andb    $$0xf, %cl                      # ecx <- A
9    cvts${source_suffix}2s${dest_suffix}    VREG_ADDRESS(rINSTq), %xmm0
10    .if $wide
11    movsd   %xmm0, VREG_ADDRESS(%rcx)
12    CLEAR_WIDE_REF %rcx
13    .else
14    movss   %xmm0, VREG_ADDRESS(%rcx)
15    CLEAR_REF %rcx
16    .endif
17    ADVANCE_PC_FETCH_AND_GOTO_NEXT 1
18