1/* Copyright (c) 2012, Linaro Limited
2   All rights reserved.
3
4   Redistribution and use in source and binary forms, with or without
5   modification, are permitted provided that the following conditions are met:
6       * Redistributions of source code must retain the above copyright
7         notice, this list of conditions and the following disclaimer.
8       * Redistributions in binary form must reproduce the above copyright
9         notice, this list of conditions and the following disclaimer in the
10         documentation and/or other materials provided with the distribution.
11       * Neither the name of the Linaro nor the
12         names of its contributors may be used to endorse or promote products
13         derived from this software without specific prior written permission.
14
15   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19   HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26*/
27
28/* Assumptions:
29 *
30 * ARMv8-a, AArch64
31 */
32
33#include <private/bionic_asm.h>
34
35#define REP8_01 0x0101010101010101
36#define REP8_7f 0x7f7f7f7f7f7f7f7f
37#define REP8_80 0x8080808080808080
38
39/* Parameters and result.  */
40#define src1		x0
41#define src2		x1
42#define result		x0
43
44/* Internal variables.  */
45#define data1		x2
46#define data1w		w2
47#define data2		x3
48#define data2w		w3
49#define has_nul		x4
50#define diff		x5
51#define syndrome	x6
52#define tmp1		x7
53#define tmp2		x8
54#define tmp3		x9
55#define zeroones	x10
56#define pos		x11
57
58	/* Start of performance-critical section  -- one 64B cache line.  */
59ENTRY(strcmp)
60.p2align  6
61	eor	tmp1, src1, src2
62	mov	zeroones, #REP8_01
63	tst	tmp1, #7
64	b.ne	.Lmisaligned8
65	ands	tmp1, src1, #7
66	b.ne	.Lmutual_align
67	/* NUL detection works on the principle that (X - 1) & (~X) & 0x80
68	   (=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and
69	   can be done in parallel across the entire word.  */
70.Lloop_aligned:
71	ldr	data1, [src1], #8
72	ldr	data2, [src2], #8
73.Lstart_realigned:
74	sub	tmp1, data1, zeroones
75	orr	tmp2, data1, #REP8_7f
76	eor	diff, data1, data2	/* Non-zero if differences found.  */
77	bic	has_nul, tmp1, tmp2	/* Non-zero if NUL terminator.  */
78	orr	syndrome, diff, has_nul
79	cbz	syndrome, .Lloop_aligned
80	/* End of performance-critical section  -- one 64B cache line.  */
81
82#ifndef	__AARCH64EB__
83	rev	syndrome, syndrome
84	rev	data1, data1
85	/* The MS-non-zero bit of the syndrome marks either the first bit
86	   that is different, or the top bit of the first zero byte.
87	   Shifting left now will bring the critical information into the
88	   top bits.  */
89	clz	pos, syndrome
90	rev	data2, data2
91	lsl	data1, data1, pos
92	lsl	data2, data2, pos
93	/* But we need to zero-extend (char is unsigned) the value and then
94	   perform a signed 32-bit subtraction.  */
95	lsr	data1, data1, #56
96	sub	result, data1, data2, lsr #56
97	ret
98#else
99	/* For big-endian we cannot use the trick with the syndrome value
100	   as carry-propagation can corrupt the upper bits if the trailing
101	   bytes in the string contain 0x01.  */
102	/* However, if there is no NUL byte in the dword, we can generate
103	   the result directly.  We can't just subtract the bytes as the
104	   MSB might be significant.  */
105	cbnz	has_nul, 1f
106	cmp	data1, data2
107	cset	result, ne
108	cneg	result, result, lo
109	ret
1101:
111	/* Re-compute the NUL-byte detection, using a byte-reversed value.  */
112	rev	tmp3, data1
113	sub	tmp1, tmp3, zeroones
114	orr	tmp2, tmp3, #REP8_7f
115	bic	has_nul, tmp1, tmp2
116	rev	has_nul, has_nul
117	orr	syndrome, diff, has_nul
118	clz	pos, syndrome
119	/* The MS-non-zero bit of the syndrome marks either the first bit
120	   that is different, or the top bit of the first zero byte.
121	   Shifting left now will bring the critical information into the
122	   top bits.  */
123	lsl	data1, data1, pos
124	lsl	data2, data2, pos
125	/* But we need to zero-extend (char is unsigned) the value and then
126	   perform a signed 32-bit subtraction.  */
127	lsr	data1, data1, #56
128	sub	result, data1, data2, lsr #56
129	ret
130#endif
131
132.Lmutual_align:
133	/* Sources are mutually aligned, but are not currently at an
134	   alignment boundary.  Round down the addresses and then mask off
135	   the bytes that preceed the start point.  */
136	bic	src1, src1, #7
137	bic	src2, src2, #7
138	lsl	tmp1, tmp1, #3		/* Bytes beyond alignment -> bits.  */
139	ldr	data1, [src1], #8
140	neg	tmp1, tmp1		/* Bits to alignment -64.  */
141	ldr	data2, [src2], #8
142	mov	tmp2, #~0
143#ifdef __AARCH64EB__
144	/* Big-endian.  Early bytes are at MSB.  */
145	lsl	tmp2, tmp2, tmp1	/* Shift (tmp1 & 63).  */
146#else
147	/* Little-endian.  Early bytes are at LSB.  */
148	lsr	tmp2, tmp2, tmp1	/* Shift (tmp1 & 63).  */
149#endif
150	orr	data1, data1, tmp2
151	orr	data2, data2, tmp2
152	b	.Lstart_realigned
153
154.Lmisaligned8:
155	/* We can do better than this.  */
156	ldrb	data1w, [src1], #1
157	ldrb	data2w, [src2], #1
158	cmp	data1w, #1
159	ccmp	data1w, data2w, #0, cs	/* NZCV = 0b0000.  */
160	b.eq	.Lmisaligned8
161	sub	result, data1, data2
162	ret
163END(strcmp)
164