1#------------------------------------------------------------------------------
2#
3# SemMem() worker for ARM
4#
5# This file started out as C code that did 64 bit moves if the buffer was
6# 32-bit aligned, else it does a byte copy. It also does a byte copy for
7# any trailing bytes. It was updated to do 32-byte at a time.
8#
9# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
10# This program and the accompanying materials
11# are licensed and made available under the terms and conditions of the BSD License
12# which accompanies this distribution.  The full text of the license may be found at
13# http://opensource.org/licenses/bsd-license.php
14#
15# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
16# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17#
18#------------------------------------------------------------------------------
19
20/**
21  Set Buffer to Value for Size bytes.
22
23  @param  Buffer   Memory to set.
24  @param  Length   Number of bytes to set
25  @param  Value    Value of the set operation.
26
27  @return Buffer
28
29VOID *
30EFIAPI
31InternalMemSetMem (
32  OUT     VOID                      *Buffer,
33  IN      UINTN                     Length,
34  IN      UINT8                     Value
35  )
36**/
37
38.text
39.syntax unified
40.align 2
41GCC_ASM_EXPORT(InternalMemSetMem)
42
43ASM_PFX(InternalMemSetMem):
44  stmfd  sp!, {r4-r11, lr}
45  tst    r0, #3
46  movne  r3, #0
47  moveq  r3, #1
48  cmp    r1, #31
49  movls lr, #0
50  andhi  lr, r3, #1
51  cmp    lr, #0
52  mov    r12, r0
53  bne    L31
54L32:
55  mov    r3, #0
56  b      L43
57L31:
58  and   r4, r2, #0xff
59  orr   r4, r4, r4, LSL #8
60  orr   r4, r4, r4, LSL #16
61  mov   r5, r4
62  mov   r6, r4
63  mov   r7, r4
64  mov   r8, r4
65  mov   r9, r4
66  mov   r10, r4
67  mov   r11, r4
68  b      L32
69L34:
70  cmp      lr, #0
71  strbeq  r2, [r12], #1
72  subeq    r1, r1, #1
73  beq      L43
74  sub      r1, r1, #32
75  cmp      r1, #31
76  movls    lr, r3
77  stmia    r12!, {r4-r11}
78L43:
79  cmp      r1, #0
80  bne      L34
81  ldmfd    sp!, {r4-r11, pc}
82
83