1#------------------------------------------------------------------------------ 2# 3# Copyright (c) 2011, ARM. All rights reserved.<BR> 4# 5# This program and the accompanying materials 6# are licensed and made available under the terms and conditions of the BSD License 7# which accompanies this distribution. The full text of the license may be found at 8# http://opensource.org/licenses/bsd-license.php 9# 10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12# 13#------------------------------------------------------------------------------ 14 15.text 16.align 2 17GCC_ASM_EXPORT(__aeabi_uidiv) 18GCC_ASM_EXPORT(__aeabi_uidivmod) 19GCC_ASM_EXPORT(__aeabi_idiv) 20GCC_ASM_EXPORT(__aeabi_idivmod) 21 22# AREA Math, CODE, READONLY 23 24# 25#UINT32 26#EFIAPI 27#__aeabi_uidivmode ( 28# IN UINT32 Dividen 29# IN UINT32 Divisor 30# ); 31# 32 33ASM_PFX(__aeabi_uidiv): 34ASM_PFX(__aeabi_uidivmod): 35 rsbs r12, r1, r0, LSR #4 36 mov r2, #0 37 bcc ASM_PFX(__arm_div4) 38 rsbs r12, r1, r0, LSR #8 39 bcc ASM_PFX(__arm_div8) 40 mov r3, #0 41 b ASM_PFX(__arm_div_large) 42 43# 44#INT32 45#EFIAPI 46#__aeabi_idivmode ( 47# IN INT32 Dividen 48# IN INT32 Divisor 49# ); 50# 51ASM_PFX(__aeabi_idiv): 52ASM_PFX(__aeabi_idivmod): 53 orrs r12, r0, r1 54 bmi ASM_PFX(__arm_div_negative) 55 rsbs r12, r1, r0, LSR #1 56 mov r2, #0 57 bcc ASM_PFX(__arm_div1) 58 rsbs r12, r1, r0, LSR #4 59 bcc ASM_PFX(__arm_div4) 60 rsbs r12, r1, r0, LSR #8 61 bcc ASM_PFX(__arm_div8) 62 mov r3, #0 63 b ASM_PFX(__arm_div_large) 64ASM_PFX(__arm_div8): 65 rsbs r12, r1, r0, LSR #7 66 subcs r0, r0, r1, LSL #7 67 adc r2, r2, r2 68 rsbs r12, r1, r0,LSR #6 69 subcs r0, r0, r1, LSL #6 70 adc r2, r2, r2 71 rsbs r12, r1, r0, LSR #5 72 subcs r0, r0, r1, LSL #5 73 adc r2, r2, r2 74 rsbs r12, r1, r0, LSR #4 75 subcs r0, r0, r1, LSL #4 76 adc r2, r2, r2 77ASM_PFX(__arm_div4): 78 rsbs r12, r1, r0, LSR #3 79 subcs r0, r0, r1, LSL #3 80 adc r2, r2, r2 81 rsbs r12, r1, r0, LSR #2 82 subcs r0, r0, r1, LSL #2 83 adcs r2, r2, r2 84 rsbs r12, r1, r0, LSR #1 85 subcs r0, r0, r1, LSL #1 86 adc r2, r2, r2 87ASM_PFX(__arm_div1): 88 subs r1, r0, r1 89 movcc r1, r0 90 adc r0, r2, r2 91 bx r14 92ASM_PFX(__arm_div_negative): 93 ands r2, r1, #0x80000000 94 rsbmi r1, r1, #0 95 eors r3, r2, r0, ASR #32 96 rsbcs r0, r0, #0 97 rsbs r12, r1, r0, LSR #4 98 bcc label1 99 rsbs r12, r1, r0, LSR #8 100 bcc label2 101ASM_PFX(__arm_div_large): 102 lsl r1, r1, #6 103 rsbs r12, r1, r0, LSR #8 104 orr r2, r2, #0xfc000000 105 bcc label2 106 lsl r1, r1, #6 107 rsbs r12, r1, r0, LSR #8 108 orr r2, r2, #0x3f00000 109 bcc label2 110 lsl r1, r1, #6 111 rsbs r12, r1, r0, LSR #8 112 orr r2, r2, #0xfc000 113 orrcs r2, r2, #0x3f00 114 lslcs r1, r1, #6 115 rsbs r12, r1, #0 116 bcs ASM_PFX(__aeabi_idiv0) 117label3: 118 lsrcs r1, r1, #6 119label2: 120 rsbs r12, r1, r0, LSR #7 121 subcs r0, r0, r1, LSL #7 122 adc r2, r2, r2 123 rsbs r12, r1, r0, LSR #6 124 subcs r0, r0, r1, LSL #6 125 adc r2, r2, r2 126 rsbs r12, r1, r0, LSR #5 127 subcs r0, r0, r1, LSL #5 128 adc r2, r2, r2 129 rsbs r12, r1, r0, LSR #4 130 subcs r0, r0, r1, LSL #4 131 adc r2, r2, r2 132label1: 133 rsbs r12, r1, r0, LSR #3 134 subcs r0, r0, r1, LSL #3 135 adc r2, r2, r2 136 rsbs r12, r1, r0, LSR #2 137 subcs r0, r0, r1, LSL #2 138 adcs r2, r2, r2 139 bcs label3 140 rsbs r12, r1, r0, LSR #1 141 subcs r0, r0, r1, LSL #1 142 adc r2, r2, r2 143 subs r1, r0, r1 144 movcc r1, r0 145 adc r0, r2, r2 146 asrs r3, r3, #31 147 rsbmi r0, r0, #0 148 rsbcs r1, r1, #0 149 bx r14 150 151 @ What to do about division by zero? For now, just return. 152ASM_PFX(__aeabi_idiv0): 153 bx r14 154