1 /** @file
2 *
3 *  Copyright (c) 2011, ARM Limited. All rights reserved.
4 *
5 *  This program and the accompanying materials
6 *  are licensed and made available under the terms and conditions of the BSD License
7 *  which accompanies this distribution.  The full text of the license may be found at
8 *  http://opensource.org/licenses/bsd-license.php
9 *
10 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 *
13 **/
14 
15 #include <Library/ArmPlatformLib.h>
16 #include <Library/DebugLib.h>
17 #include <Library/PcdLib.h>
18 #include <Library/IoLib.h>
19 #include <Library/MemoryAllocationLib.h>
20 
21 #include <ArmPlatform.h>
22 
23 // Number of Virtual Memory Map Descriptors without a Logic Tile
24 #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS          6
25 
26 // DDR attributes
27 #define DDR_ATTRIBUTES_CACHED           ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
28 #define DDR_ATTRIBUTES_UNCACHED         ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
29 
30 /**
31   Return the Virtual Memory Map of your platform
32 
33   This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
34 
35   @param[out]   VirtualMemoryMap    Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
36                                     Virtual Memory mapping. This array must be ended by a zero-filled
37                                     entry
38 
39 **/
40 VOID
ArmPlatformGetVirtualMemoryMap(IN ARM_MEMORY_REGION_DESCRIPTOR ** VirtualMemoryMap)41 ArmPlatformGetVirtualMemoryMap (
42   IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
43   )
44 {
45   ARM_MEMORY_REGION_ATTRIBUTES  CacheAttributes;
46   UINTN                         Index = 0;
47   ARM_MEMORY_REGION_DESCRIPTOR  *VirtualMemoryTable;
48 
49   ASSERT(VirtualMemoryMap != NULL);
50 
51   VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
52   if (VirtualMemoryTable == NULL) {
53       return;
54   }
55 
56   if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
57       CacheAttributes = DDR_ATTRIBUTES_CACHED;
58   } else {
59       CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
60   }
61 
62   if (FeaturePcdGet(PcdNorFlashRemapping) == FALSE) {
63     // ReMap (Either NOR Flash or DRAM)
64     VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;
65     VirtualMemoryTable[Index].VirtualBase  = ARM_VE_REMAP_BASE;
66     VirtualMemoryTable[Index].Length       = ARM_VE_REMAP_SZ;
67     VirtualMemoryTable[Index].Attributes   = CacheAttributes;
68   }
69 
70   // DDR
71   VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_DRAM_BASE;
72   VirtualMemoryTable[Index].VirtualBase  = ARM_VE_DRAM_BASE;
73   VirtualMemoryTable[Index].Length       = ARM_VE_DRAM_SZ;
74   VirtualMemoryTable[Index].Attributes   = CacheAttributes;
75 
76   // SMC CS7
77   VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;
78   VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;
79   VirtualMemoryTable[Index].Length       = ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ;
80   VirtualMemoryTable[Index].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
81 
82   // SMB CS0-CS1 - NOR Flash 1 & 2
83   VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;
84   VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_NOR0_BASE;
85   VirtualMemoryTable[Index].Length       = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;
86   VirtualMemoryTable[Index].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
87 
88   // SMB CS2 - SRAM
89   VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;
90   VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_SRAM_BASE;
91   VirtualMemoryTable[Index].Length       = ARM_VE_SMB_SRAM_SZ;
92   VirtualMemoryTable[Index].Attributes   = CacheAttributes;
93 
94   // SMB CS3-CS6 - Motherboard Peripherals
95   VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
96   VirtualMemoryTable[Index].VirtualBase  = ARM_VE_SMB_PERIPH_BASE;
97   VirtualMemoryTable[Index].Length       = ARM_VE_SMB_PERIPH_SZ;
98   VirtualMemoryTable[Index].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
99 
100   // If a Logic Tile is connected to The ARM Versatile Express Motherboard
101   if (MmioRead32(ARM_VE_SYS_PROCID1_REG) != 0) {
102       VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE;
103       VirtualMemoryTable[Index].VirtualBase  = ARM_VE_EXT_AXI_BASE;
104       VirtualMemoryTable[Index].Length       = ARM_VE_EXT_AXI_SZ;
105       VirtualMemoryTable[Index].Attributes   = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
106 
107       ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1));
108   } else {
109     ASSERT((Index + 1) == MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
110   }
111 
112   // End of Table
113   VirtualMemoryTable[++Index].PhysicalBase = 0;
114   VirtualMemoryTable[Index].VirtualBase  = 0;
115   VirtualMemoryTable[Index].Length       = 0;
116   VirtualMemoryTable[Index].Attributes   = (ARM_MEMORY_REGION_ATTRIBUTES)0;
117 
118   *VirtualMemoryMap = VirtualMemoryTable;
119 }
120