1#
2#  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
3#
4#  This program and the accompanying materials
5#  are licensed and made available under the terms and conditions of the BSD License
6#  which accompanies this distribution.  The full text of the license may be found at
7#  http://opensource.org/licenses/bsd-license.php
8#
9#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11#
12#
13
14#include <AsmMacroIoLibV8.h>
15#include <Base.h>
16#include <Library/ArmLib.h>
17#include <Library/PcdLib.h>
18#include <AutoGen.h>
19
20.text
21.align 2
22
23GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
24GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
25GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
26GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
27GCC_ASM_EXPORT(ArmGetPhysAddrTop)
28
29GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
30GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
31GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
32
33ASM_PFX(ArmPlatformPeiBootAction):
34  ret
35
36//UINTN
37//ArmPlatformGetPrimaryCoreMpId (
38//  VOID
39//  );
40ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
41  LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
42  ldrh   w0, [x0]
43  ret
44
45//UINTN
46//ArmPlatformIsPrimaryCore (
47//  IN UINTN MpId
48//  );
49ASM_PFX(ArmPlatformIsPrimaryCore):
50  mov   x0, #1
51  ret
52
53//UINTN
54//ArmPlatformGetCorePosition (
55//  IN UINTN MpId
56//  );
57// With this function: CorePos = (ClusterId * 4) + CoreId
58ASM_PFX(ArmPlatformGetCorePosition):
59  and   x1, x0, #ARM_CORE_MASK
60  and   x0, x0, #ARM_CLUSTER_MASK
61  add   x0, x1, x0, LSR #6
62  ret
63
64//EFI_PHYSICAL_ADDRESS
65//GetPhysAddrTop (
66//  VOID
67//  );
68ASM_PFX(ArmGetPhysAddrTop):
69  mrs   x0, id_aa64mmfr0_el1
70  adr   x1, .LPARanges
71  and   x0, x0, #7
72  ldrb  w1, [x1, x0]
73  mov   x0, #1
74  lsl   x0, x0, x1
75  ret
76
77//
78// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the
79// physical address space support on this CPU:
80// 0 == 32 bits, 1 == 36 bits, etc etc
81// 6 and 7 are reserved
82//
83.LPARanges:
84  .byte 32, 36, 40, 42, 44, 48, -1, -1
85
86ASM_FUNCTION_REMOVE_IF_UNREFERENCED
87