1 /** @file 2 EFI PCI IO protocol functions declaration for PCI Bus module. 3 4 Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR> 5 This program and the accompanying materials 6 are licensed and made available under the terms and conditions of the BSD License 7 which accompanies this distribution. The full text of the license may be found at 8 http://opensource.org/licenses/bsd-license.php 9 10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 13 **/ 14 15 #ifndef _EFI_PCI_IO_PROTOCOL_H_ 16 #define _EFI_PCI_IO_PROTOCOL_H_ 17 18 /** 19 Initializes a PCI I/O Instance. 20 21 @param PciIoDevice Pci device instance. 22 23 **/ 24 VOID 25 InitializePciIoInstance ( 26 IN PCI_IO_DEVICE *PciIoDevice 27 ); 28 29 /** 30 Verifies access to a PCI Base Address Register (BAR). 31 32 @param PciIoDevice Pci device instance. 33 @param BarIndex The BAR index of the standard PCI Configuration header to use as the 34 base address for the memory or I/O operation to perform. 35 @param Type Operation type could be memory or I/O. 36 @param Width Signifies the width of the memory or I/O operations. 37 @param Count The number of memory or I/O operations to perform. 38 @param Offset The offset within the PCI configuration space for the PCI controller. 39 40 @retval EFI_INVALID_PARAMETER Invalid Width/BarIndex or Bar type. 41 @retval EFI_SUCCESS Successfully verified. 42 43 **/ 44 EFI_STATUS 45 PciIoVerifyBarAccess ( 46 IN PCI_IO_DEVICE *PciIoDevice, 47 IN UINT8 BarIndex, 48 IN PCI_BAR_TYPE Type, 49 IN IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 50 IN IN UINTN Count, 51 IN UINT64 *Offset 52 ); 53 54 /** 55 Verifies access to a PCI Configuration Header. 56 57 @param PciIoDevice Pci device instance. 58 @param Width Signifies the width of the memory or I/O operations. 59 @param Count The number of memory or I/O operations to perform. 60 @param Offset The offset within the PCI configuration space for the PCI controller. 61 62 @retval EFI_INVALID_PARAMETER Invalid Width 63 @retval EFI_UNSUPPORTED Offset overflowed. 64 @retval EFI_SUCCESS Successfully verified. 65 66 **/ 67 EFI_STATUS 68 PciIoVerifyConfigAccess ( 69 IN PCI_IO_DEVICE *PciIoDevice, 70 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 71 IN UINTN Count, 72 IN UINT64 *Offset 73 ); 74 75 /** 76 Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is 77 satisfied or after a defined duration. 78 79 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 80 @param Width Signifies the width of the memory or I/O operations. 81 @param BarIndex The BAR index of the standard PCI Configuration header to use as the 82 base address for the memory operation to perform. 83 @param Offset The offset within the selected BAR to start the memory operation. 84 @param Mask Mask used for the polling criteria. 85 @param Value The comparison value used for the polling exit criteria. 86 @param Delay The number of 100 ns units to poll. 87 @param Result Pointer to the last value read from the memory location. 88 89 @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria. 90 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller. 91 @retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller. 92 @retval EFI_TIMEOUT Delay expired before a match occurred. 93 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 94 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 95 96 **/ 97 EFI_STATUS 98 EFIAPI 99 PciIoPollMem ( 100 IN EFI_PCI_IO_PROTOCOL *This, 101 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 102 IN UINT8 BarIndex, 103 IN UINT64 Offset, 104 IN UINT64 Mask, 105 IN UINT64 Value, 106 IN UINT64 Delay, 107 OUT UINT64 *Result 108 ); 109 110 /** 111 Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is 112 satisfied or after a defined duration. 113 114 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 115 @param Width Signifies the width of the memory or I/O operations. 116 @param BarIndex The BAR index of the standard PCI Configuration header to use as the 117 base address for the memory operation to perform. 118 @param Offset The offset within the selected BAR to start the memory operation. 119 @param Mask Mask used for the polling criteria. 120 @param Value The comparison value used for the polling exit criteria. 121 @param Delay The number of 100 ns units to poll. 122 @param Result Pointer to the last value read from the memory location. 123 124 @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria. 125 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller. 126 @retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller. 127 @retval EFI_TIMEOUT Delay expired before a match occurred. 128 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 129 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 130 131 **/ 132 EFI_STATUS 133 EFIAPI 134 PciIoPollIo ( 135 IN EFI_PCI_IO_PROTOCOL *This, 136 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 137 IN UINT8 BarIndex, 138 IN UINT64 Offset, 139 IN UINT64 Mask, 140 IN UINT64 Value, 141 IN UINT64 Delay, 142 OUT UINT64 *Result 143 ); 144 145 /** 146 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space. 147 148 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 149 @param Width Signifies the width of the memory or I/O operations. 150 @param BarIndex The BAR index of the standard PCI Configuration header to use as the 151 base address for the memory or I/O operation to perform. 152 @param Offset The offset within the selected BAR to start the memory or I/O operation. 153 @param Count The number of memory or I/O operations to perform. 154 @param Buffer For read operations, the destination buffer to store the results. For write 155 operations, the source buffer to write data from. 156 157 @retval EFI_SUCCESS The data was read from or written to the PCI controller. 158 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller. 159 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not 160 valid for the PCI BAR specified by BarIndex. 161 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 162 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 163 164 **/ 165 EFI_STATUS 166 EFIAPI 167 PciIoMemRead ( 168 IN EFI_PCI_IO_PROTOCOL *This, 169 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 170 IN UINT8 BarIndex, 171 IN UINT64 Offset, 172 IN UINTN Count, 173 IN OUT VOID *Buffer 174 ); 175 176 /** 177 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space. 178 179 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 180 @param Width Signifies the width of the memory or I/O operations. 181 @param BarIndex The BAR index of the standard PCI Configuration header to use as the 182 base address for the memory or I/O operation to perform. 183 @param Offset The offset within the selected BAR to start the memory or I/O operation. 184 @param Count The number of memory or I/O operations to perform. 185 @param Buffer For read operations, the destination buffer to store the results. For write 186 operations, the source buffer to write data from. 187 188 @retval EFI_SUCCESS The data was read from or written to the PCI controller. 189 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller. 190 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not 191 valid for the PCI BAR specified by BarIndex. 192 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 193 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 194 195 **/ 196 EFI_STATUS 197 EFIAPI 198 PciIoMemWrite ( 199 IN EFI_PCI_IO_PROTOCOL *This, 200 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 201 IN UINT8 BarIndex, 202 IN UINT64 Offset, 203 IN UINTN Count, 204 IN OUT VOID *Buffer 205 ); 206 207 /** 208 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space. 209 210 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 211 @param Width Signifies the width of the memory or I/O operations. 212 @param BarIndex The BAR index of the standard PCI Configuration header to use as the 213 base address for the memory or I/O operation to perform. 214 @param Offset The offset within the selected BAR to start the memory or I/O operation. 215 @param Count The number of memory or I/O operations to perform. 216 @param Buffer For read operations, the destination buffer to store the results. For write 217 operations, the source buffer to write data from. 218 219 @retval EFI_SUCCESS The data was read from or written to the PCI controller. 220 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller. 221 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not 222 valid for the PCI BAR specified by BarIndex. 223 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 224 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 225 226 **/ 227 EFI_STATUS 228 EFIAPI 229 PciIoIoRead ( 230 IN EFI_PCI_IO_PROTOCOL *This, 231 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 232 IN UINT8 BarIndex, 233 IN UINT64 Offset, 234 IN UINTN Count, 235 IN OUT VOID *Buffer 236 ); 237 238 /** 239 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space. 240 241 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 242 @param Width Signifies the width of the memory or I/O operations. 243 @param BarIndex The BAR index of the standard PCI Configuration header to use as the 244 base address for the memory or I/O operation to perform. 245 @param Offset The offset within the selected BAR to start the memory or I/O operation. 246 @param Count The number of memory or I/O operations to perform. 247 @param Buffer For read operations, the destination buffer to store the results. For write 248 operations, the source buffer to write data from. 249 250 @retval EFI_SUCCESS The data was read from or written to the PCI controller. 251 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller. 252 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not 253 valid for the PCI BAR specified by BarIndex. 254 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 255 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 256 257 **/ 258 EFI_STATUS 259 EFIAPI 260 PciIoIoWrite ( 261 IN EFI_PCI_IO_PROTOCOL *This, 262 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 263 IN UINT8 BarIndex, 264 IN UINT64 Offset, 265 IN UINTN Count, 266 IN OUT VOID *Buffer 267 ); 268 269 /** 270 Enable a PCI driver to access PCI controller registers in PCI configuration space. 271 272 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 273 @param Width Signifies the width of the memory operations. 274 @param Offset The offset within the PCI configuration space for the PCI controller. 275 @param Count The number of PCI configuration operations to perform. 276 @param Buffer For read operations, the destination buffer to store the results. For write 277 operations, the source buffer to write data from. 278 279 280 @retval EFI_SUCCESS The data was read from or written to the PCI controller. 281 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not 282 valid for the PCI configuration header of the PCI controller. 283 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 284 @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid. 285 286 **/ 287 EFI_STATUS 288 EFIAPI 289 PciIoConfigRead ( 290 IN EFI_PCI_IO_PROTOCOL *This, 291 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 292 IN UINT32 Offset, 293 IN UINTN Count, 294 IN OUT VOID *Buffer 295 ); 296 297 /** 298 Enable a PCI driver to access PCI controller registers in PCI configuration space. 299 300 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 301 @param Width Signifies the width of the memory operations. 302 @param Offset The offset within the PCI configuration space for the PCI controller. 303 @param Count The number of PCI configuration operations to perform. 304 @param Buffer For read operations, the destination buffer to store the results. For write 305 operations, the source buffer to write data from. 306 307 308 @retval EFI_SUCCESS The data was read from or written to the PCI controller. 309 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not 310 valid for the PCI configuration header of the PCI controller. 311 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 312 @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid. 313 314 **/ 315 EFI_STATUS 316 EFIAPI 317 PciIoConfigWrite ( 318 IN EFI_PCI_IO_PROTOCOL *This, 319 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 320 IN UINT32 Offset, 321 IN UINTN Count, 322 IN OUT VOID *Buffer 323 ); 324 325 /** 326 Enables a PCI driver to copy one region of PCI memory space to another region of PCI 327 memory space. 328 329 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 330 @param Width Signifies the width of the memory operations. 331 @param DestBarIndex The BAR index in the standard PCI Configuration header to use as the 332 base address for the memory operation to perform. 333 @param DestOffset The destination offset within the BAR specified by DestBarIndex to 334 start the memory writes for the copy operation. 335 @param SrcBarIndex The BAR index in the standard PCI Configuration header to use as the 336 base address for the memory operation to perform. 337 @param SrcOffset The source offset within the BAR specified by SrcBarIndex to start 338 the memory reads for the copy operation. 339 @param Count The number of memory operations to perform. Bytes moved is Width 340 size * Count, starting at DestOffset and SrcOffset. 341 342 @retval EFI_SUCCESS The data was copied from one memory region to another memory region. 343 @retval EFI_UNSUPPORTED DestBarIndex not valid for this PCI controller. 344 @retval EFI_UNSUPPORTED SrcBarIndex not valid for this PCI controller. 345 @retval EFI_UNSUPPORTED The address range specified by DestOffset, Width, and Count 346 is not valid for the PCI BAR specified by DestBarIndex. 347 @retval EFI_UNSUPPORTED The address range specified by SrcOffset, Width, and Count is 348 not valid for the PCI BAR specified by SrcBarIndex. 349 @retval EFI_INVALID_PARAMETER Width is invalid. 350 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 351 352 **/ 353 EFI_STATUS 354 EFIAPI 355 PciIoCopyMem ( 356 IN EFI_PCI_IO_PROTOCOL *This, 357 IN EFI_PCI_IO_PROTOCOL_WIDTH Width, 358 IN UINT8 DestBarIndex, 359 IN UINT64 DestOffset, 360 IN UINT8 SrcBarIndex, 361 IN UINT64 SrcOffset, 362 IN UINTN Count 363 ); 364 365 /** 366 Provides the PCI controller-specific addresses needed to access system memory. 367 368 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 369 @param Operation Indicates if the bus master is going to read or write to system memory. 370 @param HostAddress The system memory address to map to the PCI controller. 371 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes 372 that were mapped. 373 @param DeviceAddress The resulting map address for the bus master PCI controller to use to 374 access the hosts HostAddress. 375 @param Mapping A resulting value to pass to Unmap(). 376 377 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes. 378 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer. 379 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 380 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 381 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address. 382 383 **/ 384 EFI_STATUS 385 EFIAPI 386 PciIoMap ( 387 IN EFI_PCI_IO_PROTOCOL *This, 388 IN EFI_PCI_IO_PROTOCOL_OPERATION Operation, 389 IN VOID *HostAddress, 390 IN OUT UINTN *NumberOfBytes, 391 OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, 392 OUT VOID **Mapping 393 ); 394 395 /** 396 Completes the Map() operation and releases any corresponding resources. 397 398 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 399 @param Mapping The mapping value returned from Map(). 400 401 @retval EFI_SUCCESS The range was unmapped. 402 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory. 403 404 **/ 405 EFI_STATUS 406 EFIAPI 407 PciIoUnmap ( 408 IN EFI_PCI_IO_PROTOCOL *This, 409 IN VOID *Mapping 410 ); 411 412 /** 413 Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer 414 mapping. 415 416 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 417 @param Type This parameter is not used and must be ignored. 418 @param MemoryType The type of memory to allocate, EfiBootServicesData or 419 EfiRuntimeServicesData. 420 @param Pages The number of pages to allocate. 421 @param HostAddress A pointer to store the base system memory address of the 422 allocated range. 423 @param Attributes The requested bit mask of attributes for the allocated range. 424 425 @retval EFI_SUCCESS The requested memory pages were allocated. 426 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are 427 MEMORY_WRITE_COMBINE and MEMORY_CACHED. 428 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 429 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. 430 431 **/ 432 EFI_STATUS 433 EFIAPI 434 PciIoAllocateBuffer ( 435 IN EFI_PCI_IO_PROTOCOL *This, 436 IN EFI_ALLOCATE_TYPE Type, 437 IN EFI_MEMORY_TYPE MemoryType, 438 IN UINTN Pages, 439 OUT VOID **HostAddress, 440 IN UINT64 Attributes 441 ); 442 443 /** 444 Frees memory that was allocated with AllocateBuffer(). 445 446 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 447 @param Pages The number of pages to free. 448 @param HostAddress The base system memory address of the allocated range. 449 450 @retval EFI_SUCCESS The requested memory pages were freed. 451 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages 452 was not allocated with AllocateBuffer(). 453 454 **/ 455 EFI_STATUS 456 EFIAPI 457 PciIoFreeBuffer ( 458 IN EFI_PCI_IO_PROTOCOL *This, 459 IN UINTN Pages, 460 IN VOID *HostAddress 461 ); 462 463 /** 464 Flushes all PCI posted write transactions from a PCI host bridge to system memory. 465 466 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 467 468 @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host 469 bridge to system memory. 470 @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI 471 host bridge due to a hardware error. 472 473 **/ 474 EFI_STATUS 475 EFIAPI 476 PciIoFlush ( 477 IN EFI_PCI_IO_PROTOCOL *This 478 ); 479 480 /** 481 Retrieves this PCI controller's current PCI bus number, device number, and function number. 482 483 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 484 @param SegmentNumber The PCI controller's current PCI segment number. 485 @param BusNumber The PCI controller's current PCI bus number. 486 @param DeviceNumber The PCI controller's current PCI device number. 487 @param FunctionNumber The PCI controller's current PCI function number. 488 489 @retval EFI_SUCCESS The PCI controller location was returned. 490 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 491 492 **/ 493 EFI_STATUS 494 EFIAPI 495 PciIoGetLocation ( 496 IN EFI_PCI_IO_PROTOCOL *This, 497 OUT UINTN *Segment, 498 OUT UINTN *Bus, 499 OUT UINTN *Device, 500 OUT UINTN *Function 501 ); 502 503 /** 504 Check BAR type for PCI resource. 505 506 @param PciIoDevice PCI device instance. 507 @param BarIndex The BAR index of the standard PCI Configuration header to use as the 508 base address for the memory or I/O operation to perform. 509 @param BarType Memory or I/O. 510 511 @retval TRUE Pci device's bar type is same with input BarType. 512 @retval TRUE Pci device's bar type is not same with input BarType. 513 514 **/ 515 BOOLEAN 516 CheckBarType ( 517 IN PCI_IO_DEVICE *PciIoDevice, 518 IN UINT8 BarIndex, 519 IN PCI_BAR_TYPE BarType 520 ); 521 522 /** 523 Set/Disable new attributes to a Root Bridge. 524 525 @param PciIoDevice Pci device instance. 526 @param Attributes New attribute want to be set. 527 @param Operation Set or Disable. 528 529 @retval EFI_UNSUPPORTED If root bridge does not support change attribute. 530 @retval EFI_SUCCESS Successfully set new attributs. 531 532 **/ 533 EFI_STATUS 534 ModifyRootBridgeAttributes ( 535 IN PCI_IO_DEVICE *PciIoDevice, 536 IN UINT64 Attributes, 537 IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation 538 ); 539 540 /** 541 Check whether this device can be enable/disable to snoop. 542 543 @param PciIoDevice Pci device instance. 544 @param Operation Enable/Disable. 545 546 @retval EFI_UNSUPPORTED Pci device is not GFX device or not support snoop. 547 @retval EFI_SUCCESS Snoop can be supported. 548 549 **/ 550 EFI_STATUS 551 SupportPaletteSnoopAttributes ( 552 IN PCI_IO_DEVICE *PciIoDevice, 553 IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation 554 ); 555 556 /** 557 Performs an operation on the attributes that this PCI controller supports. The operations include 558 getting the set of supported attributes, retrieving the current attributes, setting the current 559 attributes, enabling attributes, and disabling attributes. 560 561 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 562 @param Operation The operation to perform on the attributes for this PCI controller. 563 @param Attributes The mask of attributes that are used for Set, Enable, and Disable 564 operations. 565 @param Result A pointer to the result mask of attributes that are returned for the Get 566 and Supported operations. 567 568 @retval EFI_SUCCESS The operation on the PCI controller's attributes was completed. 569 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 570 @retval EFI_UNSUPPORTED one or more of the bits set in 571 Attributes are not supported by this PCI controller or one of 572 its parent bridges when Operation is Set, Enable or Disable. 573 574 **/ 575 EFI_STATUS 576 EFIAPI 577 PciIoAttributes ( 578 IN EFI_PCI_IO_PROTOCOL * This, 579 IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation, 580 IN UINT64 Attributes, 581 OUT UINT64 *Result OPTIONAL 582 ); 583 584 /** 585 Gets the attributes that this PCI controller supports setting on a BAR using 586 SetBarAttributes(), and retrieves the list of resource descriptors for a BAR. 587 588 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 589 @param BarIndex The BAR index of the standard PCI Configuration header to use as the 590 base address for resource range. The legal range for this field is 0..5. 591 @param Supports A pointer to the mask of attributes that this PCI controller supports 592 setting for this BAR with SetBarAttributes(). 593 @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current 594 configuration of this BAR of the PCI controller. 595 596 @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI 597 controller supports are returned in Supports. If Resources 598 is not NULL, then the ACPI 2.0 resource descriptors that the PCI 599 controller is currently using are returned in Resources. 600 @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL. 601 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller. 602 @retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate 603 Resources. 604 605 **/ 606 EFI_STATUS 607 EFIAPI 608 PciIoGetBarAttributes ( 609 IN EFI_PCI_IO_PROTOCOL * This, 610 IN UINT8 BarIndex, 611 OUT UINT64 *Supports, OPTIONAL 612 OUT VOID **Resources OPTIONAL 613 ); 614 615 /** 616 Sets the attributes for a range of a BAR on a PCI controller. 617 618 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance. 619 @param Attributes The mask of attributes to set for the resource range specified by 620 BarIndex, Offset, and Length. 621 @param BarIndex The BAR index of the standard PCI Configuration header to use as the 622 base address for resource range. The legal range for this field is 0..5. 623 @param Offset A pointer to the BAR relative base address of the resource range to be 624 modified by the attributes specified by Attributes. 625 @param Length A pointer to the length of the resource range to be modified by the 626 attributes specified by Attributes. 627 628 @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource 629 range specified by BarIndex, Offset, and Length were 630 set on the PCI controller, and the actual resource range is returned 631 in Offset and Length. 632 @retval EFI_INVALID_PARAMETER Offset or Length is NULL. 633 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller. 634 @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the 635 resource range specified by BarIndex, Offset, and 636 Length. 637 638 **/ 639 EFI_STATUS 640 EFIAPI 641 PciIoSetBarAttributes ( 642 IN EFI_PCI_IO_PROTOCOL *This, 643 IN UINT64 Attributes, 644 IN UINT8 BarIndex, 645 IN OUT UINT64 *Offset, 646 IN OUT UINT64 *Length 647 ); 648 649 /** 650 Program parent bridge's attribute recurrently. 651 652 @param PciIoDevice Child Pci device instance 653 @param Operation The operation to perform on the attributes for this PCI controller. 654 @param Attributes The mask of attributes that are used for Set, Enable, and Disable 655 operations. 656 657 @retval EFI_SUCCESS The operation on the PCI controller's attributes was completed. 658 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 659 @retval EFI_UNSUPPORTED one or more of the bits set in 660 Attributes are not supported by this PCI controller or one of 661 its parent bridges when Operation is Set, Enable or Disable. 662 663 **/ 664 EFI_STATUS 665 UpStreamBridgesAttributes ( 666 IN PCI_IO_DEVICE *PciIoDevice, 667 IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation, 668 IN UINT64 Attributes 669 ); 670 671 /** 672 Test whether two Pci devices has same parent bridge. 673 674 @param PciDevice1 The first pci device for testing. 675 @param PciDevice2 The second pci device for testing. 676 677 @retval TRUE Two Pci device has the same parent bridge. 678 @retval FALSE Two Pci device has not the same parent bridge. 679 680 **/ 681 BOOLEAN 682 PciDevicesOnTheSamePath ( 683 IN PCI_IO_DEVICE *PciDevice1, 684 IN PCI_IO_DEVICE *PciDevice2 685 ); 686 687 #endif 688