1 /** @file 2 PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification. 3 4 PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O, 5 and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform 6 defferent types of bus mastering DMA. 7 8 Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR> 9 This program and the accompanying materials 10 are licensed and made available under the terms and conditions of the BSD License 11 which accompanies this distribution. The full text of the license may be found at 12 http://opensource.org/licenses/bsd-license.php 13 14 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 15 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 16 17 **/ 18 19 #ifndef __PCI_ROOT_BRIDGE_IO_H__ 20 #define __PCI_ROOT_BRIDGE_IO_H__ 21 22 #include <Library/BaseLib.h> 23 24 #define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \ 25 { \ 26 0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \ 27 } 28 29 typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL; 30 31 /// 32 /// ******************************************************* 33 /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH 34 /// ******************************************************* 35 /// 36 typedef enum { 37 EfiPciWidthUint8, 38 EfiPciWidthUint16, 39 EfiPciWidthUint32, 40 EfiPciWidthUint64, 41 EfiPciWidthFifoUint8, 42 EfiPciWidthFifoUint16, 43 EfiPciWidthFifoUint32, 44 EfiPciWidthFifoUint64, 45 EfiPciWidthFillUint8, 46 EfiPciWidthFillUint16, 47 EfiPciWidthFillUint32, 48 EfiPciWidthFillUint64, 49 EfiPciWidthMaximum 50 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH; 51 52 /// 53 /// ******************************************************* 54 /// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION 55 /// ******************************************************* 56 /// 57 typedef enum { 58 /// 59 /// A read operation from system memory by a bus master that is not capable of producing 60 /// PCI dual address cycles. 61 /// 62 EfiPciOperationBusMasterRead, 63 /// 64 /// A write operation from system memory by a bus master that is not capable of producing 65 /// PCI dual address cycles. 66 /// 67 EfiPciOperationBusMasterWrite, 68 /// 69 /// Provides both read and write access to system memory by both the processor and a bus 70 /// master that is not capable of producing PCI dual address cycles. 71 /// 72 EfiPciOperationBusMasterCommonBuffer, 73 /// 74 /// A read operation from system memory by a bus master that is capable of producing PCI 75 /// dual address cycles. 76 /// 77 EfiPciOperationBusMasterRead64, 78 /// 79 /// A write operation to system memory by a bus master that is capable of producing PCI 80 /// dual address cycles. 81 /// 82 EfiPciOperationBusMasterWrite64, 83 /// 84 /// Provides both read and write access to system memory by both the processor and a bus 85 /// master that is capable of producing PCI dual address cycles. 86 /// 87 EfiPciOperationBusMasterCommonBuffer64, 88 EfiPciOperationMaximum 89 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION; 90 91 #define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 92 #define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002 93 #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004 94 #define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008 95 #define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010 96 #define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 97 #define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 98 #define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 99 #define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800 100 #define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000 101 #define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 102 #define EFI_PCI_ATTRIBUTE_ISA_IO_16 0x10000 103 #define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 104 #define EFI_PCI_ATTRIBUTE_VGA_IO_16 0x40000 105 106 #define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE) 107 108 #define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER) 109 110 #define EFI_PCI_ADDRESS(bus, dev, func, reg) \ 111 (UINT64) ( \ 112 (((UINTN) bus) << 24) | \ 113 (((UINTN) dev) << 16) | \ 114 (((UINTN) func) << 8) | \ 115 (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32)))) 116 117 typedef struct { 118 UINT8 Register; 119 UINT8 Function; 120 UINT8 Device; 121 UINT8 Bus; 122 UINT32 ExtendedRegister; 123 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS; 124 125 /** 126 Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is 127 satisfied or after a defined duration. 128 129 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 130 @param Width Signifies the width of the memory or I/O operations. 131 @param Address The base address of the memory or I/O operations. 132 @param Mask Mask used for the polling criteria. 133 @param Value The comparison value used for the polling exit criteria. 134 @param Delay The number of 100 ns units to poll. 135 @param Result Pointer to the last value read from the memory location. 136 137 @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria. 138 @retval EFI_TIMEOUT Delay expired before a match occurred. 139 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 140 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 141 142 **/ 143 typedef 144 EFI_STATUS 145 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM)( 146 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 147 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, 148 IN UINT64 Address, 149 IN UINT64 Mask, 150 IN UINT64 Value, 151 IN UINT64 Delay, 152 OUT UINT64 *Result 153 ); 154 155 /** 156 Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space. 157 158 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 159 @param Width Signifies the width of the memory operations. 160 @param Address The base address of the memory operations. 161 @param Count The number of memory operations to perform. 162 @param Buffer For read operations, the destination buffer to store the results. For write 163 operations, the source buffer to write data from. 164 165 @retval EFI_SUCCESS The data was read from or written to the PCI root bridge. 166 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 167 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 168 169 **/ 170 typedef 171 EFI_STATUS 172 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM)( 173 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 174 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, 175 IN UINT64 Address, 176 IN UINTN Count, 177 IN OUT VOID *Buffer 178 ); 179 180 typedef struct { 181 /// 182 /// Read PCI controller registers in the PCI root bridge memory space. 183 /// 184 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read; 185 /// 186 /// Write PCI controller registers in the PCI root bridge memory space. 187 /// 188 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write; 189 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS; 190 191 /** 192 Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI 193 root bridge memory space. 194 195 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance. 196 @param Width Signifies the width of the memory operations. 197 @param DestAddress The destination address of the memory operation. 198 @param SrcAddress The source address of the memory operation. 199 @param Count The number of memory operations to perform. 200 201 @retval EFI_SUCCESS The data was copied from one memory region to another memory region. 202 @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge. 203 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 204 205 **/ 206 typedef 207 EFI_STATUS 208 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM)( 209 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 210 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width, 211 IN UINT64 DestAddress, 212 IN UINT64 SrcAddress, 213 IN UINTN Count 214 ); 215 216 /** 217 Provides the PCI controller-specific addresses required to access system memory from a 218 DMA bus master. 219 220 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 221 @param Operation Indicates if the bus master is going to read or write to system memory. 222 @param HostAddress The system memory address to map to the PCI controller. 223 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes 224 that were mapped. 225 @param DeviceAddress The resulting map address for the bus master PCI controller to use to 226 access the hosts HostAddress. 227 @param Mapping A resulting value to pass to Unmap(). 228 229 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes. 230 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer. 231 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 232 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. 233 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address. 234 235 **/ 236 typedef 237 EFI_STATUS 238 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP)( 239 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 240 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation, 241 IN VOID *HostAddress, 242 IN OUT UINTN *NumberOfBytes, 243 OUT EFI_PHYSICAL_ADDRESS *DeviceAddress, 244 OUT VOID **Mapping 245 ); 246 247 /** 248 Completes the Map() operation and releases any corresponding resources. 249 250 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 251 @param Mapping The mapping value returned from Map(). 252 253 @retval EFI_SUCCESS The range was unmapped. 254 @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map(). 255 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory. 256 257 **/ 258 typedef 259 EFI_STATUS 260 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP)( 261 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 262 IN VOID *Mapping 263 ); 264 265 /** 266 Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or 267 EfiPciOperationBusMasterCommonBuffer64 mapping. 268 269 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 270 @param Type This parameter is not used and must be ignored. 271 @param MemoryType The type of memory to allocate, EfiBootServicesData or 272 EfiRuntimeServicesData. 273 @param Pages The number of pages to allocate. 274 @param HostAddress A pointer to store the base system memory address of the 275 allocated range. 276 @param Attributes The requested bit mask of attributes for the allocated range. 277 278 @retval EFI_SUCCESS The requested memory pages were allocated. 279 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are 280 MEMORY_WRITE_COMBINE and MEMORY_CACHED. 281 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 282 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. 283 284 **/ 285 typedef 286 EFI_STATUS 287 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER)( 288 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 289 IN EFI_ALLOCATE_TYPE Type, 290 IN EFI_MEMORY_TYPE MemoryType, 291 IN UINTN Pages, 292 IN OUT VOID **HostAddress, 293 IN UINT64 Attributes 294 ); 295 296 /** 297 Frees memory that was allocated with AllocateBuffer(). 298 299 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 300 @param Pages The number of pages to free. 301 @param HostAddress The base system memory address of the allocated range. 302 303 @retval EFI_SUCCESS The requested memory pages were freed. 304 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages 305 was not allocated with AllocateBuffer(). 306 307 **/ 308 typedef 309 EFI_STATUS 310 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER)( 311 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 312 IN UINTN Pages, 313 IN VOID *HostAddress 314 ); 315 316 /** 317 Flushes all PCI posted write transactions from a PCI host bridge to system memory. 318 319 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 320 321 @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host 322 bridge to system memory. 323 @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI 324 host bridge due to a hardware error. 325 326 **/ 327 typedef 328 EFI_STATUS 329 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH)( 330 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This 331 ); 332 333 /** 334 Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the 335 attributes that a PCI root bridge is currently using. 336 337 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 338 @param Supports A pointer to the mask of attributes that this PCI root bridge supports 339 setting with SetAttributes(). 340 @param Attributes A pointer to the mask of attributes that this PCI root bridge is currently 341 using. 342 343 @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root 344 bridge supports is returned in Supports. If Attributes is 345 not NULL, then the attributes that the PCI root bridge is currently 346 using is returned in Attributes. 347 @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL. 348 349 350 **/ 351 typedef 352 EFI_STATUS 353 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES)( 354 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 355 OUT UINT64 *Supports, 356 OUT UINT64 *Attributes 357 ); 358 359 /** 360 Sets attributes for a resource range on a PCI root bridge. 361 362 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 363 @param Attributes The mask of attributes to set. 364 @param ResourceBase A pointer to the base address of the resource range to be modified by the 365 attributes specified by Attributes. 366 @param ResourceLength A pointer to the length of the resource range to be modified by the 367 attributes specified by Attributes. 368 369 @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource 370 range specified by ResourceBase and ResourceLength 371 were set on the PCI root bridge, and the actual resource range is 372 returned in ResuourceBase and ResourceLength. 373 @retval EFI_UNSUPPORTED A bit is set in Attributes that is not supported by the PCI Root 374 Bridge. 375 @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the 376 resource range specified by BaseAddress and Length. 377 @retval EFI_INVALID_PARAMETER One or more parameters are invalid. 378 379 **/ 380 typedef 381 EFI_STATUS 382 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES)( 383 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 384 IN UINT64 Attributes, 385 IN OUT UINT64 *ResourceBase, 386 IN OUT UINT64 *ResourceLength 387 ); 388 389 /** 390 Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 2.0 391 resource descriptors. 392 393 @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL. 394 @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current 395 configuration of this PCI root bridge. 396 397 @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in 398 Resources. 399 @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be 400 retrieved. 401 402 **/ 403 typedef 404 EFI_STATUS 405 (EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION)( 406 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This, 407 OUT VOID **Resources 408 ); 409 410 /// 411 /// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are 412 /// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller. 413 /// 414 struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL { 415 /// 416 /// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member. 417 /// 418 EFI_HANDLE ParentHandle; 419 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem; 420 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo; 421 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem; 422 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io; 423 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci; 424 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem; 425 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map; 426 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap; 427 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer; 428 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer; 429 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush; 430 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes; 431 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes; 432 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration; 433 434 /// 435 /// The segment number that this PCI root bridge resides. 436 /// 437 UINT32 SegmentNumber; 438 }; 439 440 extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid; 441 442 #endif 443