1 /** @file 2 This file contains the descriptor definination of OHCI spec 3 4 Copyright (c) 2013-2015 Intel Corporation. 5 6 This program and the accompanying materials 7 are licensed and made available under the terms and conditions of the BSD License 8 which accompanies this distribution. The full text of the license may be found at 9 http://opensource.org/licenses/bsd-license.php 10 11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 14 **/ 15 16 17 18 #ifndef _DESCRIPTOR_H 19 #define _DESCRIPTOR_H 20 21 #define ED_FUNC_ADD 0x0001 22 #define ED_ENDPT_NUM 0x0002 23 #define ED_DIR 0x0004 24 #define ED_SPEED 0x0008 25 #define ED_SKIP 0x0010 26 #define ED_FORMAT 0x0020 27 #define ED_MAX_PACKET 0x0040 28 #define ED_TDTAIL_PTR 0x0080 29 #define ED_HALTED 0x0100 30 #define ED_DTTOGGLE 0x0200 31 #define ED_TDHEAD_PTR 0x0400 32 #define ED_NEXT_EDPTR 0x0800 33 #define ED_PDATA 0x1000 34 #define ED_ZERO 0x2000 35 36 #define TD_BUFFER_ROUND 0x0001 37 #define TD_DIR_PID 0x0002 38 #define TD_DELAY_INT 0x0004 39 #define TD_DT_TOGGLE 0x0008 40 #define TD_ERROR_CNT 0x0010 41 #define TD_COND_CODE 0x0020 42 #define TD_CURR_BUFFER_PTR 0x0040 43 #define TD_NEXT_PTR 0x0080 44 #define TD_BUFFER_END_PTR 0x0100 45 #define TD_PDATA 0x0200 46 47 #define ED_FROM_TD_DIR 0x0 48 #define ED_OUT_DIR 0x1 49 #define ED_IN_DIR 0x2 50 #define ED_FROM_TD_ALSO_DIR 0x3 51 52 #define TD_SETUP_PID 0x00 53 #define TD_OUT_PID 0x01 54 #define TD_IN_PID 0x02 55 #define TD_NODATA_PID 0x03 56 57 #define HI_SPEED 0 58 #define LO_SPEED 1 59 60 #define TD_NO_ERROR 0x00 61 #define TD_CRC_ERROR 0x01 62 #define TD_BITSTUFFING_ERROR 0x02 63 #define TD_TOGGLE_ERROR 0x03 64 #define TD_DEVICE_STALL 0x04 65 #define TD_NO_RESPONSE 0x05 66 #define TD_PIDCHK_FAIL 0x06 67 #define TD_PID_UNEXPECTED 0x07 68 #define TD_DATA_OVERRUN 0x08 69 #define TD_DATA_UNDERRUN 0x09 70 #define TD_BUFFER_OVERRUN 0x0C 71 #define TD_BUFFER_UNDERRUN 0x0D 72 #define TD_TOBE_PROCESSED 0x0E 73 #define TD_TOBE_PROCESSED_2 0x0F 74 75 #define TD_NO_DELAY 0x7 76 77 #define TD_INT 0x1 78 #define TD_CTL 0x2 79 #define TD_BLK 0x3 80 81 typedef struct { 82 UINT32 Reserved:18; 83 UINT32 BufferRounding:1; 84 UINT32 DirPID:2; 85 UINT32 DelayInterrupt:3; 86 UINT32 DataToggle:2; 87 UINT32 ErrorCount:2; 88 UINT32 ConditionCode:4; 89 } TD_DESCRIPTOR_WORD0; 90 91 typedef struct _TD_DESCRIPTOR { 92 TD_DESCRIPTOR_WORD0 Word0; 93 UINT32 CurrBufferPointer; // 32-bit Physical Address of buffer 94 UINT32 NextTD; // 32-bit Physical Address of TD_DESCRIPTOR 95 UINT32 BufferEndPointer; // 32-bit Physical Address of buffer 96 UINT32 NextTDPointer; // 32-bit Physical Address of TD_DESCRIPTOR 97 UINT32 DataBuffer; // 32-bit Physical Address of buffer 98 UINT32 ActualSendLength; 99 UINT32 Reserved; 100 } TD_DESCRIPTOR; 101 102 typedef struct { 103 UINT32 FunctionAddress:7; 104 UINT32 EndPointNum:4; 105 UINT32 Direction:2; 106 UINT32 Speed:1; 107 UINT32 Skip:1; 108 UINT32 Format:1; 109 UINT32 MaxPacketSize:11; 110 UINT32 FreeSpace:5; 111 } ED_DESCRIPTOR_WORD0; 112 113 typedef struct { 114 UINT32 Halted:1; 115 UINT32 ToggleCarry:1; 116 UINT32 Zero:2; 117 UINT32 TdHeadPointer:28; 118 } ED_DESCRIPTOR_WORD2; 119 120 typedef struct _ED_DESCRIPTOR { 121 ED_DESCRIPTOR_WORD0 Word0; 122 UINT32 TdTailPointer; // 32-bit Physical Address of TD_DESCRIPTOR 123 ED_DESCRIPTOR_WORD2 Word2; 124 UINT32 NextED; // 32-bit Physical Address of ED_DESCRIPTOR 125 } ED_DESCRIPTOR; 126 127 #define TD_PTR(p) ((TD_DESCRIPTOR *)(UINTN)((p) << 4)) 128 #define ED_PTR(p) ((ED_DESCRIPTOR *)(UINTN)((p) << 4)) 129 #define RIGHT_SHIFT_4(p) ((UINT32)(p) >> 4) 130 131 typedef enum { 132 CONTROL_LIST, 133 BULK_LIST, 134 INTERRUPT_LIST, 135 ISOCHRONOUS_LIST 136 } DESCRIPTOR_LIST_TYPE; 137 138 #endif 139