1 /* $NetBSD: atomic.h,v 1.5 2005/12/28 19:09:29 perry Exp $ */
2
3 /*
4 * Copyright (C) 1994-1997 Mark Brinicombe
5 * Copyright (C) 1994 Brini
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of Brini may not be used to endorse or promote products
22 * derived from this software without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR
25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
29 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
30 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
32 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
33 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35
36 #ifndef _ARM_ATOMIC_H_
37 #define _ARM_ATOMIC_H_
38
39 #ifndef ATOMIC_SET_BIT_NONINLINE_REQUIRED
40
41 #if defined(__PROG26) || defined(ATOMIC_SET_BIT_NOINLINE)
42 #define ATOMIC_SET_BIT_NONINLINE_REQUIRED
43 #endif
44
45 #endif /* ATOMIC_SET_BIT_NONINLINE_REQUIRED */
46
47
48 #ifndef _LOCORE
49
50 #include <sys/types.h>
51 #include <arm/armreg.h> /* I32_bit */
52
53 #ifdef ATOMIC_SET_BIT_NONINLINE_REQUIRED
54 void atomic_set_bit( u_int *, u_int );
55 void atomic_clear_bit( u_int *, u_int );
56 #endif
57
58 #ifdef __PROG32
59 #define __with_interrupts_disabled(expr) \
60 do { \
61 u_int cpsr_save, tmp; \
62 \
63 __asm volatile( \
64 "mrs %0, cpsr;" \
65 "orr %1, %0, %2;" \
66 "msr cpsr_all, %1;" \
67 : "=r" (cpsr_save), "=r" (tmp) \
68 : "I" (I32_bit) \
69 : "cc" ); \
70 (expr); \
71 __asm volatile( \
72 "msr cpsr_all, %0" \
73 : /* no output */ \
74 : "r" (cpsr_save) \
75 : "cc" ); \
76 } while(0)
77
78 static __inline void
inline_atomic_set_bit(u_int * address,u_int setmask)79 inline_atomic_set_bit( u_int *address, u_int setmask )
80 {
81 __with_interrupts_disabled( *address |= setmask );
82 }
83
84 static __inline void
inline_atomic_clear_bit(u_int * address,u_int clearmask)85 inline_atomic_clear_bit( u_int *address, u_int clearmask )
86 {
87 __with_interrupts_disabled( *address &= ~clearmask );
88 }
89
90 #if !defined(ATOMIC_SET_BIT_NOINLINE)
91
92 #define atomic_set_bit(a,m) inline_atomic_set_bit(a,m)
93 #define atomic_clear_bit(a,m) inline_atomic_clear_bit(a,m)
94
95 #endif
96
97 #endif /* __PROG32 */
98
99 #undef __with_interrupts_disabled
100
101 #endif /* _LOCORE */
102 #endif /* _ARM_ATOMIC_H_ */
103