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1 /******************************************************************************
2 *
3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 ******************************************************************************/
18 /**
19 *******************************************************************************
20 * @file
21 *  ihevcd_api.c
22 *
23 * @brief
24 *  Contains api functions definitions for HEVC decoder
25 *
26 * @author
27 *  Harish
28 *
29 * @par List of Functions:
30 * - api_check_struct_sanity()
31 * - ihevcd_get_version()
32 * - ihevcd_set_default_params()
33 * - ihevcd_init()
34 * - ihevcd_get_num_rec()
35 * - ihevcd_allocate_static_bufs()
36 * - ihevcd_create()
37 * - ihevcd_retrieve_memrec()
38 * - ihevcd_set_display_frame()
39 * - ihevcd_set_flush_mode()
40 * - ihevcd_get_status()
41 * - ihevcd_get_buf_info()
42 * - ihevcd_set_params()
43 * - ihevcd_reset()
44 * - ihevcd_rel_display_frame()
45 * - ihevcd_disable_deblk()
46 * - ihevcd_get_frame_dimensions()
47 * - ihevcd_set_num_cores()
48 * - ihevcd_ctl()
49 * - ihevcd_cxa_api_function()
50 *
51 * @remarks
52 *  None
53 *
54 *******************************************************************************
55 */
56 /*****************************************************************************/
57 /* File Includes                                                             */
58 /*****************************************************************************/
59 #include <stdio.h>
60 #include <stddef.h>
61 #include <stdlib.h>
62 #include <string.h>
63 
64 #include "ihevc_typedefs.h"
65 #include "iv.h"
66 #include "ivd.h"
67 #include "ihevcd_cxa.h"
68 #include "ithread.h"
69 
70 #include "ihevc_defs.h"
71 #include "ihevc_debug.h"
72 
73 #include "ihevc_structs.h"
74 #include "ihevc_macros.h"
75 #include "ihevc_platform_macros.h"
76 
77 #include "ihevc_buf_mgr.h"
78 #include "ihevc_dpb_mgr.h"
79 #include "ihevc_disp_mgr.h"
80 #include "ihevc_common_tables.h"
81 #include "ihevc_cabac_tables.h"
82 #include "ihevc_error.h"
83 
84 #include "ihevcd_defs.h"
85 #include "ihevcd_trace.h"
86 
87 #include "ihevcd_function_selector.h"
88 #include "ihevcd_structs.h"
89 #include "ihevcd_error.h"
90 #include "ihevcd_utils.h"
91 #include "ihevcd_decode.h"
92 #include "ihevcd_job_queue.h"
93 #include "ihevcd_statistics.h"
94 
95 
96 #define ALIGNED_FREE(ps_codec, y) \
97 if(y) {ps_codec->pf_aligned_free(ps_codec->pv_mem_ctxt, ((void *)y)); (y) = NULL;}
98 
99 /*****************************************************************************/
100 /* Function Prototypes                                                       */
101 /*****************************************************************************/
102 IV_API_CALL_STATUS_T ihevcd_get_version(CHAR *pc_version_string,
103                                         UWORD32 u4_version_buffer_size);
104 WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec);
105 
106 
107 /**
108 *******************************************************************************
109 *
110 * @brief
111 *  Used to test arguments for corresponding API call
112 *
113 * @par Description:
114 *  For each command the arguments are validated
115 *
116 * @param[in] ps_handle
117 *  Codec handle at API level
118 *
119 * @param[in] pv_api_ip
120 *  Pointer to input structure
121 *
122 * @param[out] pv_api_op
123 *  Pointer to output structure
124 *
125 * @returns  Status of error checking
126 *
127 * @remarks
128 *
129 *
130 *******************************************************************************
131 */
132 
api_check_struct_sanity(iv_obj_t * ps_handle,void * pv_api_ip,void * pv_api_op)133 static IV_API_CALL_STATUS_T api_check_struct_sanity(iv_obj_t *ps_handle,
134                                                     void *pv_api_ip,
135                                                     void *pv_api_op)
136 {
137     IVD_API_COMMAND_TYPE_T e_cmd;
138     UWORD32 *pu4_api_ip;
139     UWORD32 *pu4_api_op;
140     WORD32 i;
141 
142     if(NULL == pv_api_op)
143         return (IV_FAIL);
144 
145     if(NULL == pv_api_ip)
146         return (IV_FAIL);
147 
148     pu4_api_ip = (UWORD32 *)pv_api_ip;
149     pu4_api_op = (UWORD32 *)pv_api_op;
150     e_cmd = (IVD_API_COMMAND_TYPE_T)*(pu4_api_ip + 1);
151 
152     *(pu4_api_op + 1) = 0;
153     /* error checks on handle */
154     switch((WORD32)e_cmd)
155     {
156         case IVD_CMD_CREATE:
157             break;
158 
159         case IVD_CMD_REL_DISPLAY_FRAME:
160         case IVD_CMD_SET_DISPLAY_FRAME:
161         case IVD_CMD_GET_DISPLAY_FRAME:
162         case IVD_CMD_VIDEO_DECODE:
163         case IVD_CMD_DELETE:
164         case IVD_CMD_VIDEO_CTL:
165             if(ps_handle == NULL)
166             {
167                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
168                 *(pu4_api_op + 1) |= IVD_HANDLE_NULL;
169                 return IV_FAIL;
170             }
171 
172             if(ps_handle->u4_size != sizeof(iv_obj_t))
173             {
174                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
175                 *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT;
176                 return IV_FAIL;
177             }
178 
179 
180             if(ps_handle->pv_codec_handle == NULL)
181             {
182                 *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
183                 *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
184                 return IV_FAIL;
185             }
186             break;
187         default:
188             *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
189             *(pu4_api_op + 1) |= IVD_INVALID_API_CMD;
190             return IV_FAIL;
191     }
192 
193     switch((WORD32)e_cmd)
194     {
195         case IVD_CMD_CREATE:
196         {
197             ihevcd_cxa_create_ip_t *ps_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
198             ihevcd_cxa_create_op_t *ps_op = (ihevcd_cxa_create_op_t *)pv_api_op;
199 
200 
201             ps_op->s_ivd_create_op_t.u4_error_code = 0;
202 
203             if((ps_ip->s_ivd_create_ip_t.u4_size > sizeof(ihevcd_cxa_create_ip_t))
204                             || (ps_ip->s_ivd_create_ip_t.u4_size
205                                             < sizeof(ivd_create_ip_t)))
206             {
207                 ps_op->s_ivd_create_op_t.u4_error_code |= 1
208                                 << IVD_UNSUPPORTEDPARAM;
209                 ps_op->s_ivd_create_op_t.u4_error_code |=
210                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
211 
212                 return (IV_FAIL);
213             }
214 
215             if((ps_op->s_ivd_create_op_t.u4_size != sizeof(ihevcd_cxa_create_op_t))
216                             && (ps_op->s_ivd_create_op_t.u4_size
217                                             != sizeof(ivd_create_op_t)))
218             {
219                 ps_op->s_ivd_create_op_t.u4_error_code |= 1
220                                 << IVD_UNSUPPORTEDPARAM;
221                 ps_op->s_ivd_create_op_t.u4_error_code |=
222                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
223 
224                 return (IV_FAIL);
225             }
226 
227 
228             if((ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P)
229                             && (ps_ip->s_ivd_create_ip_t.e_output_format
230                                             != IV_YUV_422ILE)
231                             && (ps_ip->s_ivd_create_ip_t.e_output_format
232                                             != IV_RGB_565)
233                             && (ps_ip->s_ivd_create_ip_t.e_output_format
234                                             != IV_YUV_420SP_UV)
235                             && (ps_ip->s_ivd_create_ip_t.e_output_format
236                                             != IV_YUV_420SP_VU))
237             {
238                 ps_op->s_ivd_create_op_t.u4_error_code |= 1
239                                 << IVD_UNSUPPORTEDPARAM;
240                 ps_op->s_ivd_create_op_t.u4_error_code |=
241                                 IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED;
242 
243                 return (IV_FAIL);
244             }
245 
246         }
247             break;
248 
249         case IVD_CMD_GET_DISPLAY_FRAME:
250         {
251             ihevcd_cxa_get_display_frame_ip_t *ps_ip =
252                             (ihevcd_cxa_get_display_frame_ip_t *)pv_api_ip;
253             ihevcd_cxa_get_display_frame_op_t *ps_op =
254                             (ihevcd_cxa_get_display_frame_op_t *)pv_api_op;
255 
256             ps_op->s_ivd_get_display_frame_op_t.u4_error_code = 0;
257 
258             if((ps_ip->s_ivd_get_display_frame_ip_t.u4_size
259                             != sizeof(ihevcd_cxa_get_display_frame_ip_t))
260                             && (ps_ip->s_ivd_get_display_frame_ip_t.u4_size
261                                             != sizeof(ivd_get_display_frame_ip_t)))
262             {
263                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
264                                 << IVD_UNSUPPORTEDPARAM;
265                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
266                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
267                 return (IV_FAIL);
268             }
269 
270             if((ps_op->s_ivd_get_display_frame_op_t.u4_size
271                             != sizeof(ihevcd_cxa_get_display_frame_op_t))
272                             && (ps_op->s_ivd_get_display_frame_op_t.u4_size
273                                             != sizeof(ivd_get_display_frame_op_t)))
274             {
275                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
276                                 << IVD_UNSUPPORTEDPARAM;
277                 ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
278                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
279                 return (IV_FAIL);
280             }
281 
282         }
283             break;
284 
285         case IVD_CMD_REL_DISPLAY_FRAME:
286         {
287             ihevcd_cxa_rel_display_frame_ip_t *ps_ip =
288                             (ihevcd_cxa_rel_display_frame_ip_t *)pv_api_ip;
289             ihevcd_cxa_rel_display_frame_op_t *ps_op =
290                             (ihevcd_cxa_rel_display_frame_op_t *)pv_api_op;
291 
292             ps_op->s_ivd_rel_display_frame_op_t.u4_error_code = 0;
293 
294             if((ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
295                             != sizeof(ihevcd_cxa_rel_display_frame_ip_t))
296                             && (ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
297                                             != sizeof(ivd_rel_display_frame_ip_t)))
298             {
299                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
300                                 << IVD_UNSUPPORTEDPARAM;
301                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
302                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
303                 return (IV_FAIL);
304             }
305 
306             if((ps_op->s_ivd_rel_display_frame_op_t.u4_size
307                             != sizeof(ihevcd_cxa_rel_display_frame_op_t))
308                             && (ps_op->s_ivd_rel_display_frame_op_t.u4_size
309                                             != sizeof(ivd_rel_display_frame_op_t)))
310             {
311                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
312                                 << IVD_UNSUPPORTEDPARAM;
313                 ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
314                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
315                 return (IV_FAIL);
316             }
317 
318         }
319             break;
320 
321         case IVD_CMD_SET_DISPLAY_FRAME:
322         {
323             ihevcd_cxa_set_display_frame_ip_t *ps_ip =
324                             (ihevcd_cxa_set_display_frame_ip_t *)pv_api_ip;
325             ihevcd_cxa_set_display_frame_op_t *ps_op =
326                             (ihevcd_cxa_set_display_frame_op_t *)pv_api_op;
327             UWORD32 j;
328 
329             ps_op->s_ivd_set_display_frame_op_t.u4_error_code = 0;
330 
331             if((ps_ip->s_ivd_set_display_frame_ip_t.u4_size
332                             != sizeof(ihevcd_cxa_set_display_frame_ip_t))
333                             && (ps_ip->s_ivd_set_display_frame_ip_t.u4_size
334                                             != sizeof(ivd_set_display_frame_ip_t)))
335             {
336                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
337                                 << IVD_UNSUPPORTEDPARAM;
338                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
339                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
340                 return (IV_FAIL);
341             }
342 
343             if((ps_op->s_ivd_set_display_frame_op_t.u4_size
344                             != sizeof(ihevcd_cxa_set_display_frame_op_t))
345                             && (ps_op->s_ivd_set_display_frame_op_t.u4_size
346                                             != sizeof(ivd_set_display_frame_op_t)))
347             {
348                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
349                                 << IVD_UNSUPPORTEDPARAM;
350                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
351                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
352                 return (IV_FAIL);
353             }
354 
355             if(ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs == 0)
356             {
357                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
358                                 << IVD_UNSUPPORTEDPARAM;
359                 ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
360                                 IVD_DISP_FRM_ZERO_OP_BUFS;
361                 return IV_FAIL;
362             }
363 
364             for(j = 0; j < ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs;
365                             j++)
366             {
367                 if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs
368                                 == 0)
369                 {
370                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
371                                     << IVD_UNSUPPORTEDPARAM;
372                     ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
373                                     IVD_DISP_FRM_ZERO_OP_BUFS;
374                     return IV_FAIL;
375                 }
376 
377                 for(i = 0;
378                                 i
379                                                 < (WORD32)ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs;
380                                 i++)
381                 {
382                     if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].pu1_bufs[i]
383                                     == NULL)
384                     {
385                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
386                                         << IVD_UNSUPPORTEDPARAM;
387                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
388                                         IVD_DISP_FRM_OP_BUF_NULL;
389                         return IV_FAIL;
390                     }
391 
392                     if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_min_out_buf_size[i]
393                                     == 0)
394                     {
395                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
396                                         << IVD_UNSUPPORTEDPARAM;
397                         ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
398                                         IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
399                         return IV_FAIL;
400                     }
401                 }
402             }
403         }
404             break;
405 
406         case IVD_CMD_VIDEO_DECODE:
407         {
408             ihevcd_cxa_video_decode_ip_t *ps_ip =
409                             (ihevcd_cxa_video_decode_ip_t *)pv_api_ip;
410             ihevcd_cxa_video_decode_op_t *ps_op =
411                             (ihevcd_cxa_video_decode_op_t *)pv_api_op;
412 
413             DEBUG("The input bytes is: %d",
414                             ps_ip->s_ivd_video_decode_ip_t.u4_num_Bytes);
415             ps_op->s_ivd_video_decode_op_t.u4_error_code = 0;
416 
417             if(ps_ip->s_ivd_video_decode_ip_t.u4_size
418                             != sizeof(ihevcd_cxa_video_decode_ip_t)
419                             && ps_ip->s_ivd_video_decode_ip_t.u4_size
420                                             != offsetof(ivd_video_decode_ip_t,
421                                                         s_out_buffer))
422             {
423                 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
424                                 << IVD_UNSUPPORTEDPARAM;
425                 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
426                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
427                 return (IV_FAIL);
428             }
429 
430             if(ps_op->s_ivd_video_decode_op_t.u4_size
431                             != sizeof(ihevcd_cxa_video_decode_op_t)
432                             && ps_op->s_ivd_video_decode_op_t.u4_size
433                                             != offsetof(ivd_video_decode_op_t,
434                                                         u4_output_present))
435             {
436                 ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
437                                 << IVD_UNSUPPORTEDPARAM;
438                 ps_op->s_ivd_video_decode_op_t.u4_error_code |=
439                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
440                 return (IV_FAIL);
441             }
442 
443         }
444             break;
445 
446         case IVD_CMD_DELETE:
447         {
448             ihevcd_cxa_delete_ip_t *ps_ip =
449                             (ihevcd_cxa_delete_ip_t *)pv_api_ip;
450             ihevcd_cxa_delete_op_t *ps_op =
451                             (ihevcd_cxa_delete_op_t *)pv_api_op;
452 
453             ps_op->s_ivd_delete_op_t.u4_error_code = 0;
454 
455             if(ps_ip->s_ivd_delete_ip_t.u4_size
456                             != sizeof(ihevcd_cxa_delete_ip_t))
457             {
458                 ps_op->s_ivd_delete_op_t.u4_error_code |= 1
459                                 << IVD_UNSUPPORTEDPARAM;
460                 ps_op->s_ivd_delete_op_t.u4_error_code |=
461                                 IVD_IP_API_STRUCT_SIZE_INCORRECT;
462                 return (IV_FAIL);
463             }
464 
465             if(ps_op->s_ivd_delete_op_t.u4_size
466                             != sizeof(ihevcd_cxa_delete_op_t))
467             {
468                 ps_op->s_ivd_delete_op_t.u4_error_code |= 1
469                                 << IVD_UNSUPPORTEDPARAM;
470                 ps_op->s_ivd_delete_op_t.u4_error_code |=
471                                 IVD_OP_API_STRUCT_SIZE_INCORRECT;
472                 return (IV_FAIL);
473             }
474 
475         }
476             break;
477 
478         case IVD_CMD_VIDEO_CTL:
479         {
480             UWORD32 *pu4_ptr_cmd;
481             UWORD32 sub_command;
482 
483             pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
484             pu4_ptr_cmd += 2;
485             sub_command = *pu4_ptr_cmd;
486 
487             switch(sub_command)
488             {
489                 case IVD_CMD_CTL_SETPARAMS:
490                 {
491                     ihevcd_cxa_ctl_set_config_ip_t *ps_ip;
492                     ihevcd_cxa_ctl_set_config_op_t *ps_op;
493                     ps_ip = (ihevcd_cxa_ctl_set_config_ip_t *)pv_api_ip;
494                     ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
495 
496                     if(ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
497                                     != sizeof(ihevcd_cxa_ctl_set_config_ip_t))
498                     {
499                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
500                                         << IVD_UNSUPPORTEDPARAM;
501                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
502                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
503                         return IV_FAIL;
504                     }
505                 }
506                     //no break; is needed here
507                 case IVD_CMD_CTL_SETDEFAULT:
508                 {
509                     ihevcd_cxa_ctl_set_config_op_t *ps_op;
510                     ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
511                     if(ps_op->s_ivd_ctl_set_config_op_t.u4_size
512                                     != sizeof(ihevcd_cxa_ctl_set_config_op_t))
513                     {
514                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
515                                         << IVD_UNSUPPORTEDPARAM;
516                         ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
517                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
518                         return IV_FAIL;
519                     }
520                 }
521                     break;
522 
523                 case IVD_CMD_CTL_GETPARAMS:
524                 {
525                     ihevcd_cxa_ctl_getstatus_ip_t *ps_ip;
526                     ihevcd_cxa_ctl_getstatus_op_t *ps_op;
527 
528                     ps_ip = (ihevcd_cxa_ctl_getstatus_ip_t *)pv_api_ip;
529                     ps_op = (ihevcd_cxa_ctl_getstatus_op_t *)pv_api_op;
530                     if(ps_ip->s_ivd_ctl_getstatus_ip_t.u4_size
531                                     != sizeof(ihevcd_cxa_ctl_getstatus_ip_t))
532                     {
533                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
534                                         << IVD_UNSUPPORTEDPARAM;
535                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
536                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
537                         return IV_FAIL;
538                     }
539                     if((ps_op->s_ivd_ctl_getstatus_op_t.u4_size
540                                     != sizeof(ihevcd_cxa_ctl_getstatus_op_t)) &&
541                        (ps_op->s_ivd_ctl_getstatus_op_t.u4_size
542                                     != sizeof(ivd_ctl_getstatus_op_t)))
543                     {
544                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
545                                         << IVD_UNSUPPORTEDPARAM;
546                         ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
547                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
548                         return IV_FAIL;
549                     }
550                 }
551                     break;
552 
553                 case IVD_CMD_CTL_GETBUFINFO:
554                 {
555                     ihevcd_cxa_ctl_getbufinfo_ip_t *ps_ip;
556                     ihevcd_cxa_ctl_getbufinfo_op_t *ps_op;
557                     ps_ip = (ihevcd_cxa_ctl_getbufinfo_ip_t *)pv_api_ip;
558                     ps_op = (ihevcd_cxa_ctl_getbufinfo_op_t *)pv_api_op;
559 
560                     if(ps_ip->s_ivd_ctl_getbufinfo_ip_t.u4_size
561                                     != sizeof(ihevcd_cxa_ctl_getbufinfo_ip_t))
562                     {
563                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
564                                         << IVD_UNSUPPORTEDPARAM;
565                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
566                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
567                         return IV_FAIL;
568                     }
569                     if(ps_op->s_ivd_ctl_getbufinfo_op_t.u4_size
570                                     != sizeof(ihevcd_cxa_ctl_getbufinfo_op_t))
571                     {
572                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
573                                         << IVD_UNSUPPORTEDPARAM;
574                         ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
575                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
576                         return IV_FAIL;
577                     }
578                 }
579                     break;
580 
581                 case IVD_CMD_CTL_GETVERSION:
582                 {
583                     ihevcd_cxa_ctl_getversioninfo_ip_t *ps_ip;
584                     ihevcd_cxa_ctl_getversioninfo_op_t *ps_op;
585                     ps_ip = (ihevcd_cxa_ctl_getversioninfo_ip_t *)pv_api_ip;
586                     ps_op = (ihevcd_cxa_ctl_getversioninfo_op_t *)pv_api_op;
587                     if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_size
588                                     != sizeof(ihevcd_cxa_ctl_getversioninfo_ip_t))
589                     {
590                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
591                                         << IVD_UNSUPPORTEDPARAM;
592                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
593                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
594                         return IV_FAIL;
595                     }
596                     if(ps_op->s_ivd_ctl_getversioninfo_op_t.u4_size
597                                     != sizeof(ihevcd_cxa_ctl_getversioninfo_op_t))
598                     {
599                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
600                                         << IVD_UNSUPPORTEDPARAM;
601                         ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
602                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
603                         return IV_FAIL;
604                     }
605                 }
606                     break;
607 
608                 case IVD_CMD_CTL_FLUSH:
609                 {
610                     ihevcd_cxa_ctl_flush_ip_t *ps_ip;
611                     ihevcd_cxa_ctl_flush_op_t *ps_op;
612                     ps_ip = (ihevcd_cxa_ctl_flush_ip_t *)pv_api_ip;
613                     ps_op = (ihevcd_cxa_ctl_flush_op_t *)pv_api_op;
614                     if(ps_ip->s_ivd_ctl_flush_ip_t.u4_size
615                                     != sizeof(ihevcd_cxa_ctl_flush_ip_t))
616                     {
617                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
618                                         << IVD_UNSUPPORTEDPARAM;
619                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
620                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
621                         return IV_FAIL;
622                     }
623                     if(ps_op->s_ivd_ctl_flush_op_t.u4_size
624                                     != sizeof(ihevcd_cxa_ctl_flush_op_t))
625                     {
626                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
627                                         << IVD_UNSUPPORTEDPARAM;
628                         ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
629                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
630                         return IV_FAIL;
631                     }
632                 }
633                     break;
634 
635                 case IVD_CMD_CTL_RESET:
636                 {
637                     ihevcd_cxa_ctl_reset_ip_t *ps_ip;
638                     ihevcd_cxa_ctl_reset_op_t *ps_op;
639                     ps_ip = (ihevcd_cxa_ctl_reset_ip_t *)pv_api_ip;
640                     ps_op = (ihevcd_cxa_ctl_reset_op_t *)pv_api_op;
641                     if(ps_ip->s_ivd_ctl_reset_ip_t.u4_size
642                                     != sizeof(ihevcd_cxa_ctl_reset_ip_t))
643                     {
644                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
645                                         << IVD_UNSUPPORTEDPARAM;
646                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
647                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
648                         return IV_FAIL;
649                     }
650                     if(ps_op->s_ivd_ctl_reset_op_t.u4_size
651                                     != sizeof(ihevcd_cxa_ctl_reset_op_t))
652                     {
653                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
654                                         << IVD_UNSUPPORTEDPARAM;
655                         ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
656                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
657                         return IV_FAIL;
658                     }
659                 }
660                     break;
661                 case IHEVCD_CXA_CMD_CTL_DEGRADE:
662                 {
663                     ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
664                     ihevcd_cxa_ctl_degrade_op_t *ps_op;
665 
666                     ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
667                     ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
668 
669                     if(ps_ip->u4_size
670                                     != sizeof(ihevcd_cxa_ctl_degrade_ip_t))
671                     {
672                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
673                         ps_op->u4_error_code |=
674                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
675                         return IV_FAIL;
676                     }
677 
678                     if(ps_op->u4_size
679                                     != sizeof(ihevcd_cxa_ctl_degrade_op_t))
680                     {
681                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
682                         ps_op->u4_error_code |=
683                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
684                         return IV_FAIL;
685                     }
686 
687                     if((ps_ip->i4_degrade_pics < 0) ||
688                        (ps_ip->i4_degrade_pics > 4) ||
689                        (ps_ip->i4_nondegrade_interval < 0) ||
690                        (ps_ip->i4_degrade_type < 0) ||
691                        (ps_ip->i4_degrade_type > 15))
692                     {
693                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
694                         return IV_FAIL;
695                     }
696 
697                     break;
698                 }
699 
700                 case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
701                 {
702                     ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
703                     ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
704 
705                     ps_ip =
706                                     (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
707                     ps_op =
708                                     (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
709 
710                     if(ps_ip->u4_size
711                                     != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_ip_t))
712                     {
713                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
714                         ps_op->u4_error_code |=
715                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
716                         return IV_FAIL;
717                     }
718 
719                     if(ps_op->u4_size
720                                     != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_op_t))
721                     {
722                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
723                         ps_op->u4_error_code |=
724                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
725                         return IV_FAIL;
726                     }
727 
728                     break;
729                 }
730 
731                 case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
732                 {
733                     ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
734                     ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
735 
736                     ps_ip =
737                                     (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
738                     ps_op =
739                                     (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
740 
741                     if(ps_ip->u4_size
742                                     != sizeof(ihevcd_cxa_ctl_get_vui_params_ip_t))
743                     {
744                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
745                         ps_op->u4_error_code |=
746                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
747                         return IV_FAIL;
748                     }
749 
750                     if(ps_op->u4_size
751                                     != sizeof(ihevcd_cxa_ctl_get_vui_params_op_t))
752                     {
753                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
754                         ps_op->u4_error_code |=
755                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
756                         return IV_FAIL;
757                     }
758 
759                     break;
760                 }
761                 case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
762                 {
763                     ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
764                     ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
765 
766                     ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
767                     ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
768 
769                     if(ps_ip->u4_size
770                                     != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_ip_t))
771                     {
772                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
773                         ps_op->u4_error_code |=
774                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
775                         return IV_FAIL;
776                     }
777 
778                     if(ps_op->u4_size
779                                     != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_op_t))
780                     {
781                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
782                         ps_op->u4_error_code |=
783                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
784                         return IV_FAIL;
785                     }
786 
787                     break;
788                 }
789                 case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
790                 {
791                     ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
792                     ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
793 
794                     ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
795                     ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
796 
797                     if(ps_ip->u4_size
798                                     != sizeof(ihevcd_cxa_ctl_set_num_cores_ip_t))
799                     {
800                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
801                         ps_op->u4_error_code |=
802                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
803                         return IV_FAIL;
804                     }
805 
806                     if(ps_op->u4_size
807                                     != sizeof(ihevcd_cxa_ctl_set_num_cores_op_t))
808                     {
809                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
810                         ps_op->u4_error_code |=
811                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
812                         return IV_FAIL;
813                     }
814 
815 #ifdef MULTICORE
816                     if((ps_ip->u4_num_cores < 1) || (ps_ip->u4_num_cores > MAX_NUM_CORES))
817 #else
818                     if(ps_ip->u4_num_cores != 1)
819 #endif
820                         {
821                             ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
822                             return IV_FAIL;
823                         }
824                     break;
825                 }
826                 case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
827                 {
828                     ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
829                     ihevcd_cxa_ctl_set_processor_op_t *ps_op;
830 
831                     ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
832                     ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
833 
834                     if(ps_ip->u4_size
835                                     != sizeof(ihevcd_cxa_ctl_set_processor_ip_t))
836                     {
837                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
838                         ps_op->u4_error_code |=
839                                         IVD_IP_API_STRUCT_SIZE_INCORRECT;
840                         return IV_FAIL;
841                     }
842 
843                     if(ps_op->u4_size
844                                     != sizeof(ihevcd_cxa_ctl_set_processor_op_t))
845                     {
846                         ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
847                         ps_op->u4_error_code |=
848                                         IVD_OP_API_STRUCT_SIZE_INCORRECT;
849                         return IV_FAIL;
850                     }
851 
852                     break;
853                 }
854                 default:
855                     *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
856                     *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
857                     return IV_FAIL;
858             }
859         }
860             break;
861         default:
862             *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
863             *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
864             return IV_FAIL;
865     }
866 
867     return IV_SUCCESS;
868 }
869 
870 
871 /**
872 *******************************************************************************
873 *
874 * @brief
875 *  Sets default dynamic parameters
876 *
877 * @par Description:
878 *  Sets default dynamic parameters. Will be called in ihevcd_init() to ensure
879 * that even if set_params is not called, codec  continues to work
880 *
881 * @param[in] ps_codec_obj
882 *  Pointer to codec object at API level
883 *
884 * @param[in] pv_api_ip
885 *  Pointer to input argument structure
886 *
887 * @param[out] pv_api_op
888 *  Pointer to output argument structure
889 *
890 * @returns  Status
891 *
892 * @remarks
893 *
894 *
895 *******************************************************************************
896 */
ihevcd_set_default_params(codec_t * ps_codec)897 WORD32 ihevcd_set_default_params(codec_t *ps_codec)
898 {
899 
900     WORD32 ret = IV_SUCCESS;
901 
902     ps_codec->e_pic_skip_mode = IVD_SKIP_NONE;
903     ps_codec->i4_strd = 0;
904     ps_codec->i4_disp_strd = 0;
905     ps_codec->i4_header_mode = 0;
906     ps_codec->e_pic_out_order = IVD_DISPLAY_FRAME_OUT;
907     return ret;
908 }
909 
ihevcd_update_function_ptr(codec_t * ps_codec)910 void ihevcd_update_function_ptr(codec_t *ps_codec)
911 {
912 
913     /* Init inter pred function array */
914     ps_codec->apf_inter_pred[0] = NULL;
915     ps_codec->apf_inter_pred[1] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_fptr;
916     ps_codec->apf_inter_pred[2] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_fptr;
917     ps_codec->apf_inter_pred[3] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_fptr;
918     ps_codec->apf_inter_pred[4] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
919     ps_codec->apf_inter_pred[5] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_w16out_fptr;
920     ps_codec->apf_inter_pred[6] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16out_fptr;
921     ps_codec->apf_inter_pred[7] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
922     ps_codec->apf_inter_pred[8] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
923     ps_codec->apf_inter_pred[9] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_fptr;
924     ps_codec->apf_inter_pred[10] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_w16out_fptr;
925     ps_codec->apf_inter_pred[11] = NULL;
926     ps_codec->apf_inter_pred[12] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_fptr;
927     ps_codec->apf_inter_pred[13] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_fptr;
928     ps_codec->apf_inter_pred[14] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_fptr;
929     ps_codec->apf_inter_pred[15] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
930     ps_codec->apf_inter_pred[16] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_w16out_fptr;
931     ps_codec->apf_inter_pred[17] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16out_fptr;
932     ps_codec->apf_inter_pred[18] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
933     ps_codec->apf_inter_pred[19] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
934     ps_codec->apf_inter_pred[20] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_fptr;
935     ps_codec->apf_inter_pred[21] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_w16out_fptr;
936 
937     /* Init intra pred function array */
938     ps_codec->apf_intra_pred_luma[0] = (pf_intra_pred)NULL;
939     ps_codec->apf_intra_pred_luma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_planar_fptr;
940     ps_codec->apf_intra_pred_luma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_dc_fptr;
941     ps_codec->apf_intra_pred_luma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode2_fptr;
942     ps_codec->apf_intra_pred_luma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_3_to_9_fptr;
943     ps_codec->apf_intra_pred_luma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_horz_fptr;
944     ps_codec->apf_intra_pred_luma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_11_to_17_fptr;
945     ps_codec->apf_intra_pred_luma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_18_34_fptr;
946     ps_codec->apf_intra_pred_luma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_19_to_25_fptr;
947     ps_codec->apf_intra_pred_luma[9] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_ver_fptr;
948     ps_codec->apf_intra_pred_luma[10] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_27_to_33_fptr;
949 
950     ps_codec->apf_intra_pred_chroma[0] = (pf_intra_pred)NULL;
951     ps_codec->apf_intra_pred_chroma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_planar_fptr;
952     ps_codec->apf_intra_pred_chroma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_dc_fptr;
953     ps_codec->apf_intra_pred_chroma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode2_fptr;
954     ps_codec->apf_intra_pred_chroma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_3_to_9_fptr;
955     ps_codec->apf_intra_pred_chroma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_horz_fptr;
956     ps_codec->apf_intra_pred_chroma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_11_to_17_fptr;
957     ps_codec->apf_intra_pred_chroma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_18_34_fptr;
958     ps_codec->apf_intra_pred_chroma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_19_to_25_fptr;
959     ps_codec->apf_intra_pred_chroma[9] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_ver_fptr;
960     ps_codec->apf_intra_pred_chroma[10] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_27_to_33_fptr;
961 
962     /* Init itrans_recon function array */
963     ps_codec->apf_itrans_recon[0] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_ttype1_fptr;
964     ps_codec->apf_itrans_recon[1] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_fptr;
965     ps_codec->apf_itrans_recon[2] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_8x8_fptr;
966     ps_codec->apf_itrans_recon[3] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_16x16_fptr;
967     ps_codec->apf_itrans_recon[4] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_32x32_fptr;
968     ps_codec->apf_itrans_recon[5] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_4x4_fptr;
969     ps_codec->apf_itrans_recon[6] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_8x8_fptr;
970     ps_codec->apf_itrans_recon[7] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_16x16_fptr;
971 
972     /* Init recon function array */
973     ps_codec->apf_recon[0] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_ttype1_fptr;
974     ps_codec->apf_recon[1] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_fptr;
975     ps_codec->apf_recon[2] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_8x8_fptr;
976     ps_codec->apf_recon[3] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_16x16_fptr;
977     ps_codec->apf_recon[4] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_32x32_fptr;
978     ps_codec->apf_recon[5] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_4x4_fptr;
979     ps_codec->apf_recon[6] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_8x8_fptr;
980     ps_codec->apf_recon[7] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_16x16_fptr;
981 
982     /* Init itrans_recon_dc function array */
983     ps_codec->apf_itrans_recon_dc[0] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_luma_fptr;
984     ps_codec->apf_itrans_recon_dc[1] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_chroma_fptr;
985 
986     /* Init sao function array */
987     ps_codec->apf_sao_luma[0] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_fptr;
988     ps_codec->apf_sao_luma[1] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_fptr;
989     ps_codec->apf_sao_luma[2] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_fptr;
990     ps_codec->apf_sao_luma[3] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_fptr;
991 
992     ps_codec->apf_sao_chroma[0] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_chroma_fptr;
993     ps_codec->apf_sao_chroma[1] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_chroma_fptr;
994     ps_codec->apf_sao_chroma[2] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_chroma_fptr;
995     ps_codec->apf_sao_chroma[3] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_chroma_fptr;
996 }
997 /**
998 *******************************************************************************
999 *
1000 * @brief
1001 *  Initialize the context. This will be called by  create and during
1002 * reset
1003 *
1004 * @par Description:
1005 *  Initializes the context
1006 *
1007 * @param[in] ps_codec
1008 *  Codec context pointer
1009 *
1010 * @returns  Status
1011 *
1012 * @remarks
1013 *
1014 *
1015 *******************************************************************************
1016 */
ihevcd_init(codec_t * ps_codec)1017 WORD32 ihevcd_init(codec_t *ps_codec)
1018 {
1019     WORD32 status = IV_SUCCESS;
1020     WORD32 i;
1021 
1022     /* Free any dynamic buffers that are allocated */
1023     ihevcd_free_dynamic_bufs(ps_codec);
1024 
1025     ps_codec->u4_allocate_dynamic_done = 0;
1026     ps_codec->i4_num_disp_bufs = 1;
1027     ps_codec->i4_flush_mode = 0;
1028 
1029     ps_codec->i4_ht = ps_codec->i4_disp_ht = 0;
1030     ps_codec->i4_wd = ps_codec->i4_disp_wd = 0;
1031     ps_codec->i4_strd = 0;
1032     ps_codec->i4_disp_strd = 0;
1033     ps_codec->i4_num_cores = 1;
1034 
1035     ps_codec->u4_pic_cnt = 0;
1036     ps_codec->u4_disp_cnt = 0;
1037 
1038     ps_codec->i4_header_mode = 0;
1039     ps_codec->i4_header_in_slice_mode = 0;
1040     ps_codec->i4_sps_done = 0;
1041     ps_codec->i4_pps_done = 0;
1042     ps_codec->i4_init_done   = 1;
1043     ps_codec->i4_first_pic_done = 0;
1044     ps_codec->s_parse.i4_first_pic_init = 0;
1045     ps_codec->i4_error_code = 0;
1046     ps_codec->i4_reset_flag = 0;
1047     ps_codec->i4_cra_as_first_pic = 1;
1048     ps_codec->i4_rasl_output_flag = 0;
1049 
1050     ps_codec->i4_prev_poc_msb = 0;
1051     ps_codec->i4_prev_poc_lsb = -1;
1052     ps_codec->i4_max_prev_poc_lsb = -1;
1053     ps_codec->s_parse.i4_abs_pic_order_cnt = -1;
1054 
1055     /* Set ref chroma format by default to 420SP UV interleaved */
1056     ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_UV;
1057 
1058     /* If the codec is in shared mode and required format is 420 SP VU interleaved then change
1059      * reference buffers chroma format
1060      */
1061     if(IV_YUV_420SP_VU == ps_codec->e_chroma_fmt)
1062     {
1063         ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_VU;
1064     }
1065 
1066 
1067 
1068     ps_codec->i4_disable_deblk_pic = 0;
1069 
1070     ps_codec->i4_degrade_pic_cnt    = 0;
1071     ps_codec->i4_degrade_pics       = 0;
1072     ps_codec->i4_degrade_type       = 0;
1073     ps_codec->i4_disable_sao_pic    = 0;
1074     ps_codec->i4_fullpel_inter_pred = 0;
1075     ps_codec->u4_enable_fmt_conv_ahead = 0;
1076     ps_codec->i4_share_disp_buf_cnt = 0;
1077 
1078     {
1079         sps_t *ps_sps = ps_codec->ps_sps_base;
1080         pps_t *ps_pps = ps_codec->ps_pps_base;
1081 
1082         for(i = 0; i < MAX_SPS_CNT; i++)
1083         {
1084             ps_sps->i1_sps_valid = 0;
1085             ps_sps++;
1086         }
1087 
1088         for(i = 0; i < MAX_PPS_CNT; i++)
1089         {
1090             ps_pps->i1_pps_valid = 0;
1091             ps_pps++;
1092         }
1093     }
1094 
1095     ihevcd_set_default_params(ps_codec);
1096     /* Initialize MV Bank buffer manager */
1097     ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_mv_buf_mgr);
1098 
1099     /* Initialize Picture buffer manager */
1100     ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_pic_buf_mgr);
1101 
1102     ps_codec->ps_pic_buf = (pic_buf_t *)ps_codec->pv_pic_buf_base;
1103 
1104     memset(ps_codec->ps_pic_buf, 0, BUF_MGR_MAX_CNT  * sizeof(pic_buf_t));
1105 
1106 
1107 
1108     /* Initialize display buffer manager */
1109     ihevc_disp_mgr_init((disp_mgr_t *)ps_codec->pv_disp_buf_mgr);
1110 
1111     /* Initialize dpb manager */
1112     ihevc_dpb_mgr_init((dpb_mgr_t *)ps_codec->pv_dpb_mgr);
1113 
1114     ps_codec->e_processor_soc = SOC_GENERIC;
1115     /* The following can be over-ridden using soc parameter as a hack */
1116     ps_codec->u4_nctb = 0x7FFFFFFF;
1117     ihevcd_init_arch(ps_codec);
1118 
1119     ihevcd_init_function_ptr(ps_codec);
1120 
1121     ihevcd_update_function_ptr(ps_codec);
1122 
1123     return status;
1124 }
1125 
1126 /**
1127 *******************************************************************************
1128 *
1129 * @brief
1130 *  Allocate static memory for the codec
1131 *
1132 * @par Description:
1133 *  Allocates static memory for the codec
1134 *
1135 * @param[in] pv_api_ip
1136 *  Pointer to input argument structure
1137 *
1138 * @param[out] pv_api_op
1139 *  Pointer to output argument structure
1140 *
1141 * @returns  Status
1142 *
1143 * @remarks
1144 *
1145 *
1146 *******************************************************************************
1147 */
ihevcd_allocate_static_bufs(iv_obj_t ** pps_codec_obj,ihevcd_cxa_create_ip_t * ps_create_ip,ihevcd_cxa_create_op_t * ps_create_op)1148 WORD32 ihevcd_allocate_static_bufs(iv_obj_t **pps_codec_obj,
1149                                    ihevcd_cxa_create_ip_t *ps_create_ip,
1150                                    ihevcd_cxa_create_op_t *ps_create_op)
1151 {
1152     WORD32 size;
1153     void *pv_buf;
1154     UWORD8 *pu1_buf;
1155     WORD32 i;
1156     codec_t *ps_codec;
1157     IV_API_CALL_STATUS_T status = IV_SUCCESS;
1158     void *(*pf_aligned_alloc)(void *pv_mem_ctxt, WORD32 alignment, WORD32 size);
1159     void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1160     void *pv_mem_ctxt;
1161 
1162     /* Request memory for HEVCD object */
1163     ps_create_op->s_ivd_create_op_t.pv_handle = NULL;
1164 
1165     pf_aligned_alloc = ps_create_ip->s_ivd_create_ip_t.pf_aligned_alloc;
1166     pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
1167     pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
1168 
1169 
1170     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(iv_obj_t));
1171     RETURN_IF((NULL == pv_buf), IV_FAIL);
1172     *pps_codec_obj = (iv_obj_t *)pv_buf;
1173     ps_create_op->s_ivd_create_op_t.pv_handle = *pps_codec_obj;
1174 
1175 
1176     (*pps_codec_obj)->pv_codec_handle = NULL;
1177     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(codec_t));
1178     RETURN_IF((NULL == pv_buf), IV_FAIL);
1179     (*pps_codec_obj)->pv_codec_handle = (codec_t *)pv_buf;
1180     ps_codec = (codec_t *)pv_buf;
1181 
1182     memset(ps_codec, 0, sizeof(codec_t));
1183 
1184 #ifndef LOGO_EN
1185     ps_codec->i4_share_disp_buf = ps_create_ip->s_ivd_create_ip_t.u4_share_disp_buf;
1186 #else
1187     ps_codec->i4_share_disp_buf = 0;
1188 #endif
1189 
1190     /* Shared display mode is supported only for 420SP and 420P formats */
1191     if((ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P) &&
1192        (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_UV) &&
1193        (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_VU))
1194     {
1195         ps_codec->i4_share_disp_buf = 0;
1196     }
1197 
1198     ps_codec->e_chroma_fmt = ps_create_ip->s_ivd_create_ip_t.e_output_format;
1199 
1200     ps_codec->pf_aligned_alloc = pf_aligned_alloc;
1201     ps_codec->pf_aligned_free = pf_aligned_free;
1202     ps_codec->pv_mem_ctxt = pv_mem_ctxt;
1203 
1204     /* Request memory to hold thread handles for each processing thread */
1205     size = MAX_PROCESS_THREADS * ithread_get_handle_size();
1206     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1207     RETURN_IF((NULL == pv_buf), IV_FAIL);
1208 
1209     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1210     {
1211         WORD32 handle_size = ithread_get_handle_size();
1212         ps_codec->apv_process_thread_handle[i] =
1213                         (UWORD8 *)pv_buf + (i * handle_size);
1214     }
1215 
1216     /* Request memory for static bitstream buffer which holds bitstream after emulation prevention */
1217     size = MIN_BITSBUF_SIZE;
1218     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1219     RETURN_IF((NULL == pv_buf), IV_FAIL);
1220     ps_codec->pu1_bitsbuf_static = pv_buf;
1221     ps_codec->u4_bitsbuf_size_static = size;
1222 
1223     /* size for holding display manager context */
1224     size = sizeof(buf_mgr_t);
1225     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1226     RETURN_IF((NULL == pv_buf), IV_FAIL);
1227     ps_codec->pv_disp_buf_mgr = pv_buf;
1228 
1229     /* size for holding dpb manager context */
1230     size = sizeof(dpb_mgr_t);
1231     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1232     RETURN_IF((NULL == pv_buf), IV_FAIL);
1233     ps_codec->pv_dpb_mgr = pv_buf;
1234 
1235     /* size for holding buffer manager context */
1236     size = sizeof(buf_mgr_t);
1237     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1238     RETURN_IF((NULL == pv_buf), IV_FAIL);
1239     ps_codec->pv_pic_buf_mgr = pv_buf;
1240 
1241     /* size for holding mv buffer manager context */
1242     size = sizeof(buf_mgr_t);
1243     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1244     RETURN_IF((NULL == pv_buf), IV_FAIL);
1245     ps_codec->pv_mv_buf_mgr = pv_buf;
1246 
1247     size = MAX_VPS_CNT * sizeof(vps_t);
1248     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1249     RETURN_IF((NULL == pv_buf), IV_FAIL);
1250     memset(pv_buf, 0, size);
1251     ps_codec->ps_vps_base = pv_buf;
1252     ps_codec->s_parse.ps_vps_base = ps_codec->ps_vps_base;
1253 
1254     size = MAX_SPS_CNT * sizeof(sps_t);
1255     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1256     RETURN_IF((NULL == pv_buf), IV_FAIL);
1257     memset(pv_buf, 0, size);
1258     ps_codec->ps_sps_base = pv_buf;
1259     ps_codec->s_parse.ps_sps_base = ps_codec->ps_sps_base;
1260 
1261     size = MAX_PPS_CNT * sizeof(pps_t);
1262     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1263     RETURN_IF((NULL == pv_buf), IV_FAIL);
1264     memset(pv_buf, 0, size);
1265     ps_codec->ps_pps_base = pv_buf;
1266     ps_codec->s_parse.ps_pps_base = ps_codec->ps_pps_base;
1267 
1268     size = MAX_SLICE_HDR_CNT * sizeof(slice_header_t);
1269     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1270     RETURN_IF((NULL == pv_buf), IV_FAIL);
1271     memset(pv_buf, 0, size);
1272     ps_codec->ps_slice_hdr_base = (slice_header_t *)pv_buf;
1273     ps_codec->s_parse.ps_slice_hdr_base = ps_codec->ps_slice_hdr_base;
1274 
1275 
1276     SCALING_MAT_SIZE(size)
1277     size = (MAX_SPS_CNT + MAX_PPS_CNT) * size * sizeof(WORD16);
1278     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1279     RETURN_IF((NULL == pv_buf), IV_FAIL);
1280     ps_codec->pi2_scaling_mat = (WORD16 *)pv_buf;
1281 
1282 
1283     /* Size for holding pic_buf_t for each reference picture
1284      * Since this is only a structure allocation and not actual buffer allocation,
1285      * it is allocated for BUF_MGR_MAX_CNT entries
1286      */
1287     size = BUF_MGR_MAX_CNT * sizeof(pic_buf_t);
1288     pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1289     RETURN_IF((NULL == pv_buf), IV_FAIL);
1290     ps_codec->pv_pic_buf_base = (UWORD8 *)pv_buf;
1291 
1292     /* TO hold scratch buffers needed for each SAO context */
1293     size = 4 * MAX_CTB_SIZE * MAX_CTB_SIZE;
1294 
1295     /* 2 temporary buffers*/
1296     size *= 2;
1297     size *= MAX_PROCESS_THREADS;
1298 
1299     pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1300     RETURN_IF((NULL == pu1_buf), IV_FAIL);
1301 
1302     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1303     {
1304         ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_luma = (UWORD8 *)pu1_buf;
1305         pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1306 
1307         ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_chroma = (UWORD8 *)pu1_buf;
1308         pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1309     }
1310 
1311     /* Allocate intra pred modes buffer */
1312     /* 8 bits per 4x4 */
1313     /* 16 bytes each for top and left 64 pixels and 16 bytes for default mode */
1314     size =  3 * 16 * sizeof(UWORD8);
1315     pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1316     RETURN_IF((NULL == pu1_buf), IV_FAIL);
1317     memset(pu1_buf, 0, size);
1318     ps_codec->s_parse.pu1_luma_intra_pred_mode_left = pu1_buf;
1319     ps_codec->s_parse.pu1_luma_intra_pred_mode_top  = pu1_buf + 16;
1320 
1321     {
1322         WORD32 inter_pred_tmp_buf_size, ntaps_luma;
1323         WORD32 pic_pu_idx_map_size;
1324 
1325         /* Max inter pred size */
1326         ntaps_luma = 8;
1327         inter_pred_tmp_buf_size = sizeof(WORD16) * (MAX_CTB_SIZE + ntaps_luma) * MAX_CTB_SIZE;
1328 
1329         inter_pred_tmp_buf_size = ALIGN64(inter_pred_tmp_buf_size);
1330 
1331         /* To hold pu_index w.r.t. frame level pu_t array for a CTB */
1332         pic_pu_idx_map_size = sizeof(WORD32) * (18 * 18);
1333         pic_pu_idx_map_size = ALIGN64(pic_pu_idx_map_size);
1334 
1335         size =  inter_pred_tmp_buf_size * 2;
1336         size += pic_pu_idx_map_size;
1337         size *= MAX_PROCESS_THREADS;
1338 
1339         pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1340         RETURN_IF((NULL == pu1_buf), IV_FAIL);
1341         memset(pu1_buf, 0, size);
1342 
1343         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1344         {
1345             ps_codec->as_process[i].pi2_inter_pred_tmp_buf1 = (WORD16 *)pu1_buf;
1346             pu1_buf += inter_pred_tmp_buf_size;
1347 
1348             ps_codec->as_process[i].pi2_inter_pred_tmp_buf2 = (WORD16 *)pu1_buf;
1349             pu1_buf += inter_pred_tmp_buf_size;
1350 
1351             /* Inverse transform intermediate and inverse scan output buffers reuse inter pred scratch buffers */
1352             ps_codec->as_process[i].pi2_itrans_intrmd_buf =
1353                             ps_codec->as_process[i].pi2_inter_pred_tmp_buf2;
1354             ps_codec->as_process[i].pi2_invscan_out =
1355                             ps_codec->as_process[i].pi2_inter_pred_tmp_buf1;
1356 
1357             ps_codec->as_process[i].pu4_pic_pu_idx_map = (UWORD32 *)pu1_buf;
1358             ps_codec->as_process[i].s_bs_ctxt.pu4_pic_pu_idx_map =
1359                             (UWORD32 *)pu1_buf;
1360             pu1_buf += pic_pu_idx_map_size;
1361 
1362             //   ps_codec->as_process[i].pi2_inter_pred_tmp_buf3 = (WORD16 *)pu1_buf;
1363             //   pu1_buf += inter_pred_tmp_buf_size;
1364 
1365             ps_codec->as_process[i].i4_inter_pred_tmp_buf_strd = MAX_CTB_SIZE;
1366 
1367         }
1368     }
1369     /* Initialize pointers in PPS structures */
1370     {
1371         sps_t *ps_sps = ps_codec->ps_sps_base;
1372         pps_t *ps_pps = ps_codec->ps_pps_base;
1373         WORD16 *pi2_scaling_mat =  ps_codec->pi2_scaling_mat;
1374         WORD32 scaling_mat_size;
1375 
1376         SCALING_MAT_SIZE(scaling_mat_size);
1377 
1378         for(i = 0; i < MAX_SPS_CNT; i++)
1379         {
1380             ps_sps->pi2_scaling_mat  = pi2_scaling_mat;
1381             pi2_scaling_mat += scaling_mat_size;
1382             ps_sps++;
1383         }
1384 
1385         for(i = 0; i < MAX_PPS_CNT; i++)
1386         {
1387             ps_pps->pi2_scaling_mat  = pi2_scaling_mat;
1388             pi2_scaling_mat += scaling_mat_size;
1389             ps_pps++;
1390         }
1391     }
1392 
1393     return (status);
1394 }
1395 
1396 /**
1397 *******************************************************************************
1398 *
1399 * @brief
1400 *  Free static memory for the codec
1401 *
1402 * @par Description:
1403 *  Free static memory for the codec
1404 *
1405 * @param[in] ps_codec
1406 *  Pointer to codec context
1407 *
1408 * @returns  Status
1409 *
1410 * @remarks
1411 *
1412 *
1413 *******************************************************************************
1414 */
ihevcd_free_static_bufs(iv_obj_t * ps_codec_obj)1415 WORD32 ihevcd_free_static_bufs(iv_obj_t *ps_codec_obj)
1416 {
1417     codec_t *ps_codec;
1418 
1419     void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1420     void *pv_mem_ctxt;
1421 
1422     ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
1423     pf_aligned_free = ps_codec->pf_aligned_free;
1424     pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1425 
1426 
1427     ALIGNED_FREE(ps_codec, ps_codec->apv_process_thread_handle[0]);
1428     ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_static);
1429 
1430     ALIGNED_FREE(ps_codec, ps_codec->pv_disp_buf_mgr);
1431     ALIGNED_FREE(ps_codec, ps_codec->pv_dpb_mgr);
1432     ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_mgr);
1433     ALIGNED_FREE(ps_codec, ps_codec->pv_mv_buf_mgr);
1434     ALIGNED_FREE(ps_codec, ps_codec->ps_vps_base);
1435     ALIGNED_FREE(ps_codec, ps_codec->ps_sps_base);
1436     ALIGNED_FREE(ps_codec, ps_codec->ps_pps_base);
1437     ALIGNED_FREE(ps_codec, ps_codec->ps_slice_hdr_base);
1438     ALIGNED_FREE(ps_codec, ps_codec->pi2_scaling_mat);
1439     ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_base);
1440     ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu1_luma_intra_pred_mode_left);
1441     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_tmp_buf_luma);
1442     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pi2_inter_pred_tmp_buf1);
1443     ALIGNED_FREE(ps_codec, ps_codec_obj->pv_codec_handle);
1444 
1445     if(ps_codec_obj)
1446     {
1447         pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
1448     }
1449 
1450     return IV_SUCCESS;
1451 
1452 }
1453 
1454 
1455 /**
1456 *******************************************************************************
1457 *
1458 * @brief
1459 *  Allocate dynamic memory for the codec
1460 *
1461 * @par Description:
1462 *  Allocates dynamic memory for the codec
1463 *
1464 * @param[in] ps_codec
1465 *  Pointer to codec context
1466 *
1467 * @returns  Status
1468 *
1469 * @remarks
1470 *
1471 *
1472 *******************************************************************************
1473 */
ihevcd_allocate_dynamic_bufs(codec_t * ps_codec)1474 WORD32 ihevcd_allocate_dynamic_bufs(codec_t *ps_codec)
1475 {
1476     WORD32 max_tile_cols, max_tile_rows;
1477     WORD32 max_ctb_rows, max_ctb_cols;
1478     WORD32 max_num_cu_cols;
1479     WORD32 max_num_cu_rows;
1480     WORD32 max_num_4x4_cols;
1481     WORD32 max_ctb_cnt;
1482     WORD32 wd;
1483     WORD32 ht;
1484     WORD32 i;
1485     WORD32 max_dpb_size;
1486     void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1487     void *pv_buf;
1488     UWORD8 *pu1_buf;
1489     WORD32 size;
1490 
1491     wd = ALIGN64(ps_codec->i4_wd);
1492     ht = ALIGN64(ps_codec->i4_ht);
1493 
1494     max_tile_cols = (wd + MIN_TILE_WD - 1) / MIN_TILE_WD;
1495     max_tile_rows = (ht + MIN_TILE_HT - 1) / MIN_TILE_HT;
1496     max_ctb_rows  = ht / MIN_CTB_SIZE;
1497     max_ctb_cols  = wd / MIN_CTB_SIZE;
1498     max_ctb_cnt   = max_ctb_rows * max_ctb_cols;
1499     max_num_cu_cols = wd / MIN_CU_SIZE;
1500     max_num_cu_rows = ht / MIN_CU_SIZE;
1501     max_num_4x4_cols = wd / 4;
1502 
1503     /* Allocate tile structures */
1504     size = max_tile_cols * max_tile_rows;
1505     size *= sizeof(tile_t);
1506     size *= MAX_PPS_CNT;
1507 
1508     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1509     RETURN_IF((NULL == pv_buf), IV_FAIL);
1510     memset(pv_buf, 0, size);
1511     ps_codec->ps_tile = (tile_t *)pv_buf;
1512 
1513 
1514     /* Allocate memory to hold entry point offsets */
1515     /* One entry point per tile */
1516     size = max_tile_cols * max_tile_rows;
1517 
1518     /* One entry point per row of CTBs */
1519     /*********************************************************************/
1520     /* Only tiles or entropy sync is enabled at a time in main           */
1521     /* profile, but since memory required does not increase too much,    */
1522     /* this allocation is done to handle both cases                      */
1523     /*********************************************************************/
1524     size  += max_ctb_rows;
1525     size *= sizeof(WORD32);
1526 
1527     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1528     RETURN_IF((NULL == pv_buf), IV_FAIL);
1529     memset(pv_buf, 0, size);
1530     ps_codec->pi4_entry_ofst = (WORD32 *)pv_buf;
1531 
1532     /* Allocate parse skip flag buffer */
1533     /* 1 bit per 8x8 */
1534     size = max_num_cu_cols / 8;
1535     size = ALIGN4(size);
1536     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1537     RETURN_IF((NULL == pv_buf), IV_FAIL);
1538     memset(pv_buf, 0, size);
1539     ps_codec->s_parse.pu4_skip_cu_top = (UWORD32 *)pv_buf;
1540 
1541     /* Allocate parse coding tree depth buffer */
1542     /* 2 bits per 8x8 */
1543     size =  max_num_cu_cols / 4;
1544     size = ALIGN4(size);
1545     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1546     RETURN_IF((NULL == pv_buf), IV_FAIL);
1547     memset(pv_buf, 0, size);
1548     ps_codec->s_parse.pu4_ct_depth_top = (UWORD32 *)pv_buf;
1549 
1550     /* Allocate intra flag buffer */
1551     /* 1 bit per 8x8 */
1552     size =  max_num_cu_cols * max_num_cu_rows / 8;
1553     size = ALIGN4(size);
1554     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1555     RETURN_IF((NULL == pv_buf), IV_FAIL);
1556     memset(pv_buf, 0, size);
1557     ps_codec->pu1_pic_intra_flag = (UWORD8 *)pv_buf;
1558     ps_codec->s_parse.pu1_pic_intra_flag = ps_codec->pu1_pic_intra_flag;
1559 
1560     /* Allocate transquant bypass flag buffer */
1561     /* 1 bit per 8x8 */
1562     /* Extra row and column are allocated for easy processing of top and left blocks while loop filtering */
1563     size =  ((max_num_cu_cols + 8) * (max_num_cu_rows + 8)) / 8;
1564     size = ALIGN4(size);
1565     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1566     RETURN_IF((NULL == pv_buf), IV_FAIL);
1567     memset(pv_buf, 1, size);
1568     {
1569         WORD32 loop_filter_strd = (wd + 63) >> 6;
1570         ps_codec->pu1_pic_no_loop_filter_flag_base = pv_buf;
1571         /* The offset is added for easy processing of top and left blocks while loop filtering */
1572         ps_codec->pu1_pic_no_loop_filter_flag = (UWORD8 *)pv_buf + loop_filter_strd + 1;
1573         ps_codec->s_parse.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1574         ps_codec->s_parse.s_deblk_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1575         ps_codec->s_parse.s_sao_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1576     }
1577 
1578     /* Initialize pointers in PPS structures */
1579     {
1580         pps_t *ps_pps = ps_codec->ps_pps_base;
1581         tile_t *ps_tile =  ps_codec->ps_tile;
1582 
1583         for(i = 0; i < MAX_PPS_CNT; i++)
1584         {
1585             ps_pps->ps_tile = ps_tile;
1586             ps_tile += (max_tile_cols * max_tile_rows);
1587             ps_pps++;
1588         }
1589 
1590     }
1591 
1592     /* Allocate memory for job queue */
1593 
1594     /* One job per row of CTBs */
1595     size  = max_ctb_rows;
1596 
1597     /* One each tile a row of CTBs, num_jobs has to incremented */
1598     size  *= max_tile_cols;
1599 
1600     /* One format convert/frame copy job per row of CTBs for non-shared mode*/
1601     size  += max_ctb_rows;
1602 
1603     size *= sizeof(proc_job_t);
1604 
1605     size += ihevcd_jobq_ctxt_size();
1606     size = ALIGN4(size);
1607 
1608     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1609     RETURN_IF((NULL == pv_buf), IV_FAIL);
1610     ps_codec->pv_proc_jobq_buf = pv_buf;
1611     ps_codec->i4_proc_jobq_buf_size = size;
1612 
1613     size =  max_ctb_cnt;
1614     size = ALIGN4(size);
1615     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1616     RETURN_IF((NULL == pv_buf), IV_FAIL);
1617     memset(pv_buf, 0, size);
1618     ps_codec->pu1_parse_map = (UWORD8 *)pv_buf;
1619 
1620     size =  max_ctb_cnt;
1621     size = ALIGN4(size);
1622     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1623     RETURN_IF((NULL == pv_buf), IV_FAIL);
1624     memset(pv_buf, 0, size);
1625     ps_codec->pu1_proc_map = (UWORD8 *)pv_buf;
1626 
1627     /** Holds top and left neighbor's pu idx into picture level pu array */
1628     /* Only one top row is enough but left has to be replicated for each process context */
1629     size =  (max_num_4x4_cols  /* left */ + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4)/* top */ + 1/* top right */) * sizeof(WORD32);
1630     size = ALIGN4(size);
1631     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1632     RETURN_IF((NULL == pv_buf), IV_FAIL);
1633     memset(pv_buf, 0, size);
1634 
1635     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1636     {
1637         UWORD32 *pu4_buf = (UWORD32 *)pv_buf;
1638         ps_codec->as_process[i].pu4_pic_pu_idx_left = pu4_buf + i * (MAX_CTB_SIZE / 4);
1639         memset(ps_codec->as_process[i].pu4_pic_pu_idx_left, 0, sizeof(UWORD32) * MAX_CTB_SIZE / 4);
1640         ps_codec->as_process[i].pu4_pic_pu_idx_top = pu4_buf + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4);
1641     }
1642     memset(ps_codec->as_process[0].pu4_pic_pu_idx_top, 0, sizeof(UWORD32) * (wd / 4 + 1));
1643 
1644     {
1645         /* To hold SAO left buffer for luma */
1646         size  = sizeof(UWORD8) * (MAX(ht, wd));
1647 
1648         /* To hold SAO left buffer for chroma */
1649         size += sizeof(UWORD8) * (MAX(ht, wd));
1650 
1651         /* To hold SAO top buffer for luma */
1652         size += sizeof(UWORD8) * wd;
1653 
1654         /* To hold SAO top buffer for chroma */
1655         size += sizeof(UWORD8) * wd;
1656 
1657         /* To hold SAO top left luma pixel value for last output ctb in a row*/
1658         size += sizeof(UWORD8) * max_ctb_rows;
1659 
1660         /* To hold SAO top left chroma pixel value last output ctb in a row*/
1661         size += sizeof(UWORD8) * max_ctb_rows * 2;
1662 
1663         /* To hold SAO top left pixel luma for current ctb - column array*/
1664         size += sizeof(UWORD8) * max_ctb_rows;
1665 
1666         /* To hold SAO top left pixel chroma for current ctb-column array*/
1667         size += sizeof(UWORD8) * max_ctb_rows * 2;
1668 
1669         /* To hold SAO top right pixel luma pixel value last output ctb in a row*/
1670         size += sizeof(UWORD8) * max_ctb_cols;
1671 
1672         /* To hold SAO top right pixel chroma pixel value last output ctb in a row*/
1673         size += sizeof(UWORD8) * max_ctb_cols * 2;
1674 
1675         /*To hold SAO botton bottom left pixels for luma*/
1676         size += sizeof(UWORD8) * max_ctb_rows;
1677 
1678         /*To hold SAO botton bottom left pixels for luma*/
1679         size += sizeof(UWORD8) * max_ctb_rows * 2;
1680         size = ALIGN64(size);
1681 
1682         pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1683         RETURN_IF((NULL == pu1_buf), IV_FAIL);
1684         memset(pu1_buf, 0, size);
1685 
1686         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1687         {
1688             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1689         }
1690         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1691         pu1_buf += MAX(ht, wd);
1692 
1693         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1694         {
1695             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1696         }
1697         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1698         pu1_buf += MAX(ht, wd);
1699         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1700         {
1701             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1702         }
1703         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1704         pu1_buf += wd;
1705 
1706         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1707         {
1708             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1709         }
1710         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1711         pu1_buf += wd;
1712         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1713         {
1714             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1715         }
1716         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1717         pu1_buf += ht / MIN_CTB_SIZE;
1718 
1719         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1720         {
1721             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1722         }
1723         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1724         pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1725 
1726         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1727         {
1728             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1729         }
1730         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1731         pu1_buf += ht / MIN_CTB_SIZE;
1732 
1733         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1734         {
1735             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1736         }
1737         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1738 
1739         pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1740         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1741         {
1742             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1743         }
1744         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1745 
1746         pu1_buf += wd / MIN_CTB_SIZE;
1747         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1748         {
1749             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1750         }
1751         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1752 
1753         pu1_buf += (wd / MIN_CTB_SIZE) * 2;
1754 
1755         /*Per CTB, Store 1 value for luma , 2 values for chroma*/
1756         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1757         {
1758             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1759         }
1760         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1761 
1762         pu1_buf += (ht / MIN_CTB_SIZE);
1763 
1764         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1765         {
1766             ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1767         }
1768         ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1769 
1770         pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1771     }
1772 
1773 
1774     {
1775         UWORD8 *pu1_buf = (UWORD8 *)pv_buf;
1776         WORD32 vert_bs_size, horz_bs_size;
1777         WORD32 qp_const_flag_size;
1778         WORD32 qp_size;
1779         WORD32 num_8x8;
1780 
1781         /* Max Number of vertical edges */
1782         vert_bs_size = wd / 8 + 2 * MAX_CTB_SIZE / 8;
1783 
1784         /* Max Number of horizontal edges - extra MAX_CTB_SIZE / 8 to handle the last 4 rows separately(shifted CTB processing) */
1785         vert_bs_size *= (ht + MAX_CTB_SIZE) / MIN_TU_SIZE;
1786 
1787         /* Number of bytes */
1788         vert_bs_size /= 8;
1789 
1790         /* Two bits per edge */
1791         vert_bs_size *= 2;
1792 
1793         /* Max Number of horizontal edges */
1794         horz_bs_size = ht / 8 + MAX_CTB_SIZE / 8;
1795 
1796         /* Max Number of vertical edges - extra MAX_CTB_SIZE / 8 to handle the last 4 columns separately(shifted CTB processing) */
1797         horz_bs_size *= (wd + MAX_CTB_SIZE) / MIN_TU_SIZE;
1798 
1799         /* Number of bytes */
1800         horz_bs_size /= 8;
1801 
1802         /* Two bits per edge */
1803         horz_bs_size *= 2;
1804 
1805         /* Max CTBs in a row */
1806         qp_const_flag_size = wd / MIN_CTB_SIZE + 1 /* The last ctb row deblk is done in last ctb + 1 row.*/;
1807 
1808         /* Max CTBs in a column */
1809         qp_const_flag_size *= ht / MIN_CTB_SIZE;
1810 
1811         /* Number of bytes */
1812         qp_const_flag_size /= 8;
1813 
1814         /* QP changes at CU level - So store at 8x8 level */
1815         num_8x8 = (ht * wd) / (MIN_CU_SIZE * MIN_CU_SIZE);
1816         qp_size = num_8x8;
1817 
1818         /* To hold vertical boundary strength */
1819         size += vert_bs_size;
1820 
1821         /* To hold horizontal boundary strength */
1822         size += horz_bs_size;
1823 
1824         /* To hold QP */
1825         size += qp_size;
1826 
1827         /* To hold QP const in CTB flags */
1828         size += qp_const_flag_size;
1829 
1830         pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1831         RETURN_IF((NULL == pu1_buf), IV_FAIL);
1832 
1833         memset(pu1_buf, 0, size);
1834 
1835         for(i = 0; i < MAX_PROCESS_THREADS; i++)
1836         {
1837             ps_codec->as_process[i].s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1838             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1839             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1840             pu1_buf += vert_bs_size;
1841 
1842             ps_codec->as_process[i].s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1843             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1844             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1845             pu1_buf += horz_bs_size;
1846 
1847             ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1848             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1849             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1850             pu1_buf += qp_size;
1851 
1852             ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1853             ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1854             ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1855             pu1_buf += qp_const_flag_size;
1856 
1857             pu1_buf -= (vert_bs_size + horz_bs_size + qp_size + qp_const_flag_size);
1858         }
1859         ps_codec->s_parse.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1860         pu1_buf += vert_bs_size;
1861 
1862         ps_codec->s_parse.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1863         pu1_buf += horz_bs_size;
1864 
1865         ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1866         pu1_buf += qp_size;
1867 
1868         ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1869         pu1_buf += qp_const_flag_size;
1870 
1871     }
1872 
1873     /* Max CTBs in a row */
1874     size  = wd / MIN_CTB_SIZE + 2 /* Top row and bottom row extra. This ensures accessing left,top in first row
1875                                               and right in last row will not result in invalid access*/;
1876     /* Max CTBs in a column */
1877     size *= ht / MIN_CTB_SIZE;
1878 
1879     size *= sizeof(UWORD16);
1880     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1881     RETURN_IF((NULL == pv_buf), IV_FAIL);
1882     memset(pv_buf, 0, size);
1883 
1884     ps_codec->pu1_tile_idx_base = pv_buf;
1885     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1886     {
1887         ps_codec->as_process[i].pu1_tile_idx = (UWORD16 *)pv_buf + wd / MIN_CTB_SIZE /* Offset 1 row */;
1888     }
1889 
1890     /* 4 bytes per color component per CTB */
1891     size = 3 * 4;
1892 
1893     /* MAX number of CTBs in a row */
1894     size *= wd / MIN_CTB_SIZE;
1895 
1896     /* MAX number of CTBs in a column */
1897     size *= ht / MIN_CTB_SIZE;
1898     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1899     RETURN_IF((NULL == pv_buf), IV_FAIL);
1900     memset(pv_buf, 0, size);
1901 
1902     ps_codec->s_parse.ps_pic_sao = (sao_t *)pv_buf;
1903     ps_codec->s_parse.s_sao_ctxt.ps_pic_sao = (sao_t *)pv_buf;
1904     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1905     {
1906         ps_codec->as_process[i].s_sao_ctxt.ps_pic_sao = ps_codec->s_parse.ps_pic_sao;
1907     }
1908 
1909     /* Only if width * height * 3 / 2 is greater than MIN_BITSBUF_SIZE,
1910     then allocate dynamic bistream buffer */
1911     ps_codec->pu1_bitsbuf_dynamic = NULL;
1912     size = wd * ht;
1913     if(size > MIN_BITSBUF_SIZE)
1914     {
1915         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1916         RETURN_IF((NULL == pv_buf), IV_FAIL);
1917         ps_codec->pu1_bitsbuf_dynamic = pv_buf;
1918         ps_codec->u4_bitsbuf_size_dynamic = size;
1919     }
1920 
1921     size = ihevcd_get_tu_data_size(wd * ht);
1922     pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1923     RETURN_IF((NULL == pv_buf), IV_FAIL);
1924     memset(pv_buf, 0, size);
1925     ps_codec->pv_tu_data = pv_buf;
1926 
1927     {
1928         sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
1929 
1930 
1931         /* Allocate for pu_map, pu_t and pic_pu_idx for each MV bank */
1932         /* Note: Number of luma samples is not max_wd * max_ht here, instead it is
1933          * set to maximum number of luma samples allowed at the given level.
1934          * This is done to ensure that any stream with width and height lesser
1935          * than max_wd and max_ht is supported. Number of buffers required can be greater
1936          * for lower width and heights at a given level and this increased number of buffers
1937          * might require more memory than what max_wd and max_ht buffer would have required
1938          * Also note one extra buffer is allocted to store current pictures MV bank
1939          * In case of asynchronous parsing and processing, number of buffers should increase here
1940          * based on when parsing and processing threads are synchronized
1941          */
1942         max_dpb_size = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
1943         /* Size for holding mv_buf_t for each MV Bank
1944          * One extra MV Bank is needed to hold current pics MV bank.
1945          */
1946         size = (max_dpb_size + 1) * sizeof(mv_buf_t);
1947 
1948         size += (max_dpb_size + 1) *
1949                         ihevcd_get_pic_mv_bank_size(wd * ht);
1950 
1951         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1952         RETURN_IF((NULL == pv_buf), IV_FAIL);
1953 
1954         ps_codec->pv_mv_bank_buf_base = pv_buf;
1955         ps_codec->i4_total_mv_bank_size = size;
1956 
1957     }
1958 
1959     /* In case of non-shared mode allocate for reference picture buffers */
1960     /* In case of shared and 420p output, allocate for chroma samples */
1961     if(0 == ps_codec->i4_share_disp_buf)
1962     {
1963         /* Number of buffers is doubled in order to return one frame at a time instead of sending
1964          * multiple outputs during dpb full case.
1965          * Also note one extra buffer is allocted to store current picture
1966          * In case of asynchronous parsing and processing, number of buffers should increase here
1967          * based on when parsing and processing threads are synchronized
1968          */
1969         size = ihevcd_get_total_pic_buf_size(ps_codec, wd, ht);
1970         pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1971         RETURN_IF((NULL == pv_buf), IV_FAIL);
1972 
1973 
1974         ps_codec->i4_total_pic_buf_size = size;
1975         ps_codec->pu1_ref_pic_buf_base = (UWORD8 *)pv_buf;
1976     }
1977 
1978     ps_codec->pv_proc_jobq = ihevcd_jobq_init(ps_codec->pv_proc_jobq_buf, ps_codec->i4_proc_jobq_buf_size);
1979     RETURN_IF((ps_codec->pv_proc_jobq == NULL), IV_FAIL);
1980 
1981     /* Update the jobq context to all the threads */
1982     ps_codec->s_parse.pv_proc_jobq = ps_codec->pv_proc_jobq;
1983     for(i = 0; i < MAX_PROCESS_THREADS; i++)
1984     {
1985         ps_codec->as_process[i].pv_proc_jobq = ps_codec->pv_proc_jobq;
1986         ps_codec->as_process[i].i4_id = i;
1987         ps_codec->as_process[i].ps_codec = ps_codec;
1988 
1989         /* Set the following to zero assuming it is a single core solution
1990          * When threads are launched these will be set appropriately
1991          */
1992         ps_codec->as_process[i].i4_check_parse_status = 0;
1993         ps_codec->as_process[i].i4_check_proc_status = 0;
1994     }
1995 
1996     ps_codec->u4_allocate_dynamic_done = 1;
1997 
1998     return IV_SUCCESS;
1999 }
2000 
2001 /**
2002 *******************************************************************************
2003 *
2004 * @brief
2005 *  Free dynamic memory for the codec
2006 *
2007 * @par Description:
2008 *  Free dynamic memory for the codec
2009 *
2010 * @param[in] ps_codec
2011 *  Pointer to codec context
2012 *
2013 * @returns  Status
2014 *
2015 * @remarks
2016 *
2017 *
2018 *******************************************************************************
2019 */
ihevcd_free_dynamic_bufs(codec_t * ps_codec)2020 WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec)
2021 {
2022 
2023     if(ps_codec->pv_proc_jobq)
2024     {
2025         ihevcd_jobq_deinit(ps_codec->pv_proc_jobq);
2026         ps_codec->pv_proc_jobq = NULL;
2027     }
2028 
2029     ALIGNED_FREE(ps_codec, ps_codec->ps_tile);
2030     ALIGNED_FREE(ps_codec, ps_codec->pi4_entry_ofst);
2031     ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_skip_cu_top);
2032     ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_ct_depth_top);
2033     ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_intra_flag);
2034     ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_no_loop_filter_flag_base);
2035     ALIGNED_FREE(ps_codec, ps_codec->pv_proc_jobq_buf);
2036     ALIGNED_FREE(ps_codec, ps_codec->pu1_parse_map);
2037     ALIGNED_FREE(ps_codec, ps_codec->pu1_proc_map);
2038     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pu4_pic_pu_idx_left);
2039     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_sao_src_left_luma);
2040     ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_bs_ctxt.pu4_pic_vert_bs);
2041     ALIGNED_FREE(ps_codec, ps_codec->pu1_tile_idx_base);
2042     ALIGNED_FREE(ps_codec, ps_codec->s_parse.ps_pic_sao);
2043     ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_dynamic);
2044     ALIGNED_FREE(ps_codec, ps_codec->pv_tu_data);
2045     ALIGNED_FREE(ps_codec, ps_codec->pv_mv_bank_buf_base);
2046     ALIGNED_FREE(ps_codec, ps_codec->pu1_ref_pic_buf_base);
2047     ALIGNED_FREE(ps_codec, ps_codec->pu1_cur_chroma_ref_buf);
2048 
2049     ps_codec->u4_allocate_dynamic_done = 0;
2050     return IV_SUCCESS;
2051 }
2052 
2053 
2054 /**
2055 *******************************************************************************
2056 *
2057 * @brief
2058 *  Initializes from mem records passed to the codec
2059 *
2060 * @par Description:
2061 *  Initializes pointers based on mem records passed
2062 *
2063 * @param[in] ps_codec_obj
2064 *  Pointer to codec object at API level
2065 *
2066 * @param[in] pv_api_ip
2067 *  Pointer to input argument structure
2068 *
2069 * @param[out] pv_api_op
2070 *  Pointer to output argument structure
2071 *
2072 * @returns  Status
2073 *
2074 * @remarks
2075 *
2076 *
2077 *******************************************************************************
2078 */
ihevcd_create(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2079 WORD32 ihevcd_create(iv_obj_t *ps_codec_obj,
2080                            void *pv_api_ip,
2081                            void *pv_api_op)
2082 {
2083 
2084     ihevcd_cxa_create_op_t *ps_create_op;
2085 
2086     WORD32 ret;
2087     codec_t *ps_codec;
2088     ps_create_op = (ihevcd_cxa_create_op_t *)pv_api_op;
2089 
2090     ps_create_op->s_ivd_create_op_t.u4_error_code = 0;
2091 
2092     ret = ihevcd_allocate_static_bufs(&ps_codec_obj, pv_api_ip, pv_api_op);
2093 
2094     /* If allocation of some buffer fails, then free buffers allocated till then */
2095     if((IV_FAIL == ret) && (NULL != ps_codec_obj))
2096     {
2097         ihevcd_free_static_bufs(ps_codec_obj);
2098         ps_create_op->s_ivd_create_op_t.u4_error_code = IVD_MEM_ALLOC_FAILED;
2099         ps_create_op->s_ivd_create_op_t.u4_error_code = 1 << IVD_FATALERROR;
2100 
2101         return IV_FAIL;
2102     }
2103     ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2104     ret = ihevcd_init(ps_codec);
2105 
2106     TRACE_INIT(NULL);
2107     STATS_INIT();
2108 
2109     return ret;
2110 }
2111 /**
2112 *******************************************************************************
2113 *
2114 * @brief
2115 *  Delete codec
2116 *
2117 * @par Description:
2118 *  Delete codec
2119 *
2120 * @param[in] ps_codec_obj
2121 *  Pointer to codec object at API level
2122 *
2123 * @param[in] pv_api_ip
2124 *  Pointer to input argument structure
2125 *
2126 * @param[out] pv_api_op
2127 *  Pointer to output argument structure
2128 *
2129 * @returns  Status
2130 *
2131 * @remarks
2132 *
2133 *
2134 *******************************************************************************
2135 */
ihevcd_delete(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2136 WORD32 ihevcd_delete(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
2137 {
2138     codec_t *ps_dec;
2139     ihevcd_cxa_delete_ip_t *ps_ip = (ihevcd_cxa_delete_ip_t *)pv_api_ip;
2140     ihevcd_cxa_delete_op_t *ps_op = (ihevcd_cxa_delete_op_t *)pv_api_op;
2141 
2142     ps_dec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2143     UNUSED(ps_ip);
2144     ps_op->s_ivd_delete_op_t.u4_error_code = 0;
2145     ihevcd_free_dynamic_bufs(ps_dec);
2146     ihevcd_free_static_bufs(ps_codec_obj);
2147     return IV_SUCCESS;
2148 }
2149 
2150 
2151 /**
2152 *******************************************************************************
2153 *
2154 * @brief
2155 *  Passes display buffer from application to codec
2156 *
2157 * @par Description:
2158 *  Adds display buffer to the codec
2159 *
2160 * @param[in] ps_codec_obj
2161 *  Pointer to codec object at API level
2162 *
2163 * @param[in] pv_api_ip
2164 *  Pointer to input argument structure
2165 *
2166 * @param[out] pv_api_op
2167 *  Pointer to output argument structure
2168 *
2169 * @returns  Status
2170 *
2171 * @remarks
2172 *
2173 *
2174 *******************************************************************************
2175 */
ihevcd_set_display_frame(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2176 WORD32 ihevcd_set_display_frame(iv_obj_t *ps_codec_obj,
2177                                 void *pv_api_ip,
2178                                 void *pv_api_op)
2179 {
2180     WORD32 ret = IV_SUCCESS;
2181 
2182     ivd_set_display_frame_ip_t *ps_dec_disp_ip;
2183     ivd_set_display_frame_op_t *ps_dec_disp_op;
2184 
2185     WORD32 i;
2186 
2187     codec_t *ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2188 
2189     ps_dec_disp_ip = (ivd_set_display_frame_ip_t *)pv_api_ip;
2190     ps_dec_disp_op = (ivd_set_display_frame_op_t *)pv_api_op;
2191 
2192     ps_codec->i4_num_disp_bufs = 0;
2193     if(ps_codec->i4_share_disp_buf)
2194     {
2195         UWORD32 num_bufs = ps_dec_disp_ip->num_disp_bufs;
2196         pic_buf_t *ps_pic_buf;
2197         UWORD8 *pu1_buf;
2198         WORD32 buf_ret;
2199 
2200         UWORD8 *pu1_chroma_buf = NULL;
2201         num_bufs = MIN(num_bufs, BUF_MGR_MAX_CNT);
2202         ps_codec->i4_num_disp_bufs = num_bufs;
2203 
2204         ps_pic_buf = (pic_buf_t *)ps_codec->ps_pic_buf;
2205 
2206         /* If color format is 420P, then allocate chroma buffers to hold semiplanar
2207          * chroma data */
2208         if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2209         {
2210             WORD32 num_samples = ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2211             WORD32 size = num_samples * num_bufs;
2212             void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
2213 
2214             pu1_chroma_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2215             RETURN_IF((NULL == pu1_chroma_buf), IV_FAIL);
2216 
2217             ps_codec->pu1_cur_chroma_ref_buf = pu1_chroma_buf;
2218         }
2219         for(i = 0; i < (WORD32)num_bufs; i++)
2220         {
2221             /* Stride is not available in some cases here.
2222                So store base pointers to buffer manager now,
2223                and update these pointers once header is decoded */
2224             pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[0];
2225             ps_pic_buf->pu1_luma = pu1_buf;
2226 
2227             if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2228             {
2229                 pu1_buf = pu1_chroma_buf;
2230                 pu1_chroma_buf += ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2231             }
2232             else
2233             {
2234                 /* For YUV 420SP case use display buffer itself as chroma ref buffer */
2235                 pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[1];
2236             }
2237 
2238             ps_pic_buf->pu1_chroma = pu1_buf;
2239 
2240             buf_ret = ihevc_buf_mgr_add((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_pic_buf, i);
2241 
2242             if(0 != buf_ret)
2243             {
2244                 ps_codec->i4_error_code = IHEVCD_BUF_MGR_ERROR;
2245                 return IHEVCD_BUF_MGR_ERROR;
2246             }
2247 
2248             /* Mark pic buf as needed for display */
2249             /* This ensures that till the buffer is explicitly passed to the codec,
2250              * application owns the buffer. Decoder is allowed to use a buffer only
2251              * when application sends it through fill this buffer call in OMX
2252              */
2253             ihevc_buf_mgr_set_status((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, i, BUF_MGR_DISP);
2254 
2255             ps_pic_buf++;
2256 
2257             /* Store display buffers in codec context. Needed for 420p output */
2258             memcpy(&ps_codec->s_disp_buffer[ps_codec->i4_share_disp_buf_cnt],
2259                    &ps_dec_disp_ip->s_disp_buffer[i],
2260                    sizeof(ps_dec_disp_ip->s_disp_buffer[i]));
2261 
2262             ps_codec->i4_share_disp_buf_cnt++;
2263 
2264         }
2265     }
2266 
2267     ps_dec_disp_op->u4_error_code = 0;
2268     return ret;
2269 
2270 }
2271 
2272 /**
2273 *******************************************************************************
2274 *
2275 * @brief
2276 *  Sets the decoder in flush mode. Decoder will come out of  flush only
2277 * after returning all the buffers or at reset
2278 *
2279 * @par Description:
2280 *  Sets the decoder in flush mode
2281 *
2282 * @param[in] ps_codec_obj
2283 *  Pointer to codec object at API level
2284 *
2285 * @param[in] pv_api_ip
2286 *  Pointer to input argument structure
2287 *
2288 * @param[out] pv_api_op
2289 *  Pointer to output argument structure
2290 *
2291 * @returns  Status
2292 *
2293 * @remarks
2294 *
2295 *
2296 *******************************************************************************
2297 */
ihevcd_set_flush_mode(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2298 WORD32 ihevcd_set_flush_mode(iv_obj_t *ps_codec_obj,
2299                              void *pv_api_ip,
2300                              void *pv_api_op)
2301 {
2302 
2303     codec_t *ps_codec;
2304     ivd_ctl_flush_op_t *ps_ctl_op = (ivd_ctl_flush_op_t *)pv_api_op;
2305     UNUSED(pv_api_ip);
2306     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2307 
2308     /* Signal flush frame control call */
2309     ps_codec->i4_flush_mode = 1;
2310 
2311     ps_ctl_op->u4_error_code = 0;
2312 
2313     /* Set pic count to zero, so that decoder starts buffering again */
2314     /* once it comes out of flush mode */
2315     ps_codec->u4_pic_cnt = 0;
2316     ps_codec->u4_disp_cnt = 0;
2317     return IV_SUCCESS;
2318 
2319 
2320 }
2321 
2322 /**
2323 *******************************************************************************
2324 *
2325 * @brief
2326 *  Gets decoder status and buffer requirements
2327 *
2328 * @par Description:
2329 *  Gets the decoder status
2330 *
2331 * @param[in] ps_codec_obj
2332 *  Pointer to codec object at API level
2333 *
2334 * @param[in] pv_api_ip
2335 *  Pointer to input argument structure
2336 *
2337 * @param[out] pv_api_op
2338 *  Pointer to output argument structure
2339 *
2340 * @returns  Status
2341 *
2342 * @remarks
2343 *
2344 *
2345 *******************************************************************************
2346 */
2347 
ihevcd_get_status(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2348 WORD32 ihevcd_get_status(iv_obj_t *ps_codec_obj,
2349                          void *pv_api_ip,
2350                          void *pv_api_op)
2351 {
2352 
2353     WORD32 i;
2354     codec_t *ps_codec;
2355     WORD32 wd, ht;
2356     ivd_ctl_getstatus_op_t *ps_ctl_op = (ivd_ctl_getstatus_op_t *)pv_api_op;
2357 
2358     UNUSED(pv_api_ip);
2359 
2360     ps_ctl_op->u4_error_code = 0;
2361 
2362     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2363 
2364     ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2365     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2366         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2367     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2368         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2369     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2370         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2371     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2372         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGBA8888;
2373     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2374                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2375         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2376 
2377     ps_ctl_op->u4_num_disp_bufs = 1;
2378 
2379     for(i = 0; i < (WORD32)ps_ctl_op->u4_min_num_in_bufs; i++)
2380     {
2381         wd = ALIGN64(ps_codec->i4_wd);
2382         ht = ALIGN64(ps_codec->i4_ht);
2383         ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2384     }
2385 
2386     wd = ps_codec->i4_wd;
2387     ht = ps_codec->i4_ht;
2388 
2389     if(ps_codec->i4_sps_done)
2390     {
2391         if(0 == ps_codec->i4_share_disp_buf)
2392         {
2393             wd = ps_codec->i4_disp_wd;
2394             ht = ps_codec->i4_disp_ht;
2395 
2396         }
2397         else
2398         {
2399             wd = ps_codec->i4_disp_strd;
2400             ht = ps_codec->i4_ht + PAD_HT;
2401         }
2402     }
2403 
2404     if(ps_codec->i4_disp_strd > wd)
2405         wd = ps_codec->i4_disp_strd;
2406 
2407     if(0 == ps_codec->i4_share_disp_buf)
2408         ps_ctl_op->u4_num_disp_bufs = 1;
2409     else
2410     {
2411         if(ps_codec->i4_sps_done)
2412         {
2413             sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2414             WORD32 reorder_pic_cnt, ref_pic_cnt;
2415             reorder_pic_cnt = 0;
2416             if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2417                 reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2418             ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2419 
2420             ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2421 
2422             ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2423         }
2424         else
2425         {
2426             ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2427         }
2428 
2429         ps_ctl_op->u4_num_disp_bufs = MIN(
2430                         ps_ctl_op->u4_num_disp_bufs, 32);
2431     }
2432 
2433     /*!*/
2434     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2435     {
2436         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2437         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2438         ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2439     }
2440     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2441     {
2442         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2443         ps_ctl_op->u4_min_out_buf_size[1] =
2444                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2445     }
2446     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2447     {
2448         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2449         ps_ctl_op->u4_min_out_buf_size[1] =
2450                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2451     }
2452     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2453     {
2454         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 4;
2455         ps_ctl_op->u4_min_out_buf_size[1] =
2456                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2457     }
2458     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2459                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2460     {
2461         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2462         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2463         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2464     }
2465     ps_ctl_op->u4_pic_ht = ht;
2466     ps_ctl_op->u4_pic_wd = wd;
2467     ps_ctl_op->u4_frame_rate = 30000;
2468     ps_ctl_op->u4_bit_rate = 1000000;
2469     ps_ctl_op->e_content_type = IV_PROGRESSIVE;
2470     ps_ctl_op->e_output_chroma_format = ps_codec->e_chroma_fmt;
2471     ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2472 
2473     if(ps_ctl_op->u4_size == sizeof(ihevcd_cxa_ctl_getstatus_op_t))
2474     {
2475         ihevcd_cxa_ctl_getstatus_op_t *ps_ext_ctl_op = (ihevcd_cxa_ctl_getstatus_op_t *)ps_ctl_op;
2476         ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_wd;
2477         ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_ht;
2478     }
2479     return IV_SUCCESS;
2480 }
2481 /**
2482 *******************************************************************************
2483 *
2484 * @brief
2485 *  Gets decoder buffer requirements
2486 *
2487 * @par Description:
2488 *  Gets the decoder buffer requirements. If called before  header decoder,
2489 * buffer requirements are based on max_wd  and max_ht else actual width and
2490 * height will be used
2491 *
2492 * @param[in] ps_codec_obj
2493 *  Pointer to codec object at API level
2494 *
2495 * @param[in] pv_api_ip
2496 *  Pointer to input argument structure
2497 *
2498 * @param[out] pv_api_op
2499 *  Pointer to output argument structure
2500 *
2501 * @returns  Status
2502 *
2503 * @remarks
2504 *
2505 *
2506 *******************************************************************************
2507 */
ihevcd_get_buf_info(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2508 WORD32 ihevcd_get_buf_info(iv_obj_t *ps_codec_obj,
2509                            void *pv_api_ip,
2510                            void *pv_api_op)
2511 {
2512 
2513     codec_t *ps_codec;
2514     UWORD32 i = 0;
2515     WORD32 wd, ht;
2516     ivd_ctl_getbufinfo_op_t *ps_ctl_op =
2517                     (ivd_ctl_getbufinfo_op_t *)pv_api_op;
2518 
2519     UNUSED(pv_api_ip);
2520     ps_ctl_op->u4_error_code = 0;
2521 
2522     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2523 
2524     ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2525     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2526         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2527     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2528         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2529     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2530         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2531     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2532         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGBA8888;
2533     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2534                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2535         ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2536 
2537     ps_ctl_op->u4_num_disp_bufs = 1;
2538 
2539     for(i = 0; i < ps_ctl_op->u4_min_num_in_bufs; i++)
2540     {
2541         wd = ALIGN64(ps_codec->i4_wd);
2542         ht = ALIGN64(ps_codec->i4_ht);
2543 
2544         ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2545     }
2546 
2547     wd = 0;
2548     ht = 0;
2549 
2550     if(ps_codec->i4_sps_done)
2551     {
2552         if(0 == ps_codec->i4_share_disp_buf)
2553         {
2554             wd = ps_codec->i4_disp_wd;
2555             ht = ps_codec->i4_disp_ht;
2556 
2557         }
2558         else
2559         {
2560             wd = ps_codec->i4_disp_strd;
2561             ht = ps_codec->i4_ht + PAD_HT;
2562         }
2563     }
2564     else
2565     {
2566         if(1 == ps_codec->i4_share_disp_buf)
2567         {
2568             wd = ALIGN32(wd + PAD_WD);
2569             ht += PAD_HT;
2570         }
2571     }
2572 
2573     if(ps_codec->i4_disp_strd > wd)
2574         wd = ps_codec->i4_disp_strd;
2575 
2576     if(0 == ps_codec->i4_share_disp_buf)
2577         ps_ctl_op->u4_num_disp_bufs = 1;
2578     else
2579     {
2580         if(ps_codec->i4_sps_done)
2581         {
2582             sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2583             WORD32 reorder_pic_cnt, ref_pic_cnt;
2584             reorder_pic_cnt = 0;
2585             if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2586                 reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2587             ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2588 
2589             ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2590 
2591             ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2592         }
2593         else
2594         {
2595             ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2596         }
2597 
2598         ps_ctl_op->u4_num_disp_bufs = MIN(
2599                         ps_ctl_op->u4_num_disp_bufs, 32);
2600 
2601     }
2602 
2603     /*!*/
2604     if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2605     {
2606         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2607         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2608         ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2609     }
2610     else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2611     {
2612         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2613         ps_ctl_op->u4_min_out_buf_size[1] =
2614                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2615     }
2616     else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2617     {
2618         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2619         ps_ctl_op->u4_min_out_buf_size[1] =
2620                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2621     }
2622     else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2623     {
2624         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 4;
2625         ps_ctl_op->u4_min_out_buf_size[1] =
2626                         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2627     }
2628     else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2629                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2630     {
2631         ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2632         ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2633         ps_ctl_op->u4_min_out_buf_size[2] = 0;
2634     }
2635     ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2636 
2637     return IV_SUCCESS;
2638 }
2639 
2640 
2641 /**
2642 *******************************************************************************
2643 *
2644 * @brief
2645 *  Sets dynamic parameters
2646 *
2647 * @par Description:
2648 *  Sets dynamic parameters. Note Frame skip, decode header  mode are dynamic
2649 *  Dynamic change in stride is not  supported
2650 *
2651 * @param[in] ps_codec_obj
2652 *  Pointer to codec object at API level
2653 *
2654 * @param[in] pv_api_ip
2655 *  Pointer to input argument structure
2656 *
2657 * @param[out] pv_api_op
2658 *  Pointer to output argument structure
2659 *
2660 * @returns  Status
2661 *
2662 * @remarks
2663 *
2664 *
2665 *******************************************************************************
2666 */
ihevcd_set_params(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2667 WORD32 ihevcd_set_params(iv_obj_t *ps_codec_obj,
2668                          void *pv_api_ip,
2669                          void *pv_api_op)
2670 {
2671 
2672     codec_t *ps_codec;
2673     WORD32 ret = IV_SUCCESS;
2674     WORD32 strd;
2675     ivd_ctl_set_config_ip_t *s_ctl_dynparams_ip =
2676                     (ivd_ctl_set_config_ip_t *)pv_api_ip;
2677     ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
2678                     (ivd_ctl_set_config_op_t *)pv_api_op;
2679 
2680     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2681 
2682     s_ctl_dynparams_op->u4_error_code = 0;
2683 
2684     ps_codec->e_pic_skip_mode = s_ctl_dynparams_ip->e_frm_skip_mode;
2685 
2686     if(s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_NONE)
2687     {
2688 
2689         if((s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_P) &&
2690            (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_B) &&
2691            (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_PB))
2692         {
2693             s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2694             ret = IV_FAIL;
2695         }
2696     }
2697 
2698     strd = ps_codec->i4_disp_strd;
2699     if(1 == ps_codec->i4_share_disp_buf)
2700     {
2701         strd = ps_codec->i4_strd;
2702     }
2703 
2704 
2705     {
2706         if((WORD32)s_ctl_dynparams_ip->u4_disp_wd >= ps_codec->i4_disp_wd)
2707         {
2708             strd = s_ctl_dynparams_ip->u4_disp_wd;
2709         }
2710         else if(0 == ps_codec->i4_sps_done)
2711         {
2712             strd = s_ctl_dynparams_ip->u4_disp_wd;
2713         }
2714         else if(s_ctl_dynparams_ip->u4_disp_wd == 0)
2715         {
2716             strd = ps_codec->i4_disp_strd;
2717         }
2718         else
2719         {
2720             strd = 0;
2721             s_ctl_dynparams_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
2722             s_ctl_dynparams_op->u4_error_code |= IHEVCD_INVALID_DISP_STRD;
2723             ret = IV_FAIL;
2724         }
2725     }
2726 
2727     ps_codec->i4_disp_strd = strd;
2728     if(1 == ps_codec->i4_share_disp_buf)
2729     {
2730         ps_codec->i4_strd = strd;
2731     }
2732 
2733     if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_FRAME)
2734         ps_codec->i4_header_mode = 0;
2735     else if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_HEADER)
2736         ps_codec->i4_header_mode = 1;
2737     else
2738     {
2739 
2740         s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2741         ps_codec->i4_header_mode = 1;
2742         ret = IV_FAIL;
2743     }
2744 
2745     ps_codec->e_frm_out_mode = IVD_DISPLAY_FRAME_OUT;
2746 
2747     if((s_ctl_dynparams_ip->e_frm_out_mode != IVD_DECODE_FRAME_OUT) &&
2748        (s_ctl_dynparams_ip->e_frm_out_mode != IVD_DISPLAY_FRAME_OUT))
2749     {
2750         s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2751         ret = IV_FAIL;
2752     }
2753     ps_codec->e_frm_out_mode = s_ctl_dynparams_ip->e_frm_out_mode;
2754 
2755     return ret;
2756 
2757 }
2758 /**
2759 *******************************************************************************
2760 *
2761 * @brief
2762 *  Resets the decoder state
2763 *
2764 * @par Description:
2765 *  Resets the decoder state by calling ihevcd_init()
2766 *
2767 * @param[in] ps_codec_obj
2768 *  Pointer to codec object at API level
2769 *
2770 * @param[in] pv_api_ip
2771 *  Pointer to input argument structure
2772 *
2773 * @param[out] pv_api_op
2774 *  Pointer to output argument structure
2775 *
2776 * @returns  Status
2777 *
2778 * @remarks
2779 *
2780 *
2781 *******************************************************************************
2782 */
ihevcd_reset(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2783 WORD32 ihevcd_reset(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
2784 {
2785     codec_t *ps_codec;
2786     ivd_ctl_reset_op_t *s_ctl_reset_op = (ivd_ctl_reset_op_t *)pv_api_op;
2787     UNUSED(pv_api_ip);
2788     ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2789 
2790     if(ps_codec != NULL)
2791     {
2792         DEBUG("\nReset called \n");
2793         ihevcd_init(ps_codec);
2794     }
2795     else
2796     {
2797         DEBUG("\nReset called without Initializing the decoder\n");
2798         s_ctl_reset_op->u4_error_code = IHEVCD_INIT_NOT_DONE;
2799     }
2800 
2801     return IV_SUCCESS;
2802 }
2803 
2804 /**
2805 *******************************************************************************
2806 *
2807 * @brief
2808 *  Releases display buffer from application to codec  to signal to the codec
2809 * that it can write to this buffer  if required. Till release is called,
2810 * codec can not write  to this buffer
2811 *
2812 * @par Description:
2813 *  Marks the buffer as display done
2814 *
2815 * @param[in] ps_codec_obj
2816 *  Pointer to codec object at API level
2817 *
2818 * @param[in] pv_api_ip
2819 *  Pointer to input argument structure
2820 *
2821 * @param[out] pv_api_op
2822 *  Pointer to output argument structure
2823 *
2824 * @returns  Status
2825 *
2826 * @remarks
2827 *
2828 *
2829 *******************************************************************************
2830 */
2831 
ihevcd_rel_display_frame(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2832 WORD32 ihevcd_rel_display_frame(iv_obj_t *ps_codec_obj,
2833                                 void *pv_api_ip,
2834                                 void *pv_api_op)
2835 {
2836 
2837     ivd_rel_display_frame_ip_t *ps_dec_rel_disp_ip;
2838     ivd_rel_display_frame_op_t *ps_dec_rel_disp_op;
2839 
2840     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2841 
2842     ps_dec_rel_disp_ip = (ivd_rel_display_frame_ip_t *)pv_api_ip;
2843     ps_dec_rel_disp_op = (ivd_rel_display_frame_op_t *)pv_api_op;
2844 
2845     UNUSED(ps_dec_rel_disp_op);
2846 
2847     if(0 == ps_codec->i4_share_disp_buf)
2848     {
2849         return IV_SUCCESS;
2850     }
2851 
2852     ihevc_buf_mgr_release((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_dec_rel_disp_ip->u4_disp_buf_id, BUF_MGR_DISP);
2853 
2854     return IV_SUCCESS;
2855 }
2856 /**
2857 *******************************************************************************
2858 *
2859 * @brief
2860 *  Sets degrade params
2861 *
2862 * @par Description:
2863 *  Sets degrade params.
2864 *  Refer to ihevcd_cxa_ctl_degrade_ip_t definition for details
2865 *
2866 * @param[in] ps_codec_obj
2867 *  Pointer to codec object at API level
2868 *
2869 * @param[in] pv_api_ip
2870 *  Pointer to input argument structure
2871 *
2872 * @param[out] pv_api_op
2873 *  Pointer to output argument structure
2874 *
2875 * @returns  Status
2876 *
2877 * @remarks
2878 *
2879 *
2880 *******************************************************************************
2881 */
2882 
ihevcd_set_degrade(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2883 WORD32 ihevcd_set_degrade(iv_obj_t *ps_codec_obj,
2884                           void *pv_api_ip,
2885                           void *pv_api_op)
2886 {
2887     ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
2888     ihevcd_cxa_ctl_degrade_op_t *ps_op;
2889     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2890 
2891     ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
2892     ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
2893 
2894     ps_codec->i4_degrade_type = ps_ip->i4_degrade_type;
2895     ps_codec->i4_nondegrade_interval = ps_ip->i4_nondegrade_interval;
2896     ps_codec->i4_degrade_pics = ps_ip->i4_degrade_pics;
2897 
2898     ps_op->u4_error_code = 0;
2899     ps_codec->i4_degrade_pic_cnt = 0;
2900 
2901     return IV_SUCCESS;
2902 }
2903 
2904 
2905 /**
2906 *******************************************************************************
2907 *
2908 * @brief
2909 *  Gets frame dimensions/offsets
2910 *
2911 * @par Description:
2912 *  Gets frame buffer chararacteristics such a x & y offsets  display and
2913 * buffer dimensions
2914 *
2915 * @param[in] ps_codec_obj
2916 *  Pointer to codec object at API level
2917 *
2918 * @param[in] pv_api_ip
2919 *  Pointer to input argument structure
2920 *
2921 * @param[out] pv_api_op
2922 *  Pointer to output argument structure
2923 *
2924 * @returns  Status
2925 *
2926 * @remarks
2927 *
2928 *
2929 *******************************************************************************
2930 */
2931 
ihevcd_get_frame_dimensions(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)2932 WORD32 ihevcd_get_frame_dimensions(iv_obj_t *ps_codec_obj,
2933                                    void *pv_api_ip,
2934                                    void *pv_api_op)
2935 {
2936     ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
2937     ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
2938     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2939     WORD32 disp_wd, disp_ht, buffer_wd, buffer_ht, x_offset, y_offset;
2940     ps_ip = (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
2941     ps_op = (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
2942     UNUSED(ps_ip);
2943     if(ps_codec->i4_sps_done)
2944     {
2945         disp_wd = ps_codec->i4_disp_wd;
2946         disp_ht = ps_codec->i4_disp_ht;
2947 
2948         if(0 == ps_codec->i4_share_disp_buf)
2949         {
2950             buffer_wd = disp_wd;
2951             buffer_ht = disp_ht;
2952         }
2953         else
2954         {
2955             buffer_wd = ps_codec->i4_strd;
2956             buffer_ht = ps_codec->i4_ht + PAD_HT;
2957         }
2958     }
2959     else
2960     {
2961 
2962         disp_wd = 0;
2963         disp_ht = 0;
2964 
2965         if(0 == ps_codec->i4_share_disp_buf)
2966         {
2967             buffer_wd = disp_wd;
2968             buffer_ht = disp_ht;
2969         }
2970         else
2971         {
2972             buffer_wd = ALIGN16(disp_wd) + PAD_WD;
2973             buffer_ht = ALIGN16(disp_ht) + PAD_HT;
2974 
2975         }
2976     }
2977     if(ps_codec->i4_strd > buffer_wd)
2978         buffer_wd = ps_codec->i4_strd;
2979 
2980     if(0 == ps_codec->i4_share_disp_buf)
2981     {
2982         x_offset = 0;
2983         y_offset = 0;
2984     }
2985     else
2986     {
2987         y_offset = PAD_TOP;
2988         x_offset = PAD_LEFT;
2989     }
2990 
2991     ps_op->u4_disp_wd[0] = disp_wd;
2992     ps_op->u4_disp_ht[0] = disp_ht;
2993     ps_op->u4_buffer_wd[0] = buffer_wd;
2994     ps_op->u4_buffer_ht[0] = buffer_ht;
2995     ps_op->u4_x_offset[0] = x_offset;
2996     ps_op->u4_y_offset[0] = y_offset;
2997 
2998     ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ((ps_op->u4_disp_wd[0] + 1)
2999                     >> 1);
3000     ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ((ps_op->u4_disp_ht[0] + 1)
3001                     >> 1);
3002     ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = (ps_op->u4_buffer_wd[0]
3003                     >> 1);
3004     ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = (ps_op->u4_buffer_ht[0]
3005                     >> 1);
3006     ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = (ps_op->u4_x_offset[0]
3007                     >> 1);
3008     ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = (ps_op->u4_y_offset[0]
3009                     >> 1);
3010 
3011     if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
3012                     || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
3013     {
3014         ps_op->u4_disp_wd[2] = 0;
3015         ps_op->u4_disp_ht[2] = 0;
3016         ps_op->u4_buffer_wd[2] = 0;
3017         ps_op->u4_buffer_ht[2] = 0;
3018         ps_op->u4_x_offset[2] = 0;
3019         ps_op->u4_y_offset[2] = 0;
3020 
3021         ps_op->u4_disp_wd[1] <<= 1;
3022         ps_op->u4_buffer_wd[1] <<= 1;
3023         ps_op->u4_x_offset[1] <<= 1;
3024     }
3025 
3026     return IV_SUCCESS;
3027 
3028 }
3029 
3030 
3031 /**
3032 *******************************************************************************
3033 *
3034 * @brief
3035 *  Gets vui parameters
3036 *
3037 * @par Description:
3038 *  Gets VUI parameters
3039 *
3040 * @param[in] ps_codec_obj
3041 *  Pointer to codec object at API level
3042 *
3043 * @param[in] pv_api_ip
3044 *  Pointer to input argument structure
3045 *
3046 * @param[out] pv_api_op
3047 *  Pointer to output argument structure
3048 *
3049 * @returns  Status
3050 *
3051 * @remarks
3052 *
3053 *
3054 *******************************************************************************
3055 */
ihevcd_get_vui_params(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3056 WORD32 ihevcd_get_vui_params(iv_obj_t *ps_codec_obj,
3057                              void *pv_api_ip,
3058                              void *pv_api_op)
3059 {
3060     ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
3061     ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
3062     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3063     sps_t *ps_sps;
3064     vui_t *ps_vui;
3065     WORD32 i;
3066 
3067     ps_ip = (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
3068     ps_op = (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
3069 
3070     if(0 == ps_codec->i4_sps_done)
3071     {
3072         ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3073         return IV_FAIL;
3074     }
3075 
3076     ps_sps = ps_codec->s_parse.ps_sps;
3077     if(0 == ps_sps->i1_sps_valid || 0 == ps_sps->i1_vui_parameters_present_flag)
3078     {
3079         WORD32 sps_idx = 0;
3080         ps_sps = ps_codec->ps_sps_base;
3081 
3082         while((0 == ps_sps->i1_sps_valid) || (0 == ps_sps->i1_vui_parameters_present_flag))
3083         {
3084             sps_idx++;
3085             ps_sps++;
3086 
3087             if(sps_idx == MAX_SPS_CNT - 1)
3088             {
3089                 ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3090                 return IV_FAIL;
3091             }
3092         }
3093     }
3094 
3095     ps_vui = &ps_sps->s_vui_parameters;
3096     UNUSED(ps_ip);
3097 
3098     ps_op->u1_aspect_ratio_info_present_flag         =  ps_vui->u1_aspect_ratio_info_present_flag;
3099     ps_op->u1_aspect_ratio_idc                       =  ps_vui->u1_aspect_ratio_idc;
3100     ps_op->u2_sar_width                              =  ps_vui->u2_sar_width;
3101     ps_op->u2_sar_height                             =  ps_vui->u2_sar_height;
3102     ps_op->u1_overscan_info_present_flag             =  ps_vui->u1_overscan_info_present_flag;
3103     ps_op->u1_overscan_appropriate_flag              =  ps_vui->u1_overscan_appropriate_flag;
3104     ps_op->u1_video_signal_type_present_flag         =  ps_vui->u1_video_signal_type_present_flag;
3105     ps_op->u1_video_format                           =  ps_vui->u1_video_format;
3106     ps_op->u1_video_full_range_flag                  =  ps_vui->u1_video_full_range_flag;
3107     ps_op->u1_colour_description_present_flag        =  ps_vui->u1_colour_description_present_flag;
3108     ps_op->u1_colour_primaries                       =  ps_vui->u1_colour_primaries;
3109     ps_op->u1_transfer_characteristics               =  ps_vui->u1_transfer_characteristics;
3110     ps_op->u1_matrix_coefficients                    =  ps_vui->u1_matrix_coefficients;
3111     ps_op->u1_chroma_loc_info_present_flag           =  ps_vui->u1_chroma_loc_info_present_flag;
3112     ps_op->u1_chroma_sample_loc_type_top_field       =  ps_vui->u1_chroma_sample_loc_type_top_field;
3113     ps_op->u1_chroma_sample_loc_type_bottom_field    =  ps_vui->u1_chroma_sample_loc_type_bottom_field;
3114     ps_op->u1_neutral_chroma_indication_flag         =  ps_vui->u1_neutral_chroma_indication_flag;
3115     ps_op->u1_field_seq_flag                         =  ps_vui->u1_field_seq_flag;
3116     ps_op->u1_frame_field_info_present_flag          =  ps_vui->u1_frame_field_info_present_flag;
3117     ps_op->u1_default_display_window_flag            =  ps_vui->u1_default_display_window_flag;
3118     ps_op->u4_def_disp_win_left_offset               =  ps_vui->u4_def_disp_win_left_offset;
3119     ps_op->u4_def_disp_win_right_offset              =  ps_vui->u4_def_disp_win_right_offset;
3120     ps_op->u4_def_disp_win_top_offset                =  ps_vui->u4_def_disp_win_top_offset;
3121     ps_op->u4_def_disp_win_bottom_offset             =  ps_vui->u4_def_disp_win_bottom_offset;
3122     ps_op->u1_vui_hrd_parameters_present_flag        =  ps_vui->u1_vui_hrd_parameters_present_flag;
3123     ps_op->u1_vui_timing_info_present_flag           =  ps_vui->u1_vui_timing_info_present_flag;
3124     ps_op->u4_vui_num_units_in_tick                  =  ps_vui->u4_vui_num_units_in_tick;
3125     ps_op->u4_vui_time_scale                         =  ps_vui->u4_vui_time_scale;
3126     ps_op->u1_poc_proportional_to_timing_flag        =  ps_vui->u1_poc_proportional_to_timing_flag;
3127     ps_op->u1_num_ticks_poc_diff_one_minus1          =  ps_vui->u1_num_ticks_poc_diff_one_minus1;
3128     ps_op->u1_bitstream_restriction_flag             =  ps_vui->u1_bitstream_restriction_flag;
3129     ps_op->u1_tiles_fixed_structure_flag             =  ps_vui->u1_tiles_fixed_structure_flag;
3130     ps_op->u1_motion_vectors_over_pic_boundaries_flag =  ps_vui->u1_motion_vectors_over_pic_boundaries_flag;
3131     ps_op->u1_restricted_ref_pic_lists_flag          =  ps_vui->u1_restricted_ref_pic_lists_flag;
3132     ps_op->u4_min_spatial_segmentation_idc           =  ps_vui->u4_min_spatial_segmentation_idc;
3133     ps_op->u1_max_bytes_per_pic_denom                =  ps_vui->u1_max_bytes_per_pic_denom;
3134     ps_op->u1_max_bits_per_mincu_denom               =  ps_vui->u1_max_bits_per_mincu_denom;
3135     ps_op->u1_log2_max_mv_length_horizontal          =  ps_vui->u1_log2_max_mv_length_horizontal;
3136     ps_op->u1_log2_max_mv_length_vertical            =  ps_vui->u1_log2_max_mv_length_vertical;
3137 
3138 
3139     /* HRD parameters */
3140     ps_op->u1_timing_info_present_flag                         =    ps_vui->s_vui_hrd_parameters.u1_timing_info_present_flag;
3141     ps_op->u4_num_units_in_tick                                =    ps_vui->s_vui_hrd_parameters.u4_num_units_in_tick;
3142     ps_op->u4_time_scale                                       =    ps_vui->s_vui_hrd_parameters.u4_time_scale;
3143     ps_op->u1_nal_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_nal_hrd_parameters_present_flag;
3144     ps_op->u1_vcl_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_vcl_hrd_parameters_present_flag;
3145     ps_op->u1_cpbdpb_delays_present_flag                       =    ps_vui->s_vui_hrd_parameters.u1_cpbdpb_delays_present_flag;
3146     ps_op->u1_sub_pic_cpb_params_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_present_flag;
3147     ps_op->u1_tick_divisor_minus2                              =    ps_vui->s_vui_hrd_parameters.u1_tick_divisor_minus2;
3148     ps_op->u1_du_cpb_removal_delay_increment_length_minus1     =    ps_vui->s_vui_hrd_parameters.u1_du_cpb_removal_delay_increment_length_minus1;
3149     ps_op->u1_sub_pic_cpb_params_in_pic_timing_sei_flag        =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_in_pic_timing_sei_flag;
3150     ps_op->u1_dpb_output_delay_du_length_minus1                =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_du_length_minus1;
3151     ps_op->u4_bit_rate_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_bit_rate_scale;
3152     ps_op->u4_cpb_size_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_scale;
3153     ps_op->u4_cpb_size_du_scale                                =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_du_scale;
3154     ps_op->u1_initial_cpb_removal_delay_length_minus1          =    ps_vui->s_vui_hrd_parameters.u1_initial_cpb_removal_delay_length_minus1;
3155     ps_op->u1_au_cpb_removal_delay_length_minus1               =    ps_vui->s_vui_hrd_parameters.u1_au_cpb_removal_delay_length_minus1;
3156     ps_op->u1_dpb_output_delay_length_minus1                   =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_length_minus1;
3157 
3158     for(i = 0; i < 6; i++)
3159     {
3160         ps_op->au1_fixed_pic_rate_general_flag[i]                  =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_general_flag[i];
3161         ps_op->au1_fixed_pic_rate_within_cvs_flag[i]               =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_within_cvs_flag[i];
3162         ps_op->au1_elemental_duration_in_tc_minus1[i]              =    ps_vui->s_vui_hrd_parameters.au1_elemental_duration_in_tc_minus1[i];
3163         ps_op->au1_low_delay_hrd_flag[i]                           =    ps_vui->s_vui_hrd_parameters.au1_low_delay_hrd_flag[i];
3164         ps_op->au1_cpb_cnt_minus1[i]                               =    ps_vui->s_vui_hrd_parameters.au1_cpb_cnt_minus1[i];
3165     }
3166 
3167 
3168     return IV_SUCCESS;
3169 }
3170 
3171 /**
3172 *******************************************************************************
3173 *
3174 * @brief
3175 *  Gets SEI mastering display color volume parameters
3176 *
3177 * @par Description:
3178 *  Gets SEI mastering display color volume parameters
3179 *
3180 * @param[in] ps_codec_obj
3181 *  Pointer to codec object at API level
3182 *
3183 * @param[in] pv_api_ip
3184 *  Pointer to input argument structure
3185 *
3186 * @param[out] pv_api_op
3187 *  Pointer to output argument structure
3188 *
3189 * @returns  Status
3190 *
3191 * @remarks
3192 *
3193 *
3194 *******************************************************************************
3195 */
ihevcd_get_sei_mastering_params(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3196 WORD32 ihevcd_get_sei_mastering_params(iv_obj_t *ps_codec_obj,
3197                              void *pv_api_ip,
3198                              void *pv_api_op)
3199 {
3200     ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
3201     ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
3202     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3203     sei_params_t *ps_sei;
3204     mastering_dis_col_vol_sei_params_t *ps_mastering_dis_col_vol;
3205     WORD32 i;
3206 
3207     ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
3208     ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
3209     UNUSED(ps_ip);
3210     if(NULL == ps_codec->ps_disp_buf)
3211     {
3212         ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3213         return IV_FAIL;
3214     }
3215     ps_sei = &ps_codec->ps_disp_buf->s_sei_params;
3216     if((0 == ps_sei->i4_sei_mastering_disp_colour_vol_params_present_flags)
3217                     || (0 == ps_sei->i1_sei_parameters_present_flag))
3218     {
3219         ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3220         return IV_FAIL;
3221     }
3222 
3223     ps_mastering_dis_col_vol = &ps_sei->s_mastering_dis_col_vol_sei_params;
3224 
3225     for(i = 0; i < 3; i++)
3226     {
3227         ps_op->au2_display_primaries_x[i] =
3228                     ps_mastering_dis_col_vol->au2_display_primaries_x[i];
3229 
3230         ps_op->au2_display_primaries_y[i] =
3231                     ps_mastering_dis_col_vol->au2_display_primaries_y[i];
3232     }
3233 
3234     ps_op->u2_white_point_x = ps_mastering_dis_col_vol->u2_white_point_x;
3235 
3236     ps_op->u2_white_point_y = ps_mastering_dis_col_vol->u2_white_point_y;
3237 
3238     ps_op->u4_max_display_mastering_luminance =
3239                     ps_mastering_dis_col_vol->u4_max_display_mastering_luminance;
3240 
3241     ps_op->u4_min_display_mastering_luminance =
3242                     ps_mastering_dis_col_vol->u4_min_display_mastering_luminance;
3243 
3244     return IV_SUCCESS;
3245 }
3246 
3247 /**
3248 *******************************************************************************
3249 *
3250 * @brief
3251 *  Sets Processor type
3252 *
3253 * @par Description:
3254 *  Sets Processor type
3255 *
3256 * @param[in] ps_codec_obj
3257 *  Pointer to codec object at API level
3258 *
3259 * @param[in] pv_api_ip
3260 *  Pointer to input argument structure
3261 *
3262 * @param[out] pv_api_op
3263 *  Pointer to output argument structure
3264 *
3265 * @returns  Status
3266 *
3267 * @remarks
3268 *
3269 *
3270 *******************************************************************************
3271 */
3272 
ihevcd_set_processor(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3273 WORD32 ihevcd_set_processor(iv_obj_t *ps_codec_obj,
3274                             void *pv_api_ip,
3275                             void *pv_api_op)
3276 {
3277     ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
3278     ihevcd_cxa_ctl_set_processor_op_t *ps_op;
3279     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3280 
3281     ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
3282     ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
3283 
3284     ps_codec->e_processor_arch = (IVD_ARCH_T)ps_ip->u4_arch;
3285     ps_codec->e_processor_soc = (IVD_SOC_T)ps_ip->u4_soc;
3286 
3287     ihevcd_init_function_ptr(ps_codec);
3288 
3289     ihevcd_update_function_ptr(ps_codec);
3290 
3291     if(ps_codec->e_processor_soc && (ps_codec->e_processor_soc <= SOC_HISI_37X))
3292     {
3293         /* 8th bit indicates if format conversion is to be done ahead */
3294         if(ps_codec->e_processor_soc & 0x80)
3295             ps_codec->u4_enable_fmt_conv_ahead = 1;
3296 
3297         /* Lower 7 bit indicate NCTB - if non-zero */
3298         ps_codec->e_processor_soc &= 0x7F;
3299 
3300         if(ps_codec->e_processor_soc)
3301             ps_codec->u4_nctb = ps_codec->e_processor_soc;
3302 
3303 
3304     }
3305 
3306     if((ps_codec->e_processor_soc == SOC_HISI_37X) && (ps_codec->i4_num_cores == 2))
3307     {
3308         ps_codec->u4_nctb = 2;
3309     }
3310 
3311 
3312     ps_op->u4_error_code = 0;
3313     return IV_SUCCESS;
3314 }
3315 
3316 /**
3317 *******************************************************************************
3318 *
3319 * @brief
3320 *  Sets Number of cores that can be used in the codec. Codec uses these many
3321 * threads for decoding
3322 *
3323 * @par Description:
3324 *  Sets number of cores
3325 *
3326 * @param[in] ps_codec_obj
3327 *  Pointer to codec object at API level
3328 *
3329 * @param[in] pv_api_ip
3330 *  Pointer to input argument structure
3331 *
3332 * @param[out] pv_api_op
3333 *  Pointer to output argument structure
3334 *
3335 * @returns  Status
3336 *
3337 * @remarks
3338 *
3339 *
3340 *******************************************************************************
3341 */
3342 
ihevcd_set_num_cores(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3343 WORD32 ihevcd_set_num_cores(iv_obj_t *ps_codec_obj,
3344                             void *pv_api_ip,
3345                             void *pv_api_op)
3346 {
3347     ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
3348     ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
3349     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3350 
3351     ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
3352     ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
3353 
3354 #ifdef MULTICORE
3355     ps_codec->i4_num_cores = ps_ip->u4_num_cores;
3356 #else
3357     ps_codec->i4_num_cores = 1;
3358 #endif
3359     ps_op->u4_error_code = 0;
3360     return IV_SUCCESS;
3361 }
3362 /**
3363 *******************************************************************************
3364 *
3365 * @brief
3366 *  Codec control call
3367 *
3368 * @par Description:
3369 *  Codec control call which in turn calls appropriate calls  based on
3370 * subcommand
3371 *
3372 * @param[in] ps_codec_obj
3373 *  Pointer to codec object at API level
3374 *
3375 * @param[in] pv_api_ip
3376 *  Pointer to input argument structure
3377 *
3378 * @param[out] pv_api_op
3379 *  Pointer to output argument structure
3380 *
3381 * @returns  Status
3382 *
3383 * @remarks
3384 *
3385 *
3386 *******************************************************************************
3387 */
3388 
ihevcd_ctl(iv_obj_t * ps_codec_obj,void * pv_api_ip,void * pv_api_op)3389 WORD32 ihevcd_ctl(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
3390 {
3391     ivd_ctl_set_config_ip_t *ps_ctl_ip;
3392     ivd_ctl_set_config_op_t *ps_ctl_op;
3393     WORD32 ret = 0;
3394     WORD32 subcommand;
3395     codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3396 
3397     ps_ctl_ip = (ivd_ctl_set_config_ip_t *)pv_api_ip;
3398     ps_ctl_op = (ivd_ctl_set_config_op_t *)pv_api_op;
3399 
3400     if(ps_codec->i4_init_done != 1)
3401     {
3402         ps_ctl_op->u4_error_code |= 1 << IVD_FATALERROR;
3403         ps_ctl_op->u4_error_code |= IHEVCD_INIT_NOT_DONE;
3404         return IV_FAIL;
3405     }
3406     subcommand = ps_ctl_ip->e_sub_cmd;
3407 
3408     switch(subcommand)
3409     {
3410         case IVD_CMD_CTL_GETPARAMS:
3411             ret = ihevcd_get_status(ps_codec_obj, (void *)pv_api_ip,
3412                                     (void *)pv_api_op);
3413             break;
3414         case IVD_CMD_CTL_SETPARAMS:
3415             ret = ihevcd_set_params(ps_codec_obj, (void *)pv_api_ip,
3416                                     (void *)pv_api_op);
3417             break;
3418         case IVD_CMD_CTL_RESET:
3419             ret = ihevcd_reset(ps_codec_obj, (void *)pv_api_ip,
3420                                (void *)pv_api_op);
3421             break;
3422         case IVD_CMD_CTL_SETDEFAULT:
3423         {
3424             ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
3425                             (ivd_ctl_set_config_op_t *)pv_api_op;
3426 
3427             ret = ihevcd_set_default_params(ps_codec);
3428             if(IV_SUCCESS == ret)
3429                 s_ctl_dynparams_op->u4_error_code = 0;
3430             break;
3431         }
3432         case IVD_CMD_CTL_FLUSH:
3433             ret = ihevcd_set_flush_mode(ps_codec_obj, (void *)pv_api_ip,
3434                                         (void *)pv_api_op);
3435             break;
3436         case IVD_CMD_CTL_GETBUFINFO:
3437             ret = ihevcd_get_buf_info(ps_codec_obj, (void *)pv_api_ip,
3438                                       (void *)pv_api_op);
3439             break;
3440         case IVD_CMD_CTL_GETVERSION:
3441         {
3442             ivd_ctl_getversioninfo_ip_t *ps_ip;
3443             ivd_ctl_getversioninfo_op_t *ps_op;
3444             IV_API_CALL_STATUS_T ret;
3445             ps_ip = (ivd_ctl_getversioninfo_ip_t *)pv_api_ip;
3446             ps_op = (ivd_ctl_getversioninfo_op_t *)pv_api_op;
3447 
3448             ps_op->u4_error_code = IV_SUCCESS;
3449 
3450             if((WORD32)ps_ip->u4_version_buffer_size <= 0)
3451             {
3452                 ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3453                 ret = IV_FAIL;
3454             }
3455             else
3456             {
3457                 ret = ihevcd_get_version((CHAR *)ps_ip->pv_version_buffer,
3458                                          ps_ip->u4_version_buffer_size);
3459                 if(ret != IV_SUCCESS)
3460                 {
3461                     ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3462                     ret = IV_FAIL;
3463                 }
3464             }
3465         }
3466             break;
3467         case IHEVCD_CXA_CMD_CTL_DEGRADE:
3468             ret = ihevcd_set_degrade(ps_codec_obj, (void *)pv_api_ip,
3469                             (void *)pv_api_op);
3470             break;
3471         case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
3472             ret = ihevcd_set_num_cores(ps_codec_obj, (void *)pv_api_ip,
3473                                        (void *)pv_api_op);
3474             break;
3475         case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
3476             ret = ihevcd_get_frame_dimensions(ps_codec_obj, (void *)pv_api_ip,
3477                                               (void *)pv_api_op);
3478             break;
3479         case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
3480             ret = ihevcd_get_vui_params(ps_codec_obj, (void *)pv_api_ip,
3481                                         (void *)pv_api_op);
3482             break;
3483         case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
3484             ret = ihevcd_get_sei_mastering_params(ps_codec_obj, (void *)pv_api_ip,
3485                                         (void *)pv_api_op);
3486             break;
3487         case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
3488             ret = ihevcd_set_processor(ps_codec_obj, (void *)pv_api_ip,
3489                             (void *)pv_api_op);
3490             break;
3491         default:
3492             DEBUG("\nDo nothing\n");
3493             break;
3494     }
3495 
3496     return ret;
3497 }
3498 
3499 /**
3500 *******************************************************************************
3501 *
3502 * @brief
3503 *  Codecs entry point function. All the function calls to  the codec are
3504 * done using this function with different  values specified in command
3505 *
3506 * @par Description:
3507 *  Arguments are tested for validity and then based on the  command
3508 * appropriate function is called
3509 *
3510 * @param[in] ps_handle
3511 *  API level handle for codec
3512 *
3513 * @param[in] pv_api_ip
3514 *  Input argument structure
3515 *
3516 * @param[out] pv_api_op
3517 *  Output argument structure
3518 *
3519 * @returns  Status of the function corresponding to command
3520 *
3521 * @remarks
3522 *
3523 *
3524 *******************************************************************************
3525 */
ihevcd_cxa_api_function(iv_obj_t * ps_handle,void * pv_api_ip,void * pv_api_op)3526 IV_API_CALL_STATUS_T ihevcd_cxa_api_function(iv_obj_t *ps_handle,
3527                                              void *pv_api_ip,
3528                                              void *pv_api_op)
3529 {
3530     WORD32 command;
3531     UWORD32 *pu4_ptr_cmd;
3532     WORD32 ret = 0;
3533     IV_API_CALL_STATUS_T e_status;
3534     e_status = api_check_struct_sanity(ps_handle, pv_api_ip, pv_api_op);
3535 
3536     if(e_status != IV_SUCCESS)
3537     {
3538         DEBUG("error code = %d\n", *((UWORD32 *)pv_api_op + 1));
3539         return IV_FAIL;
3540     }
3541 
3542     pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
3543     pu4_ptr_cmd++;
3544 
3545     command = *pu4_ptr_cmd;
3546 
3547     switch(command)
3548     {
3549         case IVD_CMD_CREATE:
3550             ret = ihevcd_create(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3551             break;
3552         case IVD_CMD_DELETE:
3553             ret = ihevcd_delete(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3554             break;
3555 
3556         case IVD_CMD_VIDEO_DECODE:
3557             ret = ihevcd_decode(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3558             break;
3559 
3560         case IVD_CMD_GET_DISPLAY_FRAME:
3561             //ret = ihevcd_get_display_frame(ps_handle,(void *)pv_api_ip,(void *)pv_api_op);
3562             break;
3563 
3564         case IVD_CMD_SET_DISPLAY_FRAME:
3565             ret = ihevcd_set_display_frame(ps_handle, (void *)pv_api_ip,
3566                                            (void *)pv_api_op);
3567 
3568             break;
3569 
3570         case IVD_CMD_REL_DISPLAY_FRAME:
3571             ret = ihevcd_rel_display_frame(ps_handle, (void *)pv_api_ip,
3572                                            (void *)pv_api_op);
3573             break;
3574 
3575         case IVD_CMD_VIDEO_CTL:
3576             ret = ihevcd_ctl(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3577             break;
3578         default:
3579             ret = IV_FAIL;
3580             break;
3581     }
3582 
3583     return (IV_API_CALL_STATUS_T)ret;
3584 }
3585 
3586