1; RUN: llc -march=hexagon < %s | FileCheck %s
2
3; Allow combine(..##JTI..):
4; CHECK: r{{[0-9]+}}{{.*}} = {{.*}}#.LJTI
5; CHECK: r{{[0-9]+}} = memw(r{{[0-9]+}}{{ *}}+{{ *}}r{{[0-9]+<<#[0-9]+}})
6; CHECK: jumpr:nt r{{[0-9]+}}
7
8define void @main() #0 {
9entry:
10  %ret = alloca i32, align 4
11  br label %while.body
12
13while.body:
14  %ret.0.load17 = load volatile i32, i32* %ret, align 4
15  switch i32 %ret.0.load17, label %label6 [
16    i32 0, label %label0
17    i32 1, label %label1
18    i32 2, label %label2
19    i32 3, label %label3
20    i32 4, label %label4
21    i32 5, label %label5
22  ]
23
24label0:
25  %ret.0.load18 = load volatile i32, i32* %ret, align 4
26  %inc = add nsw i32 %ret.0.load18, 1
27  store volatile i32 %inc, i32* %ret, align 4
28  br label %while.body
29
30label1:
31  %ret.0.load19 = load volatile i32, i32* %ret, align 4
32  %inc2 = add nsw i32 %ret.0.load19, 1
33  store volatile i32 %inc2, i32* %ret, align 4
34  br label %while.body
35
36label2:
37  %ret.0.load20 = load volatile i32, i32* %ret, align 4
38  %inc4 = add nsw i32 %ret.0.load20, 1
39  store volatile i32 %inc4, i32* %ret, align 4
40  br label %while.body
41
42label3:
43  %ret.0.load21 = load volatile i32, i32* %ret, align 4
44  %inc6 = add nsw i32 %ret.0.load21, 1
45  store volatile i32 %inc6, i32* %ret, align 4
46  br label %while.body
47
48label4:
49  %ret.0.load22 = load volatile i32, i32* %ret, align 4
50  %inc8 = add nsw i32 %ret.0.load22, 1
51  store volatile i32 %inc8, i32* %ret, align 4
52  br label %while.body
53
54label5:
55  %ret.0.load23 = load volatile i32, i32* %ret, align 4
56  %inc10 = add nsw i32 %ret.0.load23, 1
57  store volatile i32 %inc10, i32* %ret, align 4
58  br label %while.body
59
60label6:
61  store volatile i32 0, i32* %ret, align 4
62  br label %while.body
63}
64
65attributes #0 = { noreturn nounwind "target-cpu"="hexagonv4" }
66