1; RUN: llc -mcpu=pwr7 < %s | FileCheck %s 2target datalayout = "E-m:e-i64:64-n32:64" 3target triple = "powerpc64-unknown-linux-gnu" 4 5; Function Attrs: nounwind 6define void @jbd2_journal_commit_transaction(i32 %input1, i32* %input2, i32* %input3, i8** %input4) #0 { 7entry: 8 br label %while.body392 9 10while.body392: ; preds = %wait_on_buffer.exit1319, %while.body392.lr.ph 11 %0 = load i8*, i8** %input4, align 8 12 %add.ptr399 = getelementptr inbounds i8, i8* %0, i64 -72 13 %b_state.i.i1314 = bitcast i8* %add.ptr399 to i64* 14 %ivar = add i32 %input1, 1 15 %tobool.i1316 = icmp eq i32 %input1, 0 16 br i1 %tobool.i1316, label %wait_on_buffer.exit1319, label %while.end418 17 18wait_on_buffer.exit1319: ; preds = %while.body392 19 %1 = load volatile i64, i64* %b_state.i.i1314, align 8 20 %conv.i.i1322 = and i64 %1, 1 21 %lnot404 = icmp eq i64 %conv.i.i1322, 0 22 %.err.4 = select i1 %lnot404, i32 -5, i32 %input1 23 %2 = call i64 asm sideeffect "1:.long 0x7c0000a8 $| ((($0) & 0x1f) << 21) $| (((0) & 0x1f) << 16) $| ((($3) & 0x1f) << 11) $| (((0) & 0x1) << 0) \0Aandc $0,$0,$2\0Astdcx. $0,0,$3\0Abne- 1b\0A", "=&r,=*m,r,r,*m,~{cc},~{memory}"(i64* %b_state.i.i1314, i64 262144, i64* %b_state.i.i1314, i64* %b_state.i.i1314) #0 24 store i8* %0, i8** %input4, align 8 25 %cmp.i1312 = icmp eq i32* %input2, %input3 26 br i1 %cmp.i1312, label %while.end418, label %while.body392 27 28while.end418: ; preds = %wait_on_buffer.exit1319, %do.body378 29 %err.4.lcssa = phi i32 [ %ivar, %while.body392 ], [ %.err.4, %wait_on_buffer.exit1319 ] 30 %tobool419 = icmp eq i32 %err.4.lcssa, 0 31 br i1 %tobool419, label %if.end421, label %if.then420 32 33; CHECK-LABEL: @jbd2_journal_commit_transaction 34; CHECK: andi. 35; CHECK: crmove [[REG:[0-9]+]], 1 36; CHECK: stdcx. 37; CHECK: isel {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}, [[REG]] 38 39if.then420: ; preds = %while.end418 40 unreachable 41 42if.end421: ; preds = %while.end418 43 unreachable 44 45} 46 47attributes #0 = { nounwind } 48 49