1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
3
4; Check that we generate vector conversion from float to narrower int types
5
6%f32vec_t = type <8 x float>
7%i16vec_t = type <8 x i16>
8%i8vec_t =  type <8 x i8>
9
10define void @fptoui16(%f32vec_t %a, %i16vec_t *%p) {
11; CHECK-LABEL: fptoui16:
12; CHECK:       # BB#0:
13; CHECK-NEXT:    vcvttps2dq %ymm0, %ymm0
14; CHECK-NEXT:    vextractf128 $1, %ymm0, %xmm1
15; CHECK-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
16; CHECK-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
17; CHECK-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
18; CHECK-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
19; CHECK-NEXT:    vmovdqa %xmm0, (%rdi)
20; CHECK-NEXT:    vzeroupper
21; CHECK-NEXT:    retq
22  %b = fptoui %f32vec_t %a to %i16vec_t
23  store %i16vec_t %b, %i16vec_t * %p
24  ret void
25}
26
27define void @fptosi16(%f32vec_t %a, %i16vec_t *%p) {
28; CHECK-LABEL: fptosi16:
29; CHECK:       # BB#0:
30; CHECK-NEXT:    vcvttps2dq %ymm0, %ymm0
31; CHECK-NEXT:    vextractf128 $1, %ymm0, %xmm1
32; CHECK-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
33; CHECK-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
34; CHECK-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
35; CHECK-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
36; CHECK-NEXT:    vmovdqa %xmm0, (%rdi)
37; CHECK-NEXT:    vzeroupper
38; CHECK-NEXT:    retq
39  %b = fptosi %f32vec_t %a to %i16vec_t
40  store %i16vec_t %b, %i16vec_t * %p
41  ret void
42}
43
44define void @fptoui8(%f32vec_t %a, %i8vec_t *%p) {
45; CHECK-LABEL: fptoui8:
46; CHECK:       # BB#0:
47; CHECK-NEXT:    vcvttps2dq %ymm0, %ymm0
48; CHECK-NEXT:    vextractf128 $1, %ymm0, %xmm1
49; CHECK-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
50; CHECK-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
51; CHECK-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
52; CHECK-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
53; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
54; CHECK-NEXT:    vmovq %xmm0, (%rdi)
55; CHECK-NEXT:    vzeroupper
56; CHECK-NEXT:    retq
57  %b = fptoui %f32vec_t %a to %i8vec_t
58  store %i8vec_t %b, %i8vec_t * %p
59  ret void
60}
61
62define void @fptosi8(%f32vec_t %a, %i8vec_t *%p) {
63; CHECK-LABEL: fptosi8:
64; CHECK:       # BB#0:
65; CHECK-NEXT:    vcvttps2dq %ymm0, %ymm0
66; CHECK-NEXT:    vextractf128 $1, %ymm0, %xmm1
67; CHECK-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
68; CHECK-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
69; CHECK-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
70; CHECK-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
71; CHECK-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
72; CHECK-NEXT:    vmovq %xmm0, (%rdi)
73; CHECK-NEXT:    vzeroupper
74; CHECK-NEXT:    retq
75  %b = fptosi %f32vec_t %a to %i8vec_t
76  store %i8vec_t %b, %i8vec_t * %p
77  ret void
78}
79