1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
4
5; sign extension v2i16 to v2i32
6
7define void @convert_v2i16_v2i32(<2 x i32>* %dst.addr, <2 x i16> %src) nounwind {
8; X86-LABEL: convert_v2i16_v2i32:
9; X86:       # BB#0: # %entry
10; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
11; X86-NEXT:    psllq $48, %xmm0
12; X86-NEXT:    psrad $16, %xmm0
13; X86-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
14; X86-NEXT:    movq %xmm0, (%eax)
15; X86-NEXT:    retl
16;
17; X64-LABEL: convert_v2i16_v2i32:
18; X64:       # BB#0: # %entry
19; X64-NEXT:    psllq $48, %xmm0
20; X64-NEXT:    psrad $16, %xmm0
21; X64-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
22; X64-NEXT:    movq %xmm0, (%rdi)
23; X64-NEXT:    retq
24entry:
25	%signext = sext <2 x i16> %src to <2 x i32>		; <<12 x i8>> [#uses=1]
26	store <2 x i32> %signext, <2 x i32>* %dst.addr
27	ret void
28}
29