1 //===- CodeGen/Analysis.h - CodeGen LLVM IR Analysis Utilities --*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares several CodeGen-specific LLVM IR analysis utilties.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_ANALYSIS_H
15 #define LLVM_CODEGEN_ANALYSIS_H
16 
17 #include "llvm/Instructions.h"
18 #include "llvm/InlineAsm.h"
19 #include "llvm/ADT/ArrayRef.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/CodeGen/ValueTypes.h"
22 #include "llvm/CodeGen/ISDOpcodes.h"
23 #include "llvm/Support/CallSite.h"
24 
25 namespace llvm {
26 
27 class GlobalVariable;
28 class TargetLowering;
29 class SDNode;
30 class SelectionDAG;
31 
32 /// ComputeLinearIndex - Given an LLVM IR aggregate type and a sequence
33 /// of insertvalue or extractvalue indices that identify a member, return
34 /// the linearized index of the start of the member.
35 ///
36 unsigned ComputeLinearIndex(Type *Ty,
37                             const unsigned *Indices,
38                             const unsigned *IndicesEnd,
39                             unsigned CurIndex = 0);
40 
41 inline unsigned ComputeLinearIndex(Type *Ty,
42                                    ArrayRef<unsigned> Indices,
43                                    unsigned CurIndex = 0) {
44   return ComputeLinearIndex(Ty, Indices.begin(), Indices.end(), CurIndex);
45 }
46 
47 /// ComputeValueVTs - Given an LLVM IR type, compute a sequence of
48 /// EVTs that represent all the individual underlying
49 /// non-aggregate types that comprise it.
50 ///
51 /// If Offsets is non-null, it points to a vector to be filled in
52 /// with the in-memory offsets of each of the individual values.
53 ///
54 void ComputeValueVTs(const TargetLowering &TLI, Type *Ty,
55                      SmallVectorImpl<EVT> &ValueVTs,
56                      SmallVectorImpl<uint64_t> *Offsets = 0,
57                      uint64_t StartingOffset = 0);
58 
59 /// ExtractTypeInfo - Returns the type info, possibly bitcast, encoded in V.
60 GlobalVariable *ExtractTypeInfo(Value *V);
61 
62 /// hasInlineAsmMemConstraint - Return true if the inline asm instruction being
63 /// processed uses a memory 'm' constraint.
64 bool hasInlineAsmMemConstraint(InlineAsm::ConstraintInfoVector &CInfos,
65                                const TargetLowering &TLI);
66 
67 /// getFCmpCondCode - Return the ISD condition code corresponding to
68 /// the given LLVM IR floating-point condition code.  This includes
69 /// consideration of global floating-point math flags.
70 ///
71 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
72 
73 /// getICmpCondCode - Return the ISD condition code corresponding to
74 /// the given LLVM IR integer condition code.
75 ///
76 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
77 
78 /// Test if the given instruction is in a position to be optimized
79 /// with a tail-call. This roughly means that it's in a block with
80 /// a return and there's nothing that needs to be scheduled
81 /// between it and the return.
82 ///
83 /// This function only tests target-independent requirements.
84 bool isInTailCallPosition(ImmutableCallSite CS, Attributes CalleeRetAttr,
85                           const TargetLowering &TLI);
86 
87 bool isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
88                           const TargetLowering &TLI);
89 
90 } // End llvm namespace
91 
92 #endif
93