1; RUN: llc < %s -mtriple=armv7-apple-darwin   -mattr=+v7,+mp -show-mc-encoding | FileCheck %s -check-prefix=ARM
2; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+v7     -show-mc-encoding | FileCheck %s -check-prefix=T2
3; rdar://8924681
4
5define void @t1(i8* %ptr) nounwind  {
6entry:
7; ARM: t1:
8; ARM: pldw [r0]                        @ encoding: [0x00,0xf0,0x90,0xf5]
9; ARM: pld [r0]                         @ encoding: [0x00,0xf0,0xd0,0xf5]
10
11; T2: t1:
12; T2: pld [r0]                      @ encoding: [0x90,0xf8,0x00,0xf0]
13  tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3 )
14  tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 )
15  ret void
16}
17
18define void @t2(i8* %ptr) nounwind  {
19entry:
20; ARM: t2:
21; ARM: pld [r0, #1023]                  @ encoding: [0xff,0xf3,0xd0,0xf5]
22
23; T2: t2:
24; T2: pld [r0, #1023]               @ encoding: [0x90,0xf8,0xff,0xf3]
25  %tmp = getelementptr i8* %ptr, i32 1023
26  tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3 )
27  ret void
28}
29
30define void @t3(i32 %base, i32 %offset) nounwind  {
31entry:
32; ARM: t3:
33; ARM: pld [r0, r1, lsr #2]             @ encoding: [0x21,0xf1,0xd0,0xf7]
34
35; T2: t3:
36; T2: pld [r0, r1]                  @ encoding: [0x10,0xf8,0x01,0xf0]
37  %tmp1 = lshr i32 %offset, 2
38  %tmp2 = add i32 %base, %tmp1
39  %tmp3 = inttoptr i32 %tmp2 to i8*
40  tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 )
41  ret void
42}
43
44define void @t4(i32 %base, i32 %offset) nounwind  {
45entry:
46; ARM: t4:
47; ARM: pld [r0, r1, lsl #2]             @ encoding: [0x01,0xf1,0xd0,0xf7]
48
49; T2: t4:
50; T2: pld [r0, r1, lsl #2]          @ encoding: [0x10,0xf8,0x21,0xf0]
51  %tmp1 = shl i32 %offset, 2
52  %tmp2 = add i32 %base, %tmp1
53  %tmp3 = inttoptr i32 %tmp2 to i8*
54  tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 )
55  ret void
56}
57
58declare void @llvm.prefetch(i8*, i32, i32) nounwind
59