1 // Copyright 2016, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are met:
6 //
7 // * Redistributions of source code must retain the above copyright notice,
8 // this list of conditions and the following disclaimer.
9 // * Redistributions in binary form must reproduce the above copyright notice,
10 // this list of conditions and the following disclaimer in the documentation
11 // and/or other materials provided with the distribution.
12 // * Neither the name of ARM Limited nor the names of its contributors may be
13 // used to endorse or promote products derived from this software without
14 // specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27
28 // -----------------------------------------------------------------------------
29 // This file is auto generated from the
30 // test/aarch32/config/template-simulator-aarch32.cc.in template file using
31 // tools/generate_tests.py.
32 //
33 // PLEASE DO NOT EDIT.
34 // -----------------------------------------------------------------------------
35
36
37 #include "test-runner.h"
38
39 #include "test-utils.h"
40 #include "test-utils-aarch32.h"
41
42 #include "aarch32/assembler-aarch32.h"
43 #include "aarch32/macro-assembler-aarch32.h"
44 #include "aarch32/disasm-aarch32.h"
45
46 #define __ masm.
47 #define BUF_SIZE (4096)
48
49 #ifdef VIXL_INCLUDE_SIMULATOR_AARCH32
50 // Run tests with the simulator.
51
52 #define SETUP() MacroAssembler masm(BUF_SIZE)
53
54 #define START() masm.GetBuffer()->Reset()
55
56 #define END() \
57 __ Hlt(0); \
58 __ FinalizeCode();
59
60 // TODO: Run the tests in the simulator.
61 #define RUN()
62
63 #define TEARDOWN()
64
65 #else // ifdef VIXL_INCLUDE_SIMULATOR_AARCH32.
66
67 #define SETUP() \
68 MacroAssembler masm(BUF_SIZE); \
69 UseScratchRegisterScope harness_scratch(&masm); \
70 harness_scratch.ExcludeAll();
71
72 #define START() \
73 masm.GetBuffer()->Reset(); \
74 __ Push(r4); \
75 __ Push(r5); \
76 __ Push(r6); \
77 __ Push(r7); \
78 __ Push(r8); \
79 __ Push(r9); \
80 __ Push(r10); \
81 __ Push(r11); \
82 __ Push(lr); \
83 harness_scratch.Include(ip);
84
85 #define END() \
86 harness_scratch.Exclude(ip); \
87 __ Pop(lr); \
88 __ Pop(r11); \
89 __ Pop(r10); \
90 __ Pop(r9); \
91 __ Pop(r8); \
92 __ Pop(r7); \
93 __ Pop(r6); \
94 __ Pop(r5); \
95 __ Pop(r4); \
96 __ Bx(lr); \
97 __ FinalizeCode();
98
99 #define RUN() \
100 { \
101 int pcs_offset = masm.IsUsingT32() ? 1 : 0; \
102 masm.GetBuffer()->SetExecutable(); \
103 ExecuteMemory(masm.GetBuffer()->GetStartAddress<byte*>(), \
104 masm.GetSizeOfCodeGenerated(), \
105 pcs_offset); \
106 masm.GetBuffer()->SetWritable(); \
107 }
108
109 #define TEARDOWN() harness_scratch.Close();
110
111 #endif // ifdef VIXL_INCLUDE_SIMULATOR_AARCH32
112
113 namespace vixl {
114 namespace aarch32 {
115
116 // List of instruction encodings:
117 #define FOREACH_INSTRUCTION(M) \
118 M(Mov) \
119 M(Movt)
120
121
122 // The following definitions are defined again in each generated test, therefore
123 // we need to place them in an anomymous namespace. It expresses that they are
124 // local to this file only, and the compiler is not allowed to share these types
125 // across test files during template instantiation. Specifically, `Operands` and
126 // `Inputs` have various layouts across generated tests so they absolutely
127 // cannot be shared.
128
129 #ifdef VIXL_INCLUDE_TARGET_T32
130 namespace {
131
132 // Values to be passed to the assembler to produce the instruction under test.
133 struct Operands {
134 Condition cond;
135 Register rd;
136 uint32_t immediate;
137 };
138
139 // Input data to feed to the instruction.
140 struct Inputs {
141 uint32_t apsr;
142 uint32_t rd;
143 };
144
145 // This structure contains all input data needed to test one specific encoding.
146 // It used to generate a loop over an instruction.
147 struct TestLoopData {
148 // The `operands` fields represents the values to pass to the assembler to
149 // produce the instruction.
150 Operands operands;
151 // Description of the operands, used for error reporting.
152 const char* operands_description;
153 // Unique identifier, used for generating traces.
154 const char* identifier;
155 // Array of values to be fed to the instruction.
156 size_t input_size;
157 const Inputs* inputs;
158 };
159
160 static const Inputs kCondition[] = {{NFlag, 0xabababab},
161 {ZFlag, 0xabababab},
162 {CFlag, 0xabababab},
163 {VFlag, 0xabababab},
164 {NZFlag, 0xabababab},
165 {NCFlag, 0xabababab},
166 {NVFlag, 0xabababab},
167 {ZCFlag, 0xabababab},
168 {ZVFlag, 0xabababab},
169 {CVFlag, 0xabababab},
170 {NZCFlag, 0xabababab},
171 {NZVFlag, 0xabababab},
172 {NCVFlag, 0xabababab},
173 {ZCVFlag, 0xabababab},
174 {NZCVFlag, 0xabababab}};
175
176 static const Inputs kModifiedImmediate[] = {{NoFlag, 0x00000000},
177 {NoFlag, 0x00000001},
178 {NoFlag, 0x00000002},
179 {NoFlag, 0x00000020},
180 {NoFlag, 0x0000007d},
181 {NoFlag, 0x0000007e},
182 {NoFlag, 0x0000007f},
183 {NoFlag, 0x00007ffd},
184 {NoFlag, 0x00007ffe},
185 {NoFlag, 0x00007fff},
186 {NoFlag, 0x33333333},
187 {NoFlag, 0x55555555},
188 {NoFlag, 0x7ffffffd},
189 {NoFlag, 0x7ffffffe},
190 {NoFlag, 0x7fffffff},
191 {NoFlag, 0x80000000},
192 {NoFlag, 0x80000001},
193 {NoFlag, 0xaaaaaaaa},
194 {NoFlag, 0xcccccccc},
195 {NoFlag, 0xffff8000},
196 {NoFlag, 0xffff8001},
197 {NoFlag, 0xffff8002},
198 {NoFlag, 0xffff8003},
199 {NoFlag, 0xffffff80},
200 {NoFlag, 0xffffff81},
201 {NoFlag, 0xffffff82},
202 {NoFlag, 0xffffff83},
203 {NoFlag, 0xffffffe0},
204 {NoFlag, 0xfffffffd},
205 {NoFlag, 0xfffffffe},
206 {NoFlag, 0xffffffff}};
207
208
209 // A loop will be generated for each element of this array.
210 const TestLoopData kTests[] = {{{eq, r0, 0x0},
211 "eq r0 0x0",
212 "Condition_eq_r0_0x0",
213 ARRAY_SIZE(kCondition),
214 kCondition},
215 {{ne, r0, 0x0},
216 "ne r0 0x0",
217 "Condition_ne_r0_0x0",
218 ARRAY_SIZE(kCondition),
219 kCondition},
220 {{cs, r0, 0x0},
221 "cs r0 0x0",
222 "Condition_cs_r0_0x0",
223 ARRAY_SIZE(kCondition),
224 kCondition},
225 {{cc, r0, 0x0},
226 "cc r0 0x0",
227 "Condition_cc_r0_0x0",
228 ARRAY_SIZE(kCondition),
229 kCondition},
230 {{mi, r0, 0x0},
231 "mi r0 0x0",
232 "Condition_mi_r0_0x0",
233 ARRAY_SIZE(kCondition),
234 kCondition},
235 {{pl, r0, 0x0},
236 "pl r0 0x0",
237 "Condition_pl_r0_0x0",
238 ARRAY_SIZE(kCondition),
239 kCondition},
240 {{vs, r0, 0x0},
241 "vs r0 0x0",
242 "Condition_vs_r0_0x0",
243 ARRAY_SIZE(kCondition),
244 kCondition},
245 {{vc, r0, 0x0},
246 "vc r0 0x0",
247 "Condition_vc_r0_0x0",
248 ARRAY_SIZE(kCondition),
249 kCondition},
250 {{hi, r0, 0x0},
251 "hi r0 0x0",
252 "Condition_hi_r0_0x0",
253 ARRAY_SIZE(kCondition),
254 kCondition},
255 {{ls, r0, 0x0},
256 "ls r0 0x0",
257 "Condition_ls_r0_0x0",
258 ARRAY_SIZE(kCondition),
259 kCondition},
260 {{ge, r0, 0x0},
261 "ge r0 0x0",
262 "Condition_ge_r0_0x0",
263 ARRAY_SIZE(kCondition),
264 kCondition},
265 {{lt, r0, 0x0},
266 "lt r0 0x0",
267 "Condition_lt_r0_0x0",
268 ARRAY_SIZE(kCondition),
269 kCondition},
270 {{gt, r0, 0x0},
271 "gt r0 0x0",
272 "Condition_gt_r0_0x0",
273 ARRAY_SIZE(kCondition),
274 kCondition},
275 {{le, r0, 0x0},
276 "le r0 0x0",
277 "Condition_le_r0_0x0",
278 ARRAY_SIZE(kCondition),
279 kCondition},
280 {{al, r0, 0x0},
281 "al r0 0x0",
282 "Condition_al_r0_0x0",
283 ARRAY_SIZE(kCondition),
284 kCondition},
285 {{al, r0, 0x0000},
286 "al r0 0x0000",
287 "ModifiedImmediate_al_r0_0x0000",
288 ARRAY_SIZE(kModifiedImmediate),
289 kModifiedImmediate},
290 {{al, r0, 0x0001},
291 "al r0 0x0001",
292 "ModifiedImmediate_al_r0_0x0001",
293 ARRAY_SIZE(kModifiedImmediate),
294 kModifiedImmediate},
295 {{al, r0, 0x0002},
296 "al r0 0x0002",
297 "ModifiedImmediate_al_r0_0x0002",
298 ARRAY_SIZE(kModifiedImmediate),
299 kModifiedImmediate},
300 {{al, r0, 0x0020},
301 "al r0 0x0020",
302 "ModifiedImmediate_al_r0_0x0020",
303 ARRAY_SIZE(kModifiedImmediate),
304 kModifiedImmediate},
305 {{al, r0, 0x007d},
306 "al r0 0x007d",
307 "ModifiedImmediate_al_r0_0x007d",
308 ARRAY_SIZE(kModifiedImmediate),
309 kModifiedImmediate},
310 {{al, r0, 0x007e},
311 "al r0 0x007e",
312 "ModifiedImmediate_al_r0_0x007e",
313 ARRAY_SIZE(kModifiedImmediate),
314 kModifiedImmediate},
315 {{al, r0, 0x007f},
316 "al r0 0x007f",
317 "ModifiedImmediate_al_r0_0x007f",
318 ARRAY_SIZE(kModifiedImmediate),
319 kModifiedImmediate},
320 {{al, r0, 0x7ffd},
321 "al r0 0x7ffd",
322 "ModifiedImmediate_al_r0_0x7ffd",
323 ARRAY_SIZE(kModifiedImmediate),
324 kModifiedImmediate},
325 {{al, r0, 0x7ffe},
326 "al r0 0x7ffe",
327 "ModifiedImmediate_al_r0_0x7ffe",
328 ARRAY_SIZE(kModifiedImmediate),
329 kModifiedImmediate},
330 {{al, r0, 0x7fff},
331 "al r0 0x7fff",
332 "ModifiedImmediate_al_r0_0x7fff",
333 ARRAY_SIZE(kModifiedImmediate),
334 kModifiedImmediate},
335 {{al, r0, 0x3333},
336 "al r0 0x3333",
337 "ModifiedImmediate_al_r0_0x3333",
338 ARRAY_SIZE(kModifiedImmediate),
339 kModifiedImmediate},
340 {{al, r0, 0x5555},
341 "al r0 0x5555",
342 "ModifiedImmediate_al_r0_0x5555",
343 ARRAY_SIZE(kModifiedImmediate),
344 kModifiedImmediate},
345 {{al, r0, 0xaaaa},
346 "al r0 0xaaaa",
347 "ModifiedImmediate_al_r0_0xaaaa",
348 ARRAY_SIZE(kModifiedImmediate),
349 kModifiedImmediate},
350 {{al, r0, 0xcccc},
351 "al r0 0xcccc",
352 "ModifiedImmediate_al_r0_0xcccc",
353 ARRAY_SIZE(kModifiedImmediate),
354 kModifiedImmediate},
355 {{al, r0, 0x8000},
356 "al r0 0x8000",
357 "ModifiedImmediate_al_r0_0x8000",
358 ARRAY_SIZE(kModifiedImmediate),
359 kModifiedImmediate},
360 {{al, r0, 0x8001},
361 "al r0 0x8001",
362 "ModifiedImmediate_al_r0_0x8001",
363 ARRAY_SIZE(kModifiedImmediate),
364 kModifiedImmediate},
365 {{al, r0, 0x8002},
366 "al r0 0x8002",
367 "ModifiedImmediate_al_r0_0x8002",
368 ARRAY_SIZE(kModifiedImmediate),
369 kModifiedImmediate},
370 {{al, r0, 0x8003},
371 "al r0 0x8003",
372 "ModifiedImmediate_al_r0_0x8003",
373 ARRAY_SIZE(kModifiedImmediate),
374 kModifiedImmediate},
375 {{al, r0, 0xff80},
376 "al r0 0xff80",
377 "ModifiedImmediate_al_r0_0xff80",
378 ARRAY_SIZE(kModifiedImmediate),
379 kModifiedImmediate},
380 {{al, r0, 0xff81},
381 "al r0 0xff81",
382 "ModifiedImmediate_al_r0_0xff81",
383 ARRAY_SIZE(kModifiedImmediate),
384 kModifiedImmediate},
385 {{al, r0, 0xff82},
386 "al r0 0xff82",
387 "ModifiedImmediate_al_r0_0xff82",
388 ARRAY_SIZE(kModifiedImmediate),
389 kModifiedImmediate},
390 {{al, r0, 0xff83},
391 "al r0 0xff83",
392 "ModifiedImmediate_al_r0_0xff83",
393 ARRAY_SIZE(kModifiedImmediate),
394 kModifiedImmediate},
395 {{al, r0, 0xffe0},
396 "al r0 0xffe0",
397 "ModifiedImmediate_al_r0_0xffe0",
398 ARRAY_SIZE(kModifiedImmediate),
399 kModifiedImmediate},
400 {{al, r0, 0xfffd},
401 "al r0 0xfffd",
402 "ModifiedImmediate_al_r0_0xfffd",
403 ARRAY_SIZE(kModifiedImmediate),
404 kModifiedImmediate},
405 {{al, r0, 0xfffe},
406 "al r0 0xfffe",
407 "ModifiedImmediate_al_r0_0xfffe",
408 ARRAY_SIZE(kModifiedImmediate),
409 kModifiedImmediate},
410 {{al, r0, 0xffff},
411 "al r0 0xffff",
412 "ModifiedImmediate_al_r0_0xffff",
413 ARRAY_SIZE(kModifiedImmediate),
414 kModifiedImmediate}};
415
416 // We record all inputs to the instructions as outputs. This way, we also check
417 // that what shouldn't change didn't change.
418 struct TestResult {
419 size_t output_size;
420 const Inputs* outputs;
421 };
422
423 // These headers each contain an array of `TestResult` with the reference output
424 // values. The reference arrays are names `kReference{mnemonic}`.
425 #include "aarch32/traces/simulator-cond-rd-operand-imm16-t32-mov.h"
426 #include "aarch32/traces/simulator-cond-rd-operand-imm16-t32-movt.h"
427
428
429 // The maximum number of errors to report in detail for each test.
430 const unsigned kErrorReportLimit = 8;
431
432 typedef void (MacroAssembler::*Fn)(Condition cond,
433 Register rd,
434 const Operand& op);
435
TestHelper(Fn instruction,const char * mnemonic,const TestResult reference[])436 void TestHelper(Fn instruction,
437 const char* mnemonic,
438 const TestResult reference[]) {
439 SETUP();
440 masm.UseT32();
441 START();
442
443 // Data to compare to `reference`.
444 TestResult* results[ARRAY_SIZE(kTests)];
445
446 // Test cases for memory bound instructions may allocate a buffer and save its
447 // address in this array.
448 byte* scratch_memory_buffers[ARRAY_SIZE(kTests)];
449
450 // Generate a loop for each element in `kTests`. Each loop tests one specific
451 // instruction.
452 for (unsigned i = 0; i < ARRAY_SIZE(kTests); i++) {
453 // Allocate results on the heap for this test.
454 results[i] = new TestResult;
455 results[i]->outputs = new Inputs[kTests[i].input_size];
456 results[i]->output_size = kTests[i].input_size;
457
458 size_t input_stride = sizeof(kTests[i].inputs[0]) * kTests[i].input_size;
459 VIXL_ASSERT(IsUint32(input_stride));
460
461 scratch_memory_buffers[i] = NULL;
462
463 Label loop;
464 UseScratchRegisterScope scratch_registers(&masm);
465 // Include all registers from r0 ro r12.
466 scratch_registers.Include(RegisterList(0x1fff));
467
468 // Values to pass to the macro-assembler.
469 Condition cond = kTests[i].operands.cond;
470 Register rd = kTests[i].operands.rd;
471 uint32_t immediate = kTests[i].operands.immediate;
472 Operand op(immediate);
473 scratch_registers.Exclude(rd);
474
475 // Allocate reserved registers for our own use.
476 Register input_ptr = scratch_registers.Acquire();
477 Register input_end = scratch_registers.Acquire();
478 Register result_ptr = scratch_registers.Acquire();
479
480 // Initialize `input_ptr` to the first element and `input_end` the address
481 // after the array.
482 __ Mov(input_ptr, Operand::From(kTests[i].inputs));
483 __ Add(input_end, input_ptr, static_cast<uint32_t>(input_stride));
484 __ Mov(result_ptr, Operand::From(results[i]->outputs));
485 __ Bind(&loop);
486
487 {
488 UseScratchRegisterScope temp_registers(&masm);
489 Register nzcv_bits = temp_registers.Acquire();
490 Register saved_q_bit = temp_registers.Acquire();
491 // Save the `Q` bit flag.
492 __ Mrs(saved_q_bit, APSR);
493 __ And(saved_q_bit, saved_q_bit, QFlag);
494 // Set the `NZCV` and `Q` flags together.
495 __ Ldr(nzcv_bits, MemOperand(input_ptr, offsetof(Inputs, apsr)));
496 __ Orr(nzcv_bits, nzcv_bits, saved_q_bit);
497 __ Msr(APSR_nzcvq, nzcv_bits);
498 }
499 __ Ldr(rd, MemOperand(input_ptr, offsetof(Inputs, rd)));
500
501 (masm.*instruction)(cond, rd, op);
502
503 {
504 UseScratchRegisterScope temp_registers(&masm);
505 Register nzcv_bits = temp_registers.Acquire();
506 __ Mrs(nzcv_bits, APSR);
507 // Only record the NZCV bits.
508 __ And(nzcv_bits, nzcv_bits, NZCVFlag);
509 __ Str(nzcv_bits, MemOperand(result_ptr, offsetof(Inputs, apsr)));
510 }
511 __ Str(rd, MemOperand(result_ptr, offsetof(Inputs, rd)));
512
513 // Advance the result pointer.
514 __ Add(result_ptr, result_ptr, Operand::From(sizeof(kTests[i].inputs[0])));
515 // Loop back until `input_ptr` is lower than `input_base`.
516 __ Add(input_ptr, input_ptr, Operand::From(sizeof(kTests[i].inputs[0])));
517 __ Cmp(input_ptr, input_end);
518 __ B(ne, &loop);
519 }
520
521 END();
522
523 RUN();
524
525 if (Test::generate_test_trace()) {
526 // Print the results.
527 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) {
528 printf("const Inputs kOutputs_%s_%s[] = {\n",
529 mnemonic,
530 kTests[i].identifier);
531 for (size_t j = 0; j < results[i]->output_size; j++) {
532 printf(" { ");
533 printf("0x%08" PRIx32, results[i]->outputs[j].apsr);
534 printf(", ");
535 printf("0x%08" PRIx32, results[i]->outputs[j].rd);
536 printf(" },\n");
537 }
538 printf("};\n");
539 }
540 printf("const TestResult kReference%s[] = {\n", mnemonic);
541 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) {
542 printf(" {\n");
543 printf(" ARRAY_SIZE(kOutputs_%s_%s),\n",
544 mnemonic,
545 kTests[i].identifier);
546 printf(" kOutputs_%s_%s,\n", mnemonic, kTests[i].identifier);
547 printf(" },\n");
548 }
549 printf("};\n");
550 } else if (kCheckSimulatorTestResults) {
551 // Check the results.
552 unsigned total_error_count = 0;
553 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) {
554 bool instruction_has_errors = false;
555 for (size_t j = 0; j < kTests[i].input_size; j++) {
556 uint32_t apsr = results[i]->outputs[j].apsr;
557 uint32_t rd = results[i]->outputs[j].rd;
558 uint32_t apsr_input = kTests[i].inputs[j].apsr;
559 uint32_t rd_input = kTests[i].inputs[j].rd;
560 uint32_t apsr_ref = reference[i].outputs[j].apsr;
561 uint32_t rd_ref = reference[i].outputs[j].rd;
562
563 if (((apsr != apsr_ref) || (rd != rd_ref)) &&
564 (++total_error_count <= kErrorReportLimit)) {
565 // Print the instruction once even if it triggered multiple failures.
566 if (!instruction_has_errors) {
567 printf("Error(s) when testing \"%s %s\":\n",
568 mnemonic,
569 kTests[i].operands_description);
570 instruction_has_errors = true;
571 }
572 // Print subsequent errors.
573 printf(" Input: ");
574 printf("0x%08" PRIx32, apsr_input);
575 printf(", ");
576 printf("0x%08" PRIx32, rd_input);
577 printf("\n");
578 printf(" Expected: ");
579 printf("0x%08" PRIx32, apsr_ref);
580 printf(", ");
581 printf("0x%08" PRIx32, rd_ref);
582 printf("\n");
583 printf(" Found: ");
584 printf("0x%08" PRIx32, apsr);
585 printf(", ");
586 printf("0x%08" PRIx32, rd);
587 printf("\n\n");
588 }
589 }
590 }
591
592 if (total_error_count > kErrorReportLimit) {
593 printf("%u other errors follow.\n",
594 total_error_count - kErrorReportLimit);
595 }
596 VIXL_CHECK(total_error_count == 0);
597 } else {
598 VIXL_WARNING("Assembled the code, but did not run anything.\n");
599 }
600
601 for (size_t i = 0; i < ARRAY_SIZE(kTests); i++) {
602 delete[] results[i]->outputs;
603 delete results[i];
604 delete[] scratch_memory_buffers[i];
605 }
606
607 TEARDOWN();
608 }
609
610 // Instantiate tests for each instruction in the list.
611 // TODO: Remove this limitation by having a sandboxing mechanism.
612 #if defined(VIXL_HOST_POINTER_32)
613 #define TEST(mnemonic) \
614 void Test_##mnemonic() { \
615 TestHelper(&MacroAssembler::mnemonic, #mnemonic, kReference##mnemonic); \
616 } \
617 Test test_##mnemonic( \
618 "AARCH32_SIMULATOR_COND_RD_OPERAND_IMM16_T32_" #mnemonic, \
619 &Test_##mnemonic);
620 #else
621 #define TEST(mnemonic) \
622 void Test_##mnemonic() { \
623 VIXL_WARNING("This test can only run on a 32-bit host.\n"); \
624 USE(TestHelper); \
625 } \
626 Test test_##mnemonic( \
627 "AARCH32_SIMULATOR_COND_RD_OPERAND_IMM16_T32_" #mnemonic, \
628 &Test_##mnemonic);
629 #endif
630
631 FOREACH_INSTRUCTION(TEST)
632 #undef TEST
633
634 } // namespace
635 #endif
636
637 } // namespace aarch32
638 } // namespace vixl
639