1 #ifndef UAPI_MMC_MMC_H
2 #define UAPI_MMC_MMC_H
3 
4 /* Standard MMC commands (4.1)           type  argument     response */
5    /* class 1 */
6 #define MMC_GO_IDLE_STATE         0   /* bc                          */
7 #define MMC_SEND_OP_COND          1   /* bcr  [31:0] OCR         R3  */
8 #define MMC_ALL_SEND_CID          2   /* bcr                     R2  */
9 #define MMC_SET_RELATIVE_ADDR     3   /* ac   [31:16] RCA        R1  */
10 #define MMC_SET_DSR               4   /* bc   [31:16] RCA            */
11 #define MMC_SLEEP_AWAKE		  5   /* ac   [31:16] RCA 15:flg R1b */
12 #define MMC_SWITCH                6   /* ac   [31:0] See below   R1b */
13 #define MMC_SELECT_CARD           7   /* ac   [31:16] RCA        R1  */
14 #define MMC_SEND_EXT_CSD          8   /* adtc                    R1  */
15 #define MMC_SEND_CSD              9   /* ac   [31:16] RCA        R2  */
16 #define MMC_SEND_CID             10   /* ac   [31:16] RCA        R2  */
17 #define MMC_READ_DAT_UNTIL_STOP  11   /* adtc [31:0] dadr        R1  */
18 #define MMC_STOP_TRANSMISSION    12   /* ac                      R1b */
19 #define MMC_SEND_STATUS          13   /* ac   [31:16] RCA        R1  */
20 #define MMC_BUS_TEST_R           14   /* adtc                    R1  */
21 #define MMC_GO_INACTIVE_STATE    15   /* ac   [31:16] RCA            */
22 #define MMC_BUS_TEST_W           19   /* adtc                    R1  */
23 #define MMC_SPI_READ_OCR         58   /* spi                  spi_R3 */
24 #define MMC_SPI_CRC_ON_OFF       59   /* spi  [0:0] flag      spi_R1 */
25 
26   /* class 2 */
27 #define MMC_SET_BLOCKLEN         16   /* ac   [31:0] block len   R1  */
28 #define MMC_READ_SINGLE_BLOCK    17   /* adtc [31:0] data addr   R1  */
29 #define MMC_READ_MULTIPLE_BLOCK  18   /* adtc [31:0] data addr   R1  */
30 #define MMC_SEND_TUNING_BLOCK    19   /* adtc                    R1  */
31 #define MMC_SEND_TUNING_BLOCK_HS200	21	/* adtc R1  */
32 #define MMC_SEND_TUNING_BLOCK_HS400	MMC_SEND_TUNING_BLOCK_HS200
33 
34   /* class 3 */
35 #define MMC_WRITE_DAT_UNTIL_STOP 20   /* adtc [31:0] data addr   R1  */
36 
37   /* class 4 */
38 #define MMC_SET_BLOCK_COUNT      23   /* adtc [31:0] data addr   R1  */
39 #define MMC_WRITE_BLOCK          24   /* adtc [31:0] data addr   R1  */
40 #define MMC_WRITE_MULTIPLE_BLOCK 25   /* adtc                    R1  */
41 #define MMC_PROGRAM_CID          26   /* adtc                    R1  */
42 #define MMC_PROGRAM_CSD          27   /* adtc                    R1  */
43 
44   /* class 6 */
45 #define MMC_SET_WRITE_PROT       28   /* ac   [31:0] data addr   R1b */
46 #define MMC_CLR_WRITE_PROT       29   /* ac   [31:0] data addr   R1b */
47 #define MMC_SEND_WRITE_PROT      30   /* adtc [31:0] wpdata addr R1  */
48 
49   /* class 5 */
50 #define MMC_ERASE_GROUP_START    35   /* ac   [31:0] data addr   R1  */
51 #define MMC_ERASE_GROUP_END      36   /* ac   [31:0] data addr   R1  */
52 #define MMC_ERASE                38   /* ac                      R1b */
53 
54   /* class 9 */
55 #define MMC_FAST_IO              39   /* ac   <Complex>          R4  */
56 #define MMC_GO_IRQ_STATE         40   /* bcr                     R5  */
57 
58   /* class 7 */
59 #define MMC_LOCK_UNLOCK          42   /* adtc                    R1b */
60 
61   /* class 8 */
62 #define MMC_APP_CMD              55   /* ac   [31:16] RCA        R1  */
63 #define MMC_GEN_CMD              56   /* adtc [0] RD/WR          R1  */
64 
65 #endif /* UAPI_MMC_MMC_H */
66