| /external/swiftshader/third_party/LLVM/lib/CodeGen/AsmPrinter/ |
| D | AsmPrinterInlineAsm.cpp | 147 unsigned NumDefs = 0; in EmitInlineAsm() local
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| /external/capstone/ |
| D | MCInstrDesc.h | 126 unsigned char NumDefs; // Num of args that are definitions member
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | PeepholeOptimizer.cpp | 269 unsigned NumDefs = MI->getDesc().getNumDefs(); in OptimizeBitcastInstr() local
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| D | MachineCSE.cpp | 424 unsigned NumDefs = MI->getDesc().getNumDefs(); in ProcessBlock() local
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| D | MachineLICM.cpp | 912 unsigned NumDefs = MI.getDesc().getNumDefs(); in IsCheapInstruction() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGRRList.cpp | 1973 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in MayReduceRegPressure() local
2019 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in RegPressureDiff() local
2147 unsigned NumDefs = TII->get(PN->getMachineOpcode()).getNumDefs(); in unscheduledNode() local
2164 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in unscheduledNode() local
2733 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in canClobberPhysRegDefs() local
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| D | InstrEmitter.cpp | 753 unsigned NumDefs = II.getNumDefs(); in EmitMachineNode() local
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| D | DAGCombiner.cpp | 7241 unsigned NumDefs = 0; in visitTRUNCATE() local
12660 unsigned NumDefs = 0; in reduceBuildVecConvertToConvertBuildVec() local
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| /external/llvm/lib/CodeGen/ |
| D | ImplicitNullChecks.cpp | 492 unsigned NumDefs = LoadMI->getDesc().getNumDefs(); in insertFaultingLoad() local
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| D | MachineCSE.cpp | 532 unsigned NumDefs = MI->getDesc().getNumDefs() + in ProcessBlock() local
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| D | MachineLICM.cpp | 1003 unsigned NumDefs = MI.getDesc().getNumDefs(); in IsCheapInstruction() local
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| D | PeepholeOptimizer.cpp | 886 unsigned NumDefs; member in __anon2734e12b0211::UncoalescableRewriter
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| D | MachineVerifier.cpp | 891 unsigned NumDefs = MCID.getNumDefs(); in visitMachineOperand() local
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| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCInstrDesc.h | 137 unsigned short NumDefs; // Num of args that are definitions variable
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGRRList.cpp | 1863 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in MayReduceRegPressure() local
1910 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in RegPressureDiff() local
2040 unsigned NumDefs = TII->get(PN->getMachineOpcode()).getNumDefs(); in UnscheduledNode() local
2057 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in UnscheduledNode() local
2663 unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs(); in canClobberPhysRegDefs() local
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| /external/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 142 unsigned char NumDefs; // Num of args that are definitions variable
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| /external/llvm/lib/CodeGen/AsmPrinter/ |
| D | AsmPrinterInlineAsm.cpp | 434 unsigned NumDefs = 0; in EmitInlineAsm() local
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| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | CodeGenInstruction.h | 133 unsigned NumDefs; variable
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenInstruction.h | 133 unsigned NumDefs; variable
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonBitTracker.cpp | 127 unsigned NumDefs = 0; in evaluate() local
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| D | HexagonInstrInfo.cpp | 4159 unsigned NumDefs = 0; in getSize() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMCodeEmitter.cpp | 1014 unsigned NumDefs = MCID.getNumDefs(); in emitDataProcessingInstruction() local
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 3021 unsigned NumDefs = MCID.NumDefs; in unfoldMemoryOperand() local
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| /external/llvm/lib/MC/MCParser/ |
| D | AsmParser.cpp | 5105 unsigned NumDefs = Desc.getNumDefs(); in parseMSInlineAsm() local
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 6499 unsigned NumDefs = MCID.NumDefs; in unfoldMemoryOperand() local
|